82008013A(FSC-RAY) - e2v Aerospace & Defense

REVISIONS

LTR DESCRIPTION DATE (YR-MO-DA) APPROVED

F

Change to vendor similar part number for vendor CAGE 18324.

Changes to table I parameters tEA and COUT. Add vendor CAGE

18324 to device types 03 and 04 as a source of supply. Add new

device design for device 04 for vendor CAGE 07933. Removed table

III, figure 5, and programming procedures. Editorial changes

throughout.

91-10-30 M. A. Frye

G

Changes in accordance with NOR 5962-R010-93 93-02-12 M. A. Frye

H

Changes in accordance with NOR 5962-R205-93 93-08-10 M. A. Frye

J

Updated boilerplate. Sheet 4, change VOH conditions from IOH = -2.0

mA to -1.6 mA; change CIN max. limit from 10 pF to 15 pF; change

COUT max. limit for devices 01, 02, and 04 from 13 pF to

20 pF; add footnote 3 to tDA test column. Removed logic diagrams.

Remove vendors CAGE 50364 and 34335 as suppliers, and removed

their associated switching time test circuits.

97-05-29 Raymond Monnin

K

Boilerplate update, part of 5 year review. ksr 05-06-30 Raymond Monnin

L

Boilerplate update, part of 5 year review. ksr 10-11-10 Charles F. Saffle

CURRENT CAGE CODE 67268

THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED

REV

SHEET

REV

SHEET

REV STATUS REV L L L L L L L L L L L L L

OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13

PMIC N/A PREPARED BY

Darrell Hill

DLA LAND AND MARITIME

STANDARD

MICROCIRCUIT

DRAWING

CHECKED BY

C. R. Jackson

COLUMBUS, OHIO 43218-3990

http://www.dscc.dla.mil

THIS DRAWING IS AVAILABLE

FOR USE BY ALL

DEPARTMENTS

APPROVED BY

N. A. Hauck

MICROCIRCUIT, MEMORY, DIGITAL,

SCHOTTKY BIPOLAR 32K PROGRAMMABLE

READ ONLY MEMORY (PROM), MONOLITHIC

SILICON

AND AGENCIES OF THE

DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE

82-09-01

AMSC N/A

REVISION LEVEL

L SIZE

A CAGE CODE

14933

82008

SHEET

1 OF

13

DSCC FORM 2233

APR 97 5962-E069-11

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1. SCOPE

1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in

accordance with MIL-PRF-38535, appendix A.

1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:

82008 01 J A

Drawing number Device type

(see 1.2.1) Case outline

(see 1.2.2) Lead finish

(see 1.2.3)

1.2.1 Device type(s). The device type(s) identify the circuit function as follows:

Device type Generic number 1/ Circuit function Access time

01 4096 words x 8 bits per word PROM, T.S. 95 ns

02 4096 words x 8 bits per word PROM, T.S. 55 ns

03 4096 words x 8 bits per word PROM, T.S. 45 ns

04 4096 words x 8 bits per word PROM, T.S. 70 ns

1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:

Outline letter Descriptive designator Terminals Package style

J GDIP1-T24 or CDIP2-T24 24 dual-in-line package

K GDFP2-F24 or CDFP3-F24 24 flat package

L GDIP3-T24 or CDIP4-T24 24 dual-in-line package

X CQCC1-N32 32 rectangular leadless chip carrier

3 CQCC1-N28 28 square leadless chip carrier

Y CDFP4-F24 24 flat package

1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.

1.3 Absolute maximum ratings.

Supply voltage (VCC) .............................................................................. -0.3 to +7.0 V dc

Input voltage range ................................................................................ +5.5 V dc

Storage temperature range ................................................................... -65C to +150C

Lead temperature (soldering, 10 seconds) ............................................ +300C

Thermal resistance, junction-to-case (JC) ............................................ See MIL-STD-1835 2/

Output voltage applied ........................................................................... -0.3 V dc to VCC

Output sink current ............................................................................... 100 mA

Maximum power dissipation (PD) 3/ ...................................................... 1.04 W dc

Maximum junction temperature (TJ) ....................................................... +175C

1.4 Recommended operating conditions.

Supply voltage range (VCC) .................................................................... 4.5 V dc to 5.5 V dc

Minimum high level input voltage (VIH) .................................................. 2.0 V dc

Maximum low level input voltage (VIL) ................................................... 0.8 V dc

Normalized fanout (each output) ........................................................... 12 mA

Case operating temperature range (TC) ................................................ -55C to +125C

1/ Generic numbers are listed on the Standardized Military Drawing Source Approval Bulletin at the end of this document and

will also be listed in MIL-HDBK-103.

2/ Heat sinking is recommended to reduce the junction temperature.

3/ Must withstand the added PD due to short circuit test (e.g., IOS).

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2. APPLICABLE DOCUMENTS

2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part

of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the

solicitation or contract.

DEPARTMENT OF DEFENSE SPECIFICAT ION

MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.

DEPARTMENT OF DEFENSE ST ANDARDS

MIL-STD-883 - Test Method Standard Microcircuits.

MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.

DEPARTMENT OF DEFENSE HANDBOOKS

MIL-HDBK-103 - List of Standard Microcircuit Drawings.

MIL-HDBK-780 - Standard Microcircuit Drawings.

(Copies of these documents are available online at https://assist.daps.dla.mil/quicksearch/ or from the Standardization

Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)

2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text

of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a

specific exemption has been obtained.

3. REQUIREMENTS

3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-

JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer

Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-

PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying

activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan

may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device.

These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-

PRF-38535 is required to identify when the QML flow option is used.

3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified

in MIL-PRF-38535, appendix A and herein.

3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein.

3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.

3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 2.

3.2.3.1 Unprogrammed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing

shall be as specified on figure 2. When required in groups A or C (see 4.3), the devices shall be programmed by the

manufacturer prior to test in a checkerboard pattern (a minimum of 50 percent of the total number of bits programmed).

3.2.3.2 Programmed devices. The requirements for supplying programmed devices are not part of this drawing.

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TABLE I. Electrical performance characteristics.

Test Symbol Conditions

-55C  TC  +125C

VCC = 4.5 V to 5.5 V

unless otherwise specified

Device

type Group A

subgroups

Limits Unit

Min Max

High level output

voltage

VOH

VCC = minimum,

IOH = -1.6 mA All 1, 2, 3 2.4 V

Low level output

voltage

VOL

VCC = minimum,

IOL = 16mA All 1, 2, 3 0.5 V

Input clamp voltage

VIC

IIN = -18 mA All 1, 2, 3 -1.5 V

High impedance

(Off-state) output

high current

IOHZ

VCC = VCC maximum

VO = 2.4 V 01 1, 2, 3

100 µA

02,03,04

40

High impedance

(Off-state) output

low current

IOLZ

VCC = VCC maximum

VO = 0.4 V 01

1, 2, 3 -100 µA

02,03,04

-40

High level input

current

IIH

VIH = VCC maximum All 1, 2, 3 40 μA

Low level input

current

IIL

VIL = 0.4 V

VCC = VCC maximum All 1, 2, 3 -250 A

Short circuit output

current

IOS

VOUT = 0.2 V 1/ All 1, 2, 3 -15 -100 mA

Supply current

ICC

VCC = VCC maximum, all

inputs grounded All 1, 2, 3 190 mA

Input capacitance

CIN

VCC = 5 V, f = 1 MHz,

VIN = 2.0 V, see 4.3.1c All 4

15 pF

Output capacitance

COUT

VCC = 5 V, f = 1 MHz,

VOUT = 2.0 V, see 4.3.1c 01, 02, 04 4 20 pF

03 12

Address access

time

tAA

VCC = 4.5 V and 5.5 V,

see figure 4 01

9, 10, 11

95

ns

02 55

03 45

04 70

Chip enable access

time

tEA 01, 04

45 ns

02, 03

35

Chip disable access

time 2/ 3/

tDA 01

45 ns

02, 03, 04

35

1/ Not more than one output shall be grounded at one time, for a maximum of 1 second.

2/ CL  5 pF.

3/ May not be tested but is guaranteed to the limits specified in table I.

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Device Types

All

Case Outlines

J, K, Y, L

X

3

Terminal

Number Terminal Symbol

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

A7

A6

A5

A4

A3

A2

A1

A0

O1

O2

O3

GND

O4

O5

O6

O7

O8

CE2

A11

CE 1

A10

A9

A8

VCC

- - -

NC

A7

A6

A5

A4

A3

A2

A1

A0

NC

O1

O2

O3

NC

GND

O4

NC

O5

O6

O7

O8

NC

CE2

A11

CE 1

NC

A10

A9

A8

NC

VCC

NC

A7

A6

A5

A4

A3

A2

A1

A0

NC

O1

O2

O3

GND

NC

O4

O5

O6

O7

O8

NC

CE2

A11

CE1

A10

A9

A8

VCC

- - -

FIGURE 1. Terminal connections.

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Word

number

CE1

CE2

Address Data

NA

A11 A

10 A

9 A

8 A

7 A

6 A

5 A

4 A

3 A

2 A

1 A

0 O

8 O

7 O

6 O

5 O

4 O

3 O

2 O

1

L

H

L

X

See note 5

OC OC OC OC OC OC OC OC

Notes:

1. NA = Not applicable.

2. X = Input may be high level, low level, or open circuit.

3. OC = Open circuit (high resistance output).

4. Program readout can only be accomplished with enable input at low level.

5. The outputs for an unprogrammed device shall be high for circuits C and F.

FIGURE 2. Truth table (unprogrammed).

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Circuit F

Notes:

1. Test table for devices programmed in accordance with an altered item drawing may be replaced by the equivalent tests

which apply to the specific program configuration of the resulting read-only memory.

2. CL = 30 pF minimum, including jig and probe capacitance: R1 = 300 and R2 = 600.

3. Outputs may be under load simultaneously.

4. VOLAC and VOHAC are the measured output voltage levels while enabled.

FIGURE 3. Switching time test circuits and waveforms.

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Circuit F Continued

FIGURE 3. Switching time test circuits and waveforms – Continued.

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Circuit C

Note: R1 = 270 and R2 = 600 CL = 50 pF

FIGURE 3. Switching time test circuits and waveforms – Continued.

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Circuit C Continued

FIGURE 3. Switching time test circuits and waveforms – Continued.

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3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are

as specified in table I and shall apply over the full case operating temperature range.

3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical

tests for each subgroup are described in table I.

3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed

in 1.2 herein. In addition, the manufacturer's PIN may also be marked.

3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance

to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification mark in

accordance with MIL-PRF-38535 to identify when the QML flow option is used.

3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an

approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and

Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the

requirements of MIL-PRF-38535, appendix A and the requirements herein.

3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided

with each lot of microcircuits delivered to this drawing.

3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that affects

this drawing.

3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime's agent, and the acquiring activity retain the

option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made

available onshore at the option of the reviewer.

3.10. Processing options. Since the device is capable of being programmed by either the manufacturer or the user to result

in a wide variety of configurations; two processing options are provided for selection in the contract, using an altered item

drawing.

3.10.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in 3.2.3.1

and table II. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program

configuration.

3.10.2 Manufacturer-programmed device delivered to the user. All testing requirements and quality assurance provisions

herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery.

4. VERIFICATION

4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,

appendix A.

4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices

prior to quality conformance inspection. The following additional criteria shall apply:

a. Burn-in test, method 1015 of MIL-STD-883.

(1) Test condition A, C, D, or E. The test circuit shall be maintained by the manufacturer under document revision

level control and shall be made available to the preparing or acquiring activity upon request. The test circuit

shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent

specified in method 1015 of MIL-STD-883.

(2) TA = +125C, minimum.

b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter

tests prior to burn-in are optional at the discretion of the manufacturer.

c. All devices processed to an altered item drawing may be programmed either before or after burn-in at the

manufacturer's discretion. The required electrical testing shall include, as a minimum, the final electrical tests for

programmed devices as specified in table II herein.

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TABLE II. Electrical test requirements. 1/ 2/ 3/

MIL-STD-883 test requirements Subgroups

(in accordance with

MIL-STD-883, method

5005, table I)

Interim electrical parameters

(method 5004) - - -

Final electrical test parameters (method 5004)

for unprogrammed devices 1*, 2, 3, 7*, 8A, 8B

Final electrical test parameters (method 5004)

for programmed devices 1*, 2, 3, 7*, 8A,

8B, 9

Group A test requirements (method 5005) 1, 2, 3, 4, 7, 8A,

8B, 9, 10, 11

Groups C and D end-point electrical

parameters (method 5005) 1, 2, 3, 7, 8A, 8B

1/ * Indicates PDA applies to subgroups 1 and 7.

2

/ Any or all subgroups may be combined when using high-speed testers.

3

/ Subgroups 7 and 8 shall consist of verifying the pattern specified.

4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-

883 including groups A, B, C, and D inspections. The following additional criteria shall apply.

4.3.1 Group A inspection.

a. Tests shall be as specified in table II herein.

b. Subgroups 5 and 6 in table I, method 5005 of MIL-ST D-883 shall be omitted.

c. Subgroup 4 (CIN and COUT measurements) shall be measured only for the initial test and after process or design

changes which may affect input or output capacitance. Sample size is 15 devices with no failures, and all input and

output terminals tested.

d. Unprogrammed devices shall be tested for programmability and ac performance compliance to the requirements of

group A, subgroup 9,10,11. Either of two techniques is acceptable:

(1) Testing the entire lot using additional built-in test circuitry which allows the manufacturer to verify programmability

and ac performance without programming the user array. If this is done, the resulting test patterns shall be verified

on all devices during subgroup 9,10,11 group A testing in accordance with the sampling plan specified in

MIL-STD-883, method 5005.

(2) If such compliance cannot be tested on an unprogrammed device, a sample shall be selected to satisfy

programmability requirements prior to performing subgroup 9,10,11. Twelve devices shall be submitted to

programming (see 3.2.2.1). If more than two devices fail to program, the lot shall be rejected. At the

manufacturer's option, the sample may be increased to 24 total devices with no more than four total device failures

allowable.

Ten devices from the programmability sample shall be submitted to the requirements of group A, subgroup

9,10,11. If more than two total devices fail, the lot shall be rejected. At the manufacturer's option, the sample may

be increased to 20 total devices with no more than four total device failures allowable.

e. Subgroups 7 and 8 shall include verification of the truth table.

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4.3.2 Groups C and D inspections.

a. End-point electrical parameters shall be as specified in table II herein.

b. Steady-state life test conditions, method 1005 of MIL-STD-883.

(1) Test condition A, C, D, or E. The test circuit shall be maintained by the manufacturer under document revision

level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall

specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in

method 1005 of MIL-STD-883.

(2) TA = +125C, minimum.

(3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.

4.4 Programming procedures. The programming procedures shall be as specified by the device manufacturer.

5. PACKAGING

5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A.

6. NOTES

6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications

(original equipment), design applications, and logistics purposes.

6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-

prepared specification or drawing.

6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for

the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.

6.4 Record of users. Military and industrial users shall inform DLA Land and Maritime when a system application requires

configuration control and the applicable SMD. DLA Land and Maritime will maintain a record of users and this list will be used

for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC 5962)

should contact DLA Land and Maritime-VA, telephone (614) 692-0544.

6.5 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA, Columbus, Ohio 43218-3990,

or telephone (614) 692-0540.

6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MIL-

HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by

DLA Land and Maritime-VA.

6.7 Circuit designator. For CAGE code and vendor association, see MIL-HDBK-103. Circuit C is 18324, and circuit F is

07933.

STANDARD MICROCIRCUIT DRAWING BULLETIN

DATE: 10-11-10

Approved sources of supply for SMD 82008are listed below for immediate acquisition information only and shall be

added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to

include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of

compliance has been submitted to and accepted by DLA Land and Maritime-VA. This information bulletin is

superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime maintains an

online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/.

Standard

microcircuit

drawing PIN 1/ 2/

Vendor

CAGE

number

Vendor

similar

PIN 3/

8200801JA 4/

4/

58625

0C7V7

82HS321A/BJA

53S3281J/883B

AM27S43/BJA

R29771DM/883B

SL82HS321J1

R29771

8200801KA 4/

4/

58625

82HS321A/BKA

53S3281W/883B

AM27S43/BKA

SL82HS321K1

8200801LA 4/

0C7V7 R29771SM/883B

R29771

8200801XA 4/

0C7V7 AM27S43/BUA

R29771

82008013A 4/

4/

58625

0C7V7

82HS321A/B3A

53S3281L/883B

AM27S43/B3A

R29771LM/883B

SL82HS32131

R29771

8200802JA 4/

4/

58625

82HS321A/BJA

53S3281AJ/883B

AM27S43A/BJA

82HS321A/BJA

SL82HS321J1

8200802KA 4/

4/

58625

82HS321A/BKA

53S3281AW/883B

AM27S43A/BKA

82HS321A/BKA

SL82HS321K1

8200802XA 4/ AM27S43A/BUA

82008023A 4/

4/

58625

82HS321A/B3A

53S3281AL/883B

AM27S43A/B3A

82HS321A/B3A

SL82HS32131

See footnotes at end of listing.

1 of 2

STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued.

Standard

microcircuit

drawing PIN 1/ 2/

Vendor

CAGE

number

Vendor

similar

PIN 3/

8200803JA 4/

4/

58625

4/

82HS321B/BJA

53S3281BJ/883B

SL82HS321J1

82HS321A/BJA

8200803KA 4/

4/

58625

82HS321B/BKA

53S3281BW/883B

82HS321A/BKA

SL82HS321K1

82008033A 4/

4/

58625

82HS321B/B3A

53S3281BL/883B

SL82HS32131

8200804JA 4/

0C7V7 82HS321C/BJA

R29771DM/883B

8200804KA 4/

4/ 82HS321C/BKA

R29771FM/883B

8200804LA 0C7V7 R29771SM/883B

82008043A 0C7V7

4/ R29771LM/883B

82HS321C/B3A

1/ Military drawing and DSCC drawing PINs formerly had a

programming procedure letter within the military drawing PIN:

these parts are interchangeable with parts that are now marked

without the programming procedure letter within the military drawing

number, i.e. 82008C1JA is interchangeable with 8200801JA.

2/ The lead finish shown for each PIN representing a hermetic

package is the most readily available from the manufacturer

listed for that part. If the desired lead finish is not listed contact

the vendor to determine its availability.

3/ Caution. Do not use this number for item acquisition. Items acquired to this

number may not satisfy the performance requirements of this drawing.

4/ Not available from an approved source of supply.

Vendor CAGE

number

Vendor name

and address

Fusible

link

58625 Lansdale Semiconductor, Inc.

2412 W. Huntington Drive

Tempe, AZ 85282-3132

anti-fuse

0C7V7 QP Semiconductor

2945 Oakmead Village Court

Santa Clara, CA 95051

NiCr

or

Zapped vertical

emitter

The information contained herein is disseminated for convenience only and the

Government assumes no liability whatsoever for any inaccuracies in the

information bulletin.

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