Hardware Monitor Product Description
July 4th 1997 - Analog Devices Proprietary - Page 1 of 10
ANALOG
DEVICES
Hardware Monitor for Desktop PCs
Features
Monitoring of All Desktop PC Supplies in Parallel
General Description
The ADM9268 Hardware Monitor IC is a self contained IC which monitors six Power
Supplies in a Desktop PC in parallel and outputs the status information on an Industry
Each power supply monitor circuit uses a proprietary window comparator design whereby
a three resistor network is used in conjunction with two comparators and a single precision
voltage reference to check if the supply is within it’s required operating tolerance. An added
feature of this design is that the power supply voltages being monitored can be higher than
the power supply voltage to the ADM9268 IC itself.
Analog Devices experience in the design of Power Supply Supervisory circuits is used to
provide an optimum solution for the overall circuit in terms of cost, performance and power
consumption. Some of the features of the design being the incorporation of hysteresis and
glitch immunity into the comparators.
The part will be manufactured on one of Analog Devices’ proprietary BiCMOS processes
which also includes high performance thin film resistors to achieve the accuracy required for
the precision voltage reference and power supply high and low trip points.
Internal Comparator Hysteresis
Power Supply Glitch Immunity
Two-Wire I2C Compatible Serial Interface
VCC from 2.5V to 6V
Guaranteed Operation from -40C to +85C
No External Components
16 Pin Narrow (150mil) SOIC Package
Standard two-wire I2C compatible serial interface. There are also two active low event input
pins, TMP1 and TMP2, which might come from temperature sensor circuits, which are added
to the status information which can be read through the two-wire serial interface.
Supports Klamath CPU Core Supply Voltage Options
The SU6 input is normally used to monitor the CPU Core Voltage. The ADM9268 supports
the range of CPU Core Voltage options from 1.3V to 3.5V which can be set up by
a 5 bit VID code through the serial interface. This makes the ADM9268 compatible with
all the CPUs currently available in the marketplace.
Hardware Monitor Product Description
July 4th 1997 - Analog Devices Proprietary - Page 2 of 10
ANALOG
DEVICES
Hardware Monitor with Serial Interface
VREF
Two-Wire
Serial
Interface
and
Interrupt
Logic
ERR1
Window
Comparator
Window
Comparator
Window
Comparator
Window
Comparator
Window
Comparator
Window
Comparator
MUX
GND
SU2
SU3
TMP2
ERR2
ERR3
ERR4
ERR5
ERR6
16 Pin Narrow SOIC Package
SU1
SU4
SU6
VCC
SU5
SCLK
DIS
SDATA
INT
ADD
TMP1
NC
DAC
5
5
5
SEL4
Hardware Monitor Product Description
July 4th 1997 - Analog Devices Proprietary - Page 3 of 10
ANALOG
DEVICES
Pin Description
Pin Name Function
SU1 Supply to be monitored. 12V +/- 6%.
Supply to be monitored. 5V +/- 7%.SU2
SU3
SU4
Supply to be monitored. 3.3V +/- 7%.
Supply to be monitored. 2.5V or 3.3V +/- 7%. Selected by SEL4.
GND
SCLK
Open Drain Output.
When DIS is High ADM9268 is disabled and INT pulls high through an
external 10k resitor to a positive power supply.
When DIS is Low INT acts as active Low Interrupt Output which can be fed
to the corresponding input of the microcontroller.
An interrupt is generated when any of the supply inputs goes in or out of
tolerance or there is a change on TMP1 or TMP2. The interrupt is cleared
when the interface is read at the acknowledge bit after the rising edge of the
SCLK signal.
SU5 Supply to be monitored. 1.5V +/- 7%.
SU6 Supply to be monitored. CPU Core Voltage +/- 5%.
Pin No
1
2
3
4
5
6
7
8Supply Monitor IC Power Supply.
DIS 11 TTL I/P. Disables ADM9268 when High, ie INT is forced High.
TMP2 12 TTL I/P. Event Input from Temperature Sensor - Active High.
TMP1 10 TTL I/P. Event Input from Temperature Sensor - Active Low
VCC
INT 14
Two-Wire Serial Interface Clock Input.
SDATA 15 Two-Wire Serial Interface Data I/O.
26
Ground.
Can be powered off any Power Supply between 2.5V and 6V.
NC 9No Connect.
ADD 13 TTL I/P. LSB of Address of Two-Wire Serial Interface.
Hardware Monitor Product Description
July 4th 1997 - Analog Devices Proprietary - Page 4 of 10
ANALOG
DEVICES
Preliminary Specifications
Parameter Min Typ Max Units Comments
Operating Temp Range -40 85 Deg C Industrial (A Version)
VCC Supply Voltage 6 V
2.5
VCC Supply Current 50 100 uA Current from SU1-6 not included.
SU1 Input Resistance 240 kOhm
SU2 Input Resistance 100 kOhm
SU3 Input Resistance 66 kOhm
kOhmSU4 Input Resistance 50
IIN ~ 50uA when SU1=12V
IIN ~ 50uA when SU2=5V
IIN ~ 50uA when SU3=3.3V
IIN ~ 50uA when SU4=2.5V
SU1 High Trip Point 12.72 12.96 VMeasured with SU1 rising
SU2 High Trip Point
SU3/4 High Trip Point
SU4 High Trip Point
Measured with SU2 rising
Measured with SU3/4 rising
Measured with SU4 rising
V
V
V
5.45
3.60
2.725
SU1 Low Trip Point
SU2 Low Trip Point
SU3/4 Low Trip Point
SU4 Low Trip Point
V
V
V
V
Measured with SU1 falling
Measured with SU2 falling
Measured with SU3/4 falling
Measured with SU4 falling
SU1 Hysteresis
SU2 Hysteresis
SU3 Hysteresis
SU4 Hysteresis
2
2
2
2
%
%
%
%
Measured at SU1 Pin
Measured at SU2 Pin
Measured at SU3 Pin
Measured at SU4 Pin
Glitch Immunity 20 us ~100mV glitch on VCC or SU1-6
Propogation Delay 20 us Delay from Supply going outside
tolerance until output changes
TTL Input Low 0.8 V
V
2.4
TTL Input High
Open Drain Output Low 0.4 V
Open Drain Output High V+ - 0.25 V
4.0V < VCC < 4.0V
4.0V < VCC < 6.0V
10k External to Positive Supply V+
10k External to Positive Supply V+
Supply Range for V+ 2.5 6V V
+
can be different from VCC
TTL Input Low 0.6 V 2.5V < VCC < 4.0V
2.5V < VCC < 4.0V
V
2.0
TTL Input High
13.20
5.35
3.53
2.675
5.55
3.66
10.80 11.04
4.55
3.00
2.275
11.28
4.45
2.94
2.225
4.65
3.07
2.325
SU5 Input Resistance
SU6 Input Resistance 30
TBD kOhm
kOhm IIN ~ 50uA when SU5=1.5V
IIN ~ TBD
SU5 High Trip Point
SU6 High Trip Point Measured with SU5 rising
Measured with SU6 rising
SU5 Low Trip Point
SU6 Low Trip Point Measured with SU5 falling
Measured with SU6 falling
2.775
1.605 1.635 1.665
TBD TBD TBD V
V
1.335
TBD 1.365 1.395
TBD
TBD V
V
SU5 Hysteresis
SU6 Hysteresis Measured at SU5 Pin
Measured at SU6 Pin
2
2%
%
Can be powered from SU2 or SU3.
Hardware Monitor Product Description
July 4th 1997 - Analog Devices Proprietary - Page 5 of 10
ANALOG
DEVICES
Absolute Maximum Ratings
Input Maximum Rating
VCC -0.3V to +6V
SU1, SU2, SU3, SU4, SU5, SU6 -0.3V to +15V
All Other Inputs -0.3V to VCC + 0.3V
Output Current INT, SDATA 20mA
All Outputs -0.3V to +6V
Hardware Monitor Product Description
July 4th 1997 - Analog Devices Proprietary - Page 6 of 10
ANALOG
DEVICES
Selection of CPU Core Voltage
Voltage Monitored at SU6 Input
VID4 VID3 VID2 VID1 VID0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1.30V
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1.35V
1.40V
1.45V
1.50V
1.55V
1.60V
1.65V
1.70V
1.75V
1.80V
1.85V
1.90V
1.95V
2.00V
2.05V
No CPU
2.1V
2.2V
2.3V
2.4V
2.5V
2.6V
2.7V
2.8V
2.9V
3.0V
3.1V
3.2V
3.3V
3.4V
3.5V
Hardware Monitor Product Description
July 4th 1997 - Analog Devices Proprietary - Page 7 of 10
ANALOG
DEVICES
Operation of Two-Wire Serial Interface in Read Mode
When DIS is High the two-wire serial interface operates as an I2C Compatible Interface.
The address of the port is 000011a where “a” is the logic level input to the ADD pin.
The ADM9268 operates as a slave device and whenever one of it’s SU inputs goes in or out of tolerance or
the TMP1 or TMP2 inputs change state the INT pin goes low to indicate that there is new data
available. INT goes high again at the acknowledge bit after the rising edge of the SCLK signal.
Figure 1: The following diagram shows the sequence of events.
S000011a1AEEEEEEEE1P
High T rip Point
Low Trip Point
SU Voltage going
Out of Tolerance.
INT
SCLK
SDATA
Start
Contition Stop
Condition
ADM9268 Slave Address Data From Port
Acknowlwdge
from ADM9268
R/W
tir
The sequence of the bits in the Data Byte read from the ADM9268 Serial Port is as follows:
E7 - MSB (Read First) ERR1 (1 : in tolerance, 0 : out of tolerance)
E6
E5
E4
E3
ERR2 (1 : in tolerance, 0 : out of tolerance)
ERR5 (1 : in tolerance, 0 : out of tolerance)
ERR3 (1 : in tolerance, 0 : out of tolerance)
ERR6 (1 : in tolerance, 0 : out of tolerance)
tiv
E2
E1
E0 - LSB (Read Last) TMP1 (same logic level at TMP1 input)
TMP2 (same logic level at TMP2 input)
ERR4 (1 : in tolerance, 0 : out of tolerance)
Hardware Monitor Product Description
July 4th 1997 - Analog Devices Proprietary - Page 8 of 10
ANALOG
DEVICES
Operation of Two-Wire Serial Interface in Write Mode
When DIS is High the two-wire serial interface operates as an I2C Compatible Interface.
The address of the port is 000011a where “a” is the logic level on ADD input pin.
Write mode provides the ability to disable SU4 and SU5 in cases where these supplies are not in fact present
S000011a0ADDDDDDDDAP
SCLK
SDATA
Start
Contition Stop
Condition
ADM9268 Slave Address Data to Port
Acknowlwdge
from ADM9268
R/W
The sequence of the bits in the Data Byte written to the ADM9268 Serial Port is as follows:
VID4 (Written First) CPU Core Voltage Selection Bit
DIS4=1 disables SU4. DIS4=0 enables SU4.
DIS5=1 disables SU5. DIS5=0 enables SU5.
SEL4=1 means SU4 monitors 2.5V +/- 7%,
and to also select which supply voltage is monitored on SU4. The CPU Core voltage monitored on SU6
A feature to note on this mode is that on Power-Up SU3 and SU4 are disabled and not enabled until valid
data is written to the ADM9268 to select the correct settings for DIS4, DIS5 and SEL4. This guards against
Acknowlwdge
from ADM9268
the possibility of SU4 or SU5 being flagged as being out of tolerance before the correct settings have been
made. The VID bits also power up at 1 such that SU6 is disabled.
VID3
VID2
VID1
VID0
DIS4
DIS5
SEL4 (Written last)
CPU Core Voltage Selection Bit
CPU Core Voltage Selection Bit
CPU Core Voltage Selection Bit
CPU Core Voltage Selection Bit
SEL4=0 means SU4 monitors 3.3V +/- 7%.
can also be set through the Serial Interface.
Hardware Monitor Product Description
July 4th 1997 - Analog Devices Proprietary - Page 9 of 10
ANALOG
DEVICES
Serial Bus Preliminary Specifications
Parameter Min Typ Max Units Comments
VIL (LOW Level I/P) -0.3 +0.3xVCC V SCLK and SDATA Pins
VIH (HIGH Level I/P) VCC+0.3 V0.7xVCC SCLK and SDATA Pins
IOL (LOW O/P Current) 3 mA
IIL (I/P Lkg Current) SDATA Pin
SCLK and SDATA Pin
1uA
CI (Input Capacitance) pF
7SCLK and SDATA Pins
IOL (Low O/P Current) 1.6 mA INTB Pin
IIL (I/P Lkg Current) 1uA INTB Pin
tiv (I/P Data Valid Time) 4See Figure 1, CL <100pF
tir (Reset Delay Time) us
us See Figure 1, CL <100pF
15
fSCLK (Clock Frequency)
tSW (Glitch Immunity)
tBUF (Bus Free Time)
tSU;STA (Start Setup)
tHD;STA (Start Hold)
tLOW (SCLK Low Time))
tHIGH (SCLK High Time)
tr (SCLK, SDATA Rise)
tf (SCLK, SDATA Fall)
tSU;DAT (Data Setup)
tHD;DAT (Data Hold)
tVD;DAT (Data Valid)
tSU;STO (Stop Setup)
4.7
4.7
4.0
4.7
4.0
250
0
4.0
100
100
1.0
0.3
3.4
kHz
ns
us
us
us
us
us
us
us
ns
ns
us
us
See Figure 2
See Figure 2
See Figure 2
See Figure 2
See Figure 2
See Figure 2
See Figure 2
See Figure 2
See Figure 2
See Figure 2
See Figure 2
See Figure 2
See Figure 2
Hardware Monitor Product Description
July 4th 1997 - Analog Devices Proprietary - Page 10 of 10
ANALOG
DEVICES
Figure 2: Serial Bus Timing Diagram
tSU;STA
tBUF
tLOW tHIGH 1/fSCLK
trtf
tHD;STA tSU;DAT tHD;DAT
SCLK
SDATA
Bit 7
MSB
(A7)
Start
Condition
(S)
Bit 6
(A6)
PROTOCOL
tVD;DAT tSU;STO
SCLK
SDATA
PROTOCOL
Stop
Condition
(P)
Acknowledge
(A)
Bit 0
LSB
(R/W)
