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Data Sheet
SCC2130-D08
Combined gyroscope and 3-axis accelerometer with digital SPI interface
Features
• ±125°/s X-axis angular rate measurement range
• ±6g 3-axis acceleration measurement (XYZ) range
• −40°C…+125°C operating range
• 3.0V…3.6V supply volt age
• S PI digi tal i nterfac e
• E xt ensive s el f diagnost i cs feat ures
• S i ze 15. 0 x 8. 5 x 4. 3 m m (l × w × h)
• RoHS compliant robust SOIC plastic package
suitable for lead free soldering process and SMD
mounting
• Proven capacitive 3D-MEMS technology
Applications
SCC2130-D08 i s target ed at appl i cat i ons dem andi ng
high stability with tough environmental requirements.
Typical applications include:
• Inertial Measurement Units (IMUs) for highly
demanding environments
• Platform stabilization and control
• Motion analys i s and c ontrol
• Roll over detection
• Robotic control systems
• Machine control systems
• Navigation systems
Overview
The SCC2130-D08 is a combined high performance angular rate and accelerometer sensor component. It
consists of X-axis angular rate sensor and three axis accelerometer sensor based on Murata's proven capacitive
3D-MEMS technology. Signal processing is done in one mixed signal ASIC that provides angular rate and
acceleration output via flexible SPI digital interface. Sensor elements and ASIC
are packaged to 24 pin
premolded plastic housing that guarantees reliable operation over product's lifetime.
The SCC2130-D08 is designed, manufactured and tested for high stability, reliability and quality requirements.
The component has extremely stable output over wide range of temperature, humidity and vibration. The
component has several advanced self diagnostics features, is suitable for SMD mounting and is compatible with
RoHS and ELV directives.
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T ABL E O F CO NT ENT S
1 Introduction ....................................................................................................................................... 4
2 Specifications ................................................................................................................................... 4
2.1 General Specifica tions .................................................................................................................4
2.2 Performanc e Specifications for Gyroscope ..............................................................................5
2.3 Performanc e Specifications for Acc elerometer........................................................................6
2.4 Performance Specification for Temperatur e Sensor ...............................................................7
2.5 A bs olute Ma x imum Ratings ........................................................................................................7
2.6 Pin Desc ription .............................................................................................................................8
2.7 Typical performance characteristics........................................................................................10
2.7.1 Gyro typical performance characteristics ........................................................................10
2.7.2 Acceleromet er typical performance characteristics .......................................................13
2.8 Digital I/O Specification .............................................................................................................15
2.9 SPI AC Characteristics...............................................................................................................16
2.10 Measurement Axis and Directions ........................................................................................17
2.11 Package Characteristics ........................................................................................................18
2.11.1 Package Outline Draw ing ................................................................................................18
2.12 PCB Footprint ..........................................................................................................................19
2.13 Abbreviations ..........................................................................................................................19
3 G eneral Pr oduct Descr i pt i on ...................................................................................................... 20
3.1 Factory Calibration .....................................................................................................................21
4 Compone nt O pe r at ion, Reset a nd Power Up ......................................................................... 22
4.1 Component Operation................................................................................................................22
4.2 Reset and Pow e r Up Sequence For Enabling Internal Fa ils a fe Diagnostics ......................23
5 Compone nt I nterfaci ng................................................................................................................. 24
5.1 SPI Interface ................................................................................................................................24
5.1.1 General ..................................................................................................................................24
5.1.2 Protocol.................................................................................................................................24
5.1.3 General Ins truction format..................................................................................................25
5.1.4 Operations ............................................................................................................................26
5.1.5 Return Statu s........................................................................................................................26
5.1.6 Ch ecksum (CRC)..................................................................................................................27
5.1.7 Recommendation for the SPI interface implementation .................................................28
6 Register Definition ......................................................................................................................... 29
6.1 Sensor Data Block ......................................................................................................................29
6.1.1 Example of Angular Rate Data Conversion ......................................................................29
6.1.2 Example of Acceleration Data Conversion .......................................................................29
6.1.3 Example of Temperatur e Data Conversion.......................................................................29
6.2 Sensor Status Block ...................................................................................................................30
6.2.1 RATE Status 1 Register (09h) .............................................................................................31
6.2.2 RATE Status 2 Register (0Ah) ............................................................................................31
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6.2.3 ACC Status Register (0Fh) ..................................................................................................32
6.2.4 Reset Control Register (16 h) ..............................................................................................33
6.2.5 Serial ID0 and Serial ID1 Registers (18h a nd 1 9 h) ...........................................................33
6.2.6 Common Status Register (1Bh) .........................................................................................34
6.2.7 Identification Register (1Dh)...............................................................................................35
6.2.8 Status Summary Regis ter (1Fh) .........................................................................................35
7 Appl i ca ti on inf or m at ion ............................................................................................................... 36
7.1 A pplic ation Circuitry and External Component Characteristics ..........................................36
7.2 A s sembly Instructions ...............................................................................................................37
8 Order informati on .......................................................................................................................... 38
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1 Introduction
This document contains essential technical information about the SCC2130-D08 sensor including
specifications, SPI interface descriptions, user accessible register details, electrical properties and
application information. This document should be used as a reference when designing in
SCC2130-D08 component.
2 Specifications
2.1 General Specifications
General specifications for SCC2130-D08 component are presented in Table 1. All analog voltages
are related to t he pot ential at A V S S and all di gi t al vol t ages are related to t he potential at DV SS .
Table 1. General specifications.
Parameter
Condition
Min
Typ
Units
A nalog supply v oltage: AVDD
3.0
3.3
V
A nalog supply current: I_AVDD
Temperature range -40 ... +125 °C
15.2
mA
Digital supply v oltage: DVDD
3.0
3.3
V
Digital supply current: I_DVDD
Temperature range -40 ... +125 °C
3.3
mA
Boost supply current: I_L1
(c ur r ent t hr ough inductor L1, see
Figure 27)
Mean value
Peak value, T < 1µ s
M ax . v alue during startup (T≤0.4ms)
6.7
110
mA
mA
mA
T otal cur r ent, I_T OTAL
I_AVDD + I_DVDD + I_L1
25.2
mA
T otal cur r ent reset
Total av erage current during reset
mA
Rise/fall time: AVDD, DVDD,
Vin_BOOST (see Figure 27)
200 ms
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2.2 P erformance S pecifications for Gyroscop e
Table 2. Gyro performance s peci fi cations (DVDD=AVDD=3.3V, ambient temperature and
ODR=2.3kHz unless otherwise specified).
Parameter Condition Min Typ Max Units
Operating range M easurement ax is X -125 125 °/s
O ff set ( zero r ate out put)
0
LSB
Offset error (A
-1
1
°/s
Offset temperature drift (B
-40°C ... +125°C
-0.8
0.8
°/s
Offset short term bias stability
1
°/h
A ngular random walk 0.23 º/ h
Sensitivity 50 LSB/(°/s)
Sensit ivity error (C
-40°C ... +125°C
-2.5
2.5
%
Linearity err or
(D
±0.5 °/s
Integrated noise (RM S) 60Hz f ilter 0.05 °/sRMS
Noise density
0.005
(º/s)/ Hz
Cr oss axis sensit ivit y
(E
per axis -1.5 1.5 %
G-sensitivity
-0.1
0.1
(°/s)/g
Shoc k sensit ivit y
50g, 6ms
2.0
°/s
Shock recov ery
50
ms
A mplitude response
10Hz filter, -3dB frequency
60Hz filter, -3dB frequency
10
60
Hz
Hz
Power on start-up time
10Hz f ilter
60Hz f ilter
750
620
ms
ms
Recommended O DR
(F
2300 Hz
Min/Max values are validation ±3 sigma variation limits from test population. T ypical values are not guaranteed.
A) Includes offset calibration error and drift over lifetime.
B) Deviation from value at ambient temperature.
C) Includes calibration error, deviation from room temperature value and drift over lifetime.
D) St raight line through specified measurement range end point s .
E) Cr o ss a xi s sensitivity is the maximum sensitivity in the plane perpendicular to the measuring direction:
Cr o ss a xi s fo r Y a xi s = Se n si ti vity Y / Se n si ti v i ty X
Cr o ss a xi s fo r Z axis = Sensitivity Z / Sensitivity X
F) O DR = Ou tp u t Data Ra te , se e secti on 5.1.7 for more details.
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2.3 P erformance S pecifications for Accelerometer
Table 3. Ac celerom eter perform ance specificat i ons (DVDD=AVDD=3.3V, ambient temperature and
ODR=2.3kHz unl ess otherwi se spec i fied).
Parameter Condition Min Typ Max Unit
M easurement range M easurement ax es X Y Z -6 6 g
Offset (z ero acceleration output)
0
LSB
Offset error (A
-20
20
mg
Offset temperature drift (B
-40°C ... +125°C
-18
18
mg
Sensitivity
Between ±3°
1962
0.029
LSB/g
°/LSB
Sensit ivity error
(A
-1 1 %
Sensitiv ity temperature drift (B
-40°C ... +125°C
-1
1
%
Linearity err or (C
-1g . .. +1g r ange
-6g . .. +6g r ange
±5
±50
mg
mg
Integrated noise (RM S) 60Hz f ilter 2.7 mgRMS
Noise density
270
µg/Hz
Cr oss axis sensit ivit y
(D
per axis -0.5 0.5 %
A mplitude response
10Hz filter, -3dB frequency
60Hz filter, -3dB frequency
10
60
Hz
Hz
Power on start-up time
10Hz f ilter
60Hz f ilter
450
320
ms
ms
Recommended ODR
(E
2300 Hz
Min/Max values are validation ±3 sigma variation limits from test population. T ypical values are not guaranteed.
A) Includes calibration error and drift over lifetime.
B) Deviation from value at ambient temperature.
C) St raight line through specified measurement range e nd point s .
D) Cr o ss a xi s sensitivity is the maximum sensitivity in the plane perpendicular to the measuring direc t i on. X-axi s ou tp u t cr o ss a xi s se n si t i vi ty
(cross axis for Y and Z-axis outputs are defined correspondingly):
Cr o ss a xi s fo r Y a xi s = Se n si ti vity Y / Se n si ti v i ty X
Cr o ss a xi s fo r Z axis = Sensitivity Z / Sensitivity X
E) O DR = Ou tp u t Data Ra te , see section 5.1.7 for more details.
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2.4 P erformance S pecification for Temperature Sensor
Table 4. Temperature s ensor performance s peci fi cations.
Parameter
Condition
Min.
Typ
Unit
Temperature signal range
-50
°C
Temperature signal se nsitiv ity
Temperature sensor output in 2's
complement format
14.7
LSB/°C
Temperat ure i s convert ed to ° C wi t h foll owi ng equat i on:
Temperat ure [ °C] = 60 + (TEMP / 14.7),
where TEMP is temperature sensor output register content in decimal format.
2.5 Absolute Maximum Ratings
Within the maximum ratings (Table 5), no damage to the component shall occur. Parametric values
may deviate from specification, yet no functional deviation shall occur. All analog voltages are
related t o t he potent i al at AVS S , all di gi t al vol t ages are rel ated to DVSS .
Table 5. A bsol ut e m axim um rati ngs.
Parameter
Remark
Min.
Max.
Unit
AVDD
Supply volt age analog cir c uitry
-0.3
4.3
V
DVDD
Supply volt age digital cir c uitry
-0.3
4.3
V
DIN/DOUT
M ax imum v oltage at digital input and output pins
-0.3
DVDD+0.3
V
VBoost,
LBoost
M ax imum v oltage at high v oltage input and output
pins
-0.3
40 V
Topr
Operating temperature range
-40
125
°C
Tstg
Storage temperature range
-40
150
°C
ESD_HBM
ESD according Human Body M odel (HBM ),
Q100-002
±2000
V
ESD_MM
ESD according M achine M odel (M M ),
Q100-003 ±200
V
ESD_CDM
ESD according Charged Dev ice M odel (CDM ),
Q100-011
±500
±750 (corner
pins)
V
US
Ultrasonic agitation (cleaning, welding, etc)
Prohibited
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2.6 Pin Description
The pinout for SCC2130-D08 is presented in Figure 1, while the pin descriptions can be found in
Table 6.
Figure 1. Pinout for SCC2130-D08.
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Table 6. S CC2130-D08 pin descriptions.
Pin#
Name
Type
Description
1, 12,
13, 24
HEAT -
Heat sink connection, connect ex ternally to A V SS
2, 11
RESERVED
-
Factory us e only, leave floating
3 EXTRESN DIN
Ex ternal Reset, 3.3V logic compatible Schmitt-trigger input with internal
pull-up, LOW-HIGH transition causes sy stem restart. M inimum low time
100us
4
SCK
DIN
CLK signal of SPI Interface
5
MISO
DOUT
Data Out of SPI Interface
6 VBOOST AOUT_HV
Ex ternal capacitor connection for high v oltage analog supply ,
high voltage pad ≈30V
7 LBOOST AIN_HV
Connection for inductor for high v oltage generation,
high v oltage pad ≈30V
8
DVSS
GND
Digit al Supply Ret ur n, connec t ext er nally t o AVSS
9
DVDD
SUPPLY
Digital Supply V oltage
10
D_EXTC
AOUT
Ex ternal capacitor connection for digital core ( typ. 1.8V)
11
RESERVED
-
Factory us e only, leave floating
14
AVDD
SUPPLY
Analog S upply volt age
15
A_EXTC
AOUT
Ex ternal capacitor connection for positiv e reference v oltage
16
AVSS_REF
GND
A nalog reference ground, connect ex ternally to A V SS
17
AVSS
GND
Analog Supply Ret ur n, connec t ext er nally t o DVSS
18
CSB
DIN
Chip Selec t of S P I I nterface, 3.3V logic compatible Schmitt-trigger input
19
MOSI
DIN
Dat a In of S P I I nterfac e, 3. 3V logic c ompat ible Sc hmit t-trigger input
20
RESERVED
-
Factory us e only, leave floating or connect to GND
21
RESERVED
-
Factory us e only, leave floating or connect to GND
22
RESERVED
-
Factory us e only, leave floating
23
RESERVED
-
Factory us e only, leave floating
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2.7 Typi cal per f orm ance charact er i st i cs
2.7.1 Gy ro typical performance characteristics
Figure 2. SCC2130-D08 gyro t ypical out put temperature drift in °/s .
Figure 3. SCC2130-D08 gyro t ypical sens i tivi t y devi at i on from room t em perature val ue i n %.
Figure 4. SCC2130-D08 gy ro typi c al RM S noi se in ° / sRMS.
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Figure 5. SCC2130-D08 gyro A l l an devi at i on i n °/h.
Figure 6. SCC2130-D08 gyro t ypical cros s ax i s sensi tivi ty i n %.
Figure 7. SCC2130-D08 gyro t ypical G -sens i ti vi t y in (°/s )/ g.
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Figure 8. SCC2130-D08 gyro amplitude and phase response with 60Hz filter setting.
Figure 9. SCC2130-D08 gyro amplitude and phase response with 10Hz filter setting.
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2.7.2 Ac celero meter t ypical perform ance characteristics
Figure 10. S CC21 30-D08 accelerometer typical offset temperature drift mg (X-ax i s i n +1g ori entation).
Figure 11. S CC21 30-D08 acc el erom et er typi c al RM S noi se in m g RMS.
Figure 12. SCC2130-D08 acc el erom eter ty pi cal cros s ax i s sens i tivi t y in %.
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Figure 13. S CC21 30-D08 accelerometer amplitude and phase response with 60Hz filter setting.
Figure 14. SCC2130-D08 accelerometer amplitude and phase response with 10Hz filter setting.
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2.8 Dig ita l I/O Sp e c ific a tio n
Table 7 describes the DC characteristics of SCC2130-D08 sensor SPI I/O pins. Supply voltage is
3. 3 V unl ess otherwise spec i fied. Current flowi ng into t he circui t has a positive val ue.
Table 7. SPI DC characteristics.
Symbol
Description
Min.
Nom.
Max.
Unit
Serial Cl ock SCL K
VinHigh
Input high v oltage
2
DVDD+0.3
V
VinLow
Input low v oltage
-0.3
0.8
V
Vhy
I nput hysteresis
0.3
V
Ileak
Input leakage current, 0V ≤ Vin ≤ DVDD
-1
1
uA
Cin
I nput capac itance
15
pF
Chip select CSB (Pull Up), low active
VinHigh
Input high v oltage
2
DVDD+0.3
V
VinLow
Input low v oltage
-0.3
0.8
V
Vhy
I nput hysteresis
0.3
V
Isource
Input current source (Pull Up), V in = 0V
10
50
uA
Cin
I nput capac itance
15
pF
Vin_open
O pen c ir c uit out put volt age
2
V
Serial data input MOSI (Pull Down)
VinHigh
Input high v oltage
2
DVDD+0.3
V
VinLow
Input low v oltage
-0.3
0.8
V
Vhy
I nput hysteresis
0.3
V
Isource
Input current source (Pull Up), V in = DV DD
10
50
uA
Cin
I nput capac itance
15
pF
Vin_open
O pen c ir c uit out put volt age
0.3
V
Serial d ata o u tp u t MI SO (T ri state)
VoutHigh_-1mA
O utput high volt age, I out = -1mA
DVDD-0.5
V
VoutHigh_-50µA
O utput high volt age, I out = -50µA
DVDD-0.2
V
VinHigh_1mA
O utput low volt age, I out = +1mA
0.5
V
VinHigh_50µA
O utput low volt age, I out = +50µ A
0.3
V
Iout_Hz
High impedance output current,
0V < VM I S O < DVDD
-1
1
uA
Cld_miso
Capacitiv e load. The slope of the M ISO
output signal may need to be controlled to
meet EM I requirements under speci fied load
conditions.
200
pF
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2.9 SPI A C Charact er i st i cs
The AC charac t eri st i cs of S CC2130-D08 are defined in Figure 15 and Table 8.
Figure 15. Ti m i ng di agram of S P I c om m uni cat i on.
Table 8. S PI A C elect ri cal charac teri st i cs.
Symbol
Description
Min.
Nom.
Max.
Unit
FSPI
It is recommended to use max imum SCK frequency ,
see section 5.1.7 for more details.
0.1 8 MHz
TSPI
1/FSPI
TCH
High time: duration of logical high lev el at SCLK
45
TSPI/2
ns
T
CL
Low time: duration of logical low lev el at SCLK
45
T
SPI
/2
ns
TLS1
Setup time CSB: time between the falling edge of
CSB and the rising edge of SCLK
45 TSPI/2 ns
TVAL1
Delay t ime: t ime delay f r om t he falling edge of CSB
t o data valid at MI SO
30 ns
TSET
Setup time at M OSI: setup time of M OSI before the
rising edge of SCLK
15 ns
THOL
MOSI data hold time
8
ns
TVAL2
Delay t ime: t ime delay f r om f alling edge of S CLK to
dat a valid at MI S O
30 ns
TLS2
Hold time of CSB: time between the falling edge of
SCLK and the rising edge of CSB
45 TSPI/2 ns
TLZ
Tri-state delay time: time between the rising edge of
CSB t o MISO in Tri-state
15 ns
TLH
Time between SPI cy cles: minimum high time of
CSB between two consecutiv e transfers
250 ns
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2.10 Measurement Axis and D irections
Figure 16. SCC2130-D08 measurement directions.
Table 9. S CC2130-D08 accelerometer measurement directions.
x: 0g
y: 0g
z: +1g
x: +1g
y: 0g
z: 0g
x: 0g
y: 0g
z: -1g
x: 0g
y: -1g
z: 0g
x: -1g
y: 0g
z: 0g
x: 0g
y: +1g
z: 0g
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2.11 Package Characteristics
2.11.1 Package Outline Drawing
Figure 17. Package outline. The tolerances are according to ISO2768-f (see Table 10).
Table 10. Li m i ts for l i near m easures (IS O2768-f).
Tolerance
class
Li m its i n m m for nom i nal size i n m m
0. 5 to 3
Above 3 to 6
Above 6 to 30
Above 30 to 120
f (fin e )
±0.05
±0.05
±0.1
±0.15
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2.12 PCB Footprint
Figure 18. Recomm ended P WB pad l ayout for SCC2130-D08. The tolerances are according to
ISO2768-f (see Table 10).
2.13 Abbreviations
ASIC Appl i cat i on S peci fi c Int egrat ed Circui t
SPI Serial Peripheral Interface
RT Room Temperature
DPS Degrees per second
FS Full sc ale
CSB Chip Select
SCK Serial Cloc k
MOSI Mast er Out Slave In
MISO M ast er In Slave Out
MCU Microcontroller
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3 G eneral Pr oduct Descr i pt i on
The SCC2130-D08 sensor consists of independent acceleration and angular rate sensing
elements, and single Application-Specific Integrated Circuit (ASIC) used to sense and control those
elements. Figure 19 contains an upper level block diagram of the component. The ASIC provides
one common SPI interface used to control and read the accelerometer and the gyroscope.
Figure 19. SCC2130-D08 com ponent bl ock di agram .
The angular rate and acceleration sensing elements are manufactured using Murata proprietary
High Aspect Ratio (HAR) 3D-MEMS process, which enables making robust, extremely stable and
l ow noi se c apacitive sensors.
The acceleration sensing element consists of four acceleration sensitive masses. Acceleration
causes capac i tanc e change t hat i s c onvert ed i nto a vol t age change in the s i gnal conditioni ng A SIC.
The angular rate sensing element consists of moving masses that are purposely exited to in-plane
drive motion. Rotation in sensitive direction causes out of plane movement that can be measured
as capac i tanc e change wit h the s i gnal conditi oni ng ASIC.
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3.1 Factor y Cal i br at i on
SCC2130-D08 sensors are factory calibrated. No separate calibration is required in the application.
Parameters that are trimmed during production include sensitivities, offsets and frequency
responses. Calibration parameters are stored to non-volatile memory during manufacturing. The
parameters are read automatically from the internal non-vol atil e m em ory duri ng t he st art-up.
It should be noted that assembly can cause minor offset/bias errors to the sensor output. If best
possible offset/bias accuracy is required, system level offset/bias calibration (zeroing) after
assem bly i s recom m ended.
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4 Component Operation, Reset and Power Up
4.1 Component Operation
Simplified sensor power up sequence is shown in Figure 20 below. The SCC2130-D08 component
has internal power-on reset circuit. It releases the internal reset-signal once the power supplies are
within the specified range. After the reset, the sensor performs an internal startup sequence.
During the startup sequence SCC2130-D08 reads configuration and calibration data from the non-
volatile memory to volatile registers. 620ms after the power on or reset, sensor shall be able to
provide valid acceleration and angular rate data, separate measurement mode activation is not
needed.
Figure 20. Simplified reset and power up sequence.
Sensor uses 60Hz low pass filter setting by default. In case the optional 10Hz low pass filter is
used the filter setting can be set by writing the FLT bits to 01b in Status Summary register. See
section 6.2.8 for more information on Status Summary register. Section 5.1.4 shows full SPI write
frames for filter settings
SCC2130-D08 component has extensive internal failsafe diagnostics to detect over range and
possible internal failures. If the internal failsafe diagnostics are used they should be enabled by
clearing the status registers during component power up by following the sequence shown in
section 4.2 (Figure 21).
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4.2 Reset and Power Up Sequence For Enabling I nt ernal Fai l saf e Di agnost i cs
Reset and power up sequence for enabling component internal failsafe diagnostics is shown below
in Figure 21. After the reset, the sensor performs an internal startup sequence. 20 ms after the
reset the SPI bus becomes accessible and the output filter can be set to a desired value. If the filter
is not set to a valid value (60Hz or 10Hz setting), the default setting (00b = 60Hz) is used and the
S_OK_C flag in Status Summary Register will indicate a failure. In 750ms (10Hz filter setting) or in
620ms (60Hz filter selection) the acc el erom eter and the gyro s hal l be abl e t o deliver valid data.
During the startup sequence the sensor performs a series of internal tests that will set various error
fl ags i n the s ensor st atus regi s ters and to clear them i t i s nec essary t o read al l s tat us regist ers aft er
t he st art up sequence i s c om pl ete.
Once startup sequence is completed, the SPI frame Return Status bits (RS bits) indicate sensor
operation status. Normal operation is indicated with RS bit content of 01b. In case the LOOPF_OK
bi t i n Com m on S tatus regi st er is fai l i ng, the s ensor shoul d be reset and re-started.
Figure 21. Reset and power up sequence for enabling internal failsafe diagnostics.
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5 Component Interfacing
5.1 SPI I nt erf ace
5.1.1 General
The SCC2130-D08 has one common SPI interface for the accelerometer and the angular rate
sensor. SPI communication transfers data between the SPI master and registers of the SCC2130-
D08 ASIC. The SCC2130-D08 always operates as a slave device in master-slave operation mode.
3-wire SPI connection cannot be used.
SPI interface pins:
CSB Chip Sel ect (active l ow) MCU → ASIC
SCK Serial Clock MCU → ASIC
MOSI M aster Out S l ave In MCU → ASIC
MISO M aster In S l ave Out ASIC → MCU
5.1.2 Protocol
S PI c om m uni cat i on uses off-fram e prot ocol s o each t ransfer has two phases .
The first phase contains the SPI command (Request) and the data (Response) of the previous
command. The second phase contains the next Request and the Response to the Request of the
fi rs t phas e, s ee Figure 22.
Data word length is 32 bits, the data is transferred MSB first. The first response after reset is
undefined and shall be discarded.
Dat a word l ength is 32 bits . E ac h trans fer has t wo phases ().
1. F i rs t phas e cont ai ns the c om m and and the dat a of the previ ous com m and
2. Second phase contains the data from the command of the first phase.
The first res ponse after reset is undefi ned and shal l be di sc arded.
Figure 22. SP I prot ocol exam pl e.
The interleaved Request - Res ponse c ycl e then c onti nues as shown in Figure 23.
Figure 23. Request – Response frame relationship.
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The SPI transmission is always started with the CSB falling edge and terminated with the CSB
rising edge. The data is captured on the SCK's rising edge (MOSI line) and it is propagated on the
SCK’s falling edge (MISO line). This equals to SPI Mode 0 (CPOL = 0 and CPHA = 0), see Figure
24.
Figure 24. SP I Fram e Form at.
5.1.3 General Instruction form at
The SP I fram e is divi ded into four part s (See Figure 25 and Table 11):
1. Operation Code (OP)
2. Ret urn stat us (RS, in MISO )
3. Data (DI, DO)
4. Checks um (CRC)
Unus ed bi ts s hal l be set to 0, t hi s is im portant for t he checksum c al cul at i on.
Figure 25. SP I i nst ruc tion format.
Table 11. SPI bit definitions.
Bits
Name
MOSI
MISO
OP[5:0]
Operation code
Requested operation:
• OP5: Write =1 / Read = 0
• OP[4:0] = Register address
Performed operation:
• OP 5 : Wri te = 1 / Read = 0
• OP[4:0] = Register address
RS[1:0]
Return status
n.a.
Sensor status
D[15:0]
Data
Dat a to be writt en
Return data
CR[7:0]
Checksum
Checksum of MOSI bits [31:8]
Checksum of MISO bits [31:8]
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5.1.4 Operations
Table 12. Operations and their equivalent SPI frames.
Operation
Register
S PI Fram e
B inary (O P , RS, Data, CRC)
S PI Fram e
Hex
Read RA TE
RAT E (01h)
000001 00 0000000000000000 11110111
040000F7h
Read A CC_X
ACC_X (04h)
000100 00 0000000000000000 11101001
100000E9h
Read A CC_Y
ACC_Y (05h)
000101 00 0000000000000000 11101111
140000EFh
Read A CC_Z
ACC_Z (06h)
000110 00 0000000000000000 11100101
180000E5h
Read TEMP
TEMP (07h)
000111 00 0000000000000000 11100011
1C0000E3h
Read RATE Status 1
RATE Stat us 1
(09h)
001001 00 0000000000000000 11000111
240000C7h
Read RATE Status 2
RATE Stat us 2
(0Ah)
001010 00 0000000000000000 11001101
280000CDh
Read A CC Status
ACC Status (15h)
001111 00 0000000000000000 11010011
3C0000D3h
Write Reset Control
HardReset
Reset Control (16h)
110110 00 0000000000000100 00110001
D8000431h
Write Reset Control
MonitorST
Reset Control (16h)
110110 00 0000000000001000 10101101
D80008ADh
Read Serial ID0
Serial ID0 (18h)
011000 00 0000000000000000 10100001
600000A1h
Read Serial ID1
Serial ID0 (19h)
011001 00 0000000000000000 10100111
640000A7h
Read Common
Status
Common Status
(1Bh)
011011 00 0000000000000000 10101011
6C0000ABh
Read Status
Summary
Status Summary
(1Fh)
011111 00 0000000000000000 10110011
7C0000B3h
Write Flt[1:0] =10b:
set 60Hz f ilter ac tive
Status Summary
(1Fh)
111111 00 0010000000000000 00000110
FC200006h
Write Flt[1:0] =01b:
set 10Hz f ilter ac tive
Status Summary
(1Fh)
111111 00 0001000000000000 11000111
FC1000C7h
5.1.5 Return Status
SPI frame Return Status bits (RS bits) indicate the functional status of the sensor, see Return
Status definitions in Table 13.
Table 13. Return Stat us definitions.
RS[1]
Description
0
Initializ ation running
0
Normal operation of selected channel
1
Selftest of selected channel
1
Reserv ed or not ex isting register addressed , error of selected channel or common failure
(see Status Summary Register bits S_OK_C, S_OK_R, S_OK_A )
• S_OK_C is t he summar y of Common Status
• S_OK_R is the summary of RATE S tatus 1 and RATE Status 2
•
S_OK_A is the summary of ACC Status
The pri ori t y of t he return st atus s tat es is from hi gh to low: 10 → 00 → 11 → 01.
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5.1.6 Checksum (CRC)
For SPI transmission error detection a Cyclic Redundancy Check (CRC) is implemented, for details
see Table 14.
Table 14. SPI CRC definition.
Parameter
Value
Name
CRC-8
Width
8 bit
Poly
1Dh (generator poly nom: X 8+X 4+X 3+X 2+1)
Init
FFh (initialization v alue)
XOR out
FFh (inv ersion of CRC result)
The CRC register has to be initialized with FFh to ensure a CRC failure in case of stuck-at-0 and
stuck-at-1 error on the SPI bus. C-programming language example for CRC calculation is
presented in Figure 26. It can be used as i s i n an appropriate programm i ng contex t.
// Calculate CRC for 24 MSB's of the 32 bit dword
// (8 LSB's are the CRC field and are not included in CRC calculation)
uint8_t CalculateCRC(uint32_t Data)
{
uint8_t BitIndex;
uint8_t BitValue;
uint8_t CRC;
CRC = 0xFF;
for (BitIndex = 31; BitIndex > 7; BitIndex--)
{
BitValue = (uint8_t)((Data >> BitIndex) & 0x01);
CRC = CRC8(BitValue, CRC);
}
CRC = (uint8_t)~CRC;
return CRC;
}
static uint8_t CRC8(uint8_t BitValue, uint8_t CRC)
{
uint8_t Temp;
Temp = (uint8_t)(CRC & 0x80);
if (BitValue == 0x01)
{
Temp ^= 0x80;
}
CRC <<= 1;
if (Temp > 0)
{
CRC ^= 0x1D;
}
return CRC;
}
Figure 26. C-programming language example for CRC calculation.
CRC calculation example:
Read RATE register (01h) -> SP I[ 31:8] = 040000h -> CRC [7:0] -> F 7h.
Further exam ples can be found in Table 12.
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5.1.7 Recommendation for the SPI interfac e implementation
SPI communication may interfere with the measured angular rate signal due to sensor internal
capacitive coupling. If the harmonic overtones of the SPI communication activity are close to gyro
operational frequency, the SPI cross talk can be seen as increased noise level in angular rate
signal.
Cross talk can be eliminated by choosing the output data rate (sample rate) in a suitable way, i.e.
avoiding the overtones on the gyro operation frequency. For optimum performance it is
recommended that 2.3kHz or 3.2kHz output data rate is used with maximum serial clock (SCK)
frequency (8MHz). The design performance should be verified carefully.
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6 Re g is te r De finitio n
6.1 Sensor Data Bl ock
Table 15. Sensor data block.
Addr
OP[4:0]
Bits Register Name
No. of
Bits
Read/
Write
Description
01h
RATE
16
R
Rate output in 2's complement format
04h
ACC_X
16
R
X-axis acceleration output in 2's complement format
05h
ACC_Y
16
R
Y-axis acceleration output in 2's complement format
06h
ACC_Z
16
R
Z-axis acceler ation output in 2's complement format
07h [16:0] TEMP 16 R
Temperature sensor output in 2's complement
format. See section 2.4 for temperature conv ersion
equation.
SPI read frames with CRC content for these registers are shown in Table 12.
6.1.1 Exa mple of Angular Rate Data Conversion
For example, if RATE register read results: RATE = 05FFE08Bh, the register content is converted
t o angul ar rat e as foll ows:
• 05h = 000001 01b
o 000001b = operation code = Read RATE
o 01b = return st atus (RS bi ts ) = no error
• FFE0h = 1111 1111 1110 0000b = RATE register content
o FF E0h i n 2's com pl em ent format = -32d
o A ngul ar rat e = -32LS B / s ensitivi t y = -32LSB / (50LSB/(°/s)) = -0.64°/s
• 8Bh = CRC o f 05FFE0h
6.1.2 Exa mple of Acceleration Data Conversion
For example, if ACC_X register read results: ACC_X = 1100DC02h, the register content is
convert ed to ac celerati on rate as fol l ows :
• 11h = 000100 01b
o 000100b = operation code = Read ACC_X
o 01b = return st atus (RS bi ts ) = no error
• 00DCh = bin 0000 0000 1101 1100b = ACC_X regist er cont ent
o 00DCh i n 2's com plem ent format = 220d
o A cc el erat i on = 220LS B / sensi tivi t y = 220LS B / (1962LSB/g) = 0.112g
• 02h = CRC of 1100DCh
6.1.3 Exam ple of Tem perature Data Conversion
For example, if TEMP register read results: TEMP = 1DFE6F4Eh, the register content is converted
t o temperature as foll ows:
• 1Dh = bi n 000111 01b
o bin 000111b = operation code = Read TEMP
o 01 = return st atus (RS bi ts ) = no error
• FE6Fh = bin 1111 1110 0110 1111 = TEMP register content
o FE6Fh i n 2's compl em ent format = -401d
o Temperature = 60 + ( TEMP / 14.7) = 60 + [ -401/ 14. 7] = +32.7°C
o See section 2.4 for temperature conversion equation
• 4Eh = CRC o f 1DFE6Fh
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6.2 Sensor St at us Bl ock
Table 16. Sens or stat us block .
Addr
OP[4:0]
Bits Register Name
No. of
Bits
Read/
Write
Description
09h
RA TE Status 1
16
R
G yr o sensor status
0Ah
RA TE Status 2
16
R
G yr o sensor status
0Fh
AC C Sta tu s
16
R
Accelerometer status
15h
Test
16
R/W
R/W register for SPI communica tion checking
16h
Reset Control
16
R/W
Reset status and trigger bits
18h
Serial ID0
16
R
Component seria l numb er least significant bits
19h
Serial ID1
16
R
Component seria l numb er most significa nt bits
1Bh
Common Status
16
R
Status of common blocks
1Dh
Identification
16
R
Product type Identificati on
1Fh
Status Summary
16
R/W
Status overview
Note:
R/W for the register means, that the content of the register can be read, and that it is also possible
to over write the content of the register in normal mode operation. The following signal blocks will
then operate with the value written to the register. After a write cycle to the register, the register will
keep its val ue unt i l another wri t e cy cle or reset occurs .
S PI read and write fram es wi t h CRC cont ent for t hese regi st ers are shown i n Table 12.
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6.2.1 RATE Statu s 1 Register (09h)
Table 17. RAT E Status 1 register.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
-
-
-
-
-
-
-
-
-
Write
VCMF_OK
Vboost_OK
Reserved[7:0]
SDM_D_OK
dQ_Amp_OK
dDR_Amp_OK
Q_AmpCtrl_OK
DR_AmpCtrl_OK
OF_R_OK
Read
RATE Status 1 register indicates saturation or failure in gyroscope. Failure is indicated by setting
OK flag to 0, t he condi t i on wi ll be l atc hed unti l a read cycl e on the register.
Table 18. RATE Status 1 regi ster bit descri pti on.
Register Bit
Description
OF_R_OK
This bit indicates signal path saturation and ov erflow conditions
DR_AmpCtrl_OK
Status o f d riv e amplitude control
Q_AmpCtrl_OK
Status of compensation signal ampli tude control
dDR_Amp_OK
Status of dr ive amplit ude
dQ_Amp_OK
Status of compensation signal amplitude
SDM_D_OK
St atus of drive pat h st ability
VBoost_OK
Status of VBoost volt age
VCMF_OK
Status of bias ing voltage
6.2.2 RATE Statu s 2 Register (0Ah)
Table 19. RA TE Stat us 2 regi st er.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
-
-
-
-
-
-
-
-
-
-
Write
Reserved[6:0]
S_P_Pk_OK
S_N_OK
S_P_OK
D_N_OK
D_P_OK
SI_N_OK
SI_P_OK
DI_N_OK
DI_P_OK
Read
RATE Status 2 register indicates saturation or failure in gyroscope. Failure is indicated by setting
OK flag to 0, t he condi t i on wi ll be l atc hed unti l a read cycl e on the register.
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Table 20. RA TE Stat us 2 regi st er bit des cripti on.
Register Bit
Description
DI_P_OK
Indicates saturation or failure condition
DI_N_OK
Indicates saturation or failure condition
SI_P_OK
Indicates saturation or failure condition
SI_N_OK
Indicates saturation or failure condition
D_P_OK
Indicates saturation or failure condition
D_N_OK
Indicates saturation or failure condition
S_P_OK
Indicates saturation or failure condition
S_N_OK
Indicates saturation or failure condition
S_P_Pk_OK
Indicates saturation or failure condition
6.2.3 ACC Status Register (0Fh)
Table 21. ACC S tatus regi ster.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
-
-
-
-
-
-
-
Write
Reserved[8:0]
C2V_VREF_OK
Reserved[2:0]
OF_ACC_OK
ADC_SAT_OK
SAT_OK
STC_OK
Read
ACC Status register indicates saturation or failure in accelerometer. Failure is indicated by setting
OK flag to 0, t he condi t i on wi ll be l atc hed unti l a read cycl e on the register.
Table 22. ACC S tatus regi ster bit descri ption.
Register Bit
Description
STC_OK
Indicates saturation or failure condition
SAT_OK
Indicates saturation or failure condition
ADC_SAT_OK
Indicates saturation or failure condition
OF_ACC_OK
Indicates saturation or failure condition
C2V_VREF_OK
Status of referenc e vol tage
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6.2.4 Reset Control Register (16h)
Table 23. Reset Control register.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
Reserved[11:0]
MonitorST
HardReset
Reserved[1:0]
Write
-
-
Read
Table 24. Reset Control register bi t description.
Register Bit
Description
HardReset
Writing this bit t o 1 generates an EX TRESN compatible signal . Thus it is
possibl e to generate hardware reset via SPI interface
MonitorST
Writing this bit to 1 initiates self test of internal monitoring circuit
6.2.5 Serial ID0 a nd Serial ID1 Registers (18h and 19h)
SCC2130-D08 serial number is laser marked on top of component lid and stored in to Serial ID0
and Serial ID1 registers. Serial number is in 32bit unsigned integer format. Serial number register
bit descriptions are shown below in Table 25 and Table 26.
Table 25. Serial ID0 (18h) register (serial num ber LS B word).
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Write
ID0[15:0] Read
Table 26. Serial ID1 (19h) register (serial number MSB word).
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Write
ID1[15:0] Read
Example serial number conversion shown below:
• Serial ID0 register content: 8612h = bin 1000 0110 0001 0010
• Serial ID1 register content: 8FB9h = bin 1000 0110 0001 0010
• Full serial number: 8FB9 8612h = 2411300370
• S eri al num ber laser marked on li d is 2411300370SCC
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6.2.6 Common Status Register (1Bh)
Table 27. Com m on S tat us register.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Write
NMode_OK
MonCheck_OK
CRC_OTP_OK
CRC_SPI_OK
OF_C_OK
StateMon[3:0]
LOOPF_OK
TEMP_Mon_OK
VBG2_0P9V_OK
Reserved
VDDD_OK
VBG1_0P9V_OK
DVDD_OK
Read
Common Status register indicates failure in common signals/blocks. Failure is indicated by setting
OK flag to 0, t he condi t i on wi ll be l atc hed unti l a read cycl e on the register.
Table 28. Com m on S tat us register bit descri pti on.
Register Bit
Description
DVDD_OK
Status of DV DD digital 3.3V supply v oltage
VBG1_0P9V_OK
Status of internal reference voltage
VDDD_OK
Status o f d igital core supply v oltage
VBG2_0P9V_OK
Status of internal reference voltage
TEMP_Mon_OK
Status of temperature sensor signal
LOOPF_OK
Status of loop filter
StateMon[3:0]
Status of state machine for self test of monitoring circuit.
OF_C_OK
This bit indicates signal path saturation and ov erflow conditions related
to common signals/blocks
CRC_SPI_OK
This bit indicates CRC failure in SPI com m unication
CRC_OTP_OK
This bit indicates CRC failure in OTP memory
MonCheck_OK
Result of the monitoring circuit self test
NMode_OK
Bit = 0 : ASIC test mode activ ated
Bit = 1 : ASIC is in normal mode
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6.2.7 Identification Register (1Dh)
Table 29. Identification register.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Write
Identification[15:0] Read
Table 30. Identi ficat i on regi ster bit descri pti on.
Register Bit
Description
Identification
Default v alue: 001Dh (bin 0000 0000 0001 1101) f or S CC2130-D08
6.2.8 Sta tu s Su mmary Register (1Fh)
Table 31. S tat us Summ ary register.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
- -
Flt[1:0]
- - - - - - Write
STC_EN
SelfTestDis
Reserved[5:0]
S_OK_C
Reserved[1:0]
S_OK_A
Reserved[1:0]
S_OK_R
Read
Table 32. Ident i ficat i on regi ster bit descri pti on.
Register Bit
Description
S_OK_R
Sensor status summary flag for gyro
S_OK_A
Sensor status summary flag for accelerometer
S_OK_C
Status summary flag for common blocks and functionali ties
Flt[1:0]
O utput Filt er S elec tion:
00b: 60Hz f ilter active for ACC and GYRO s ignal (default after reset),
with Flt default setting S_OK_C is set to 0
01b: 10Hz f ilter ac tive f or ACC and GYRO signals
10b: 60Hz f ilter ac tive f or ACC and GYRO signal
11b: Reserved
SelfTestDis
SelfTestDis=‘1’ indicates that the self test of the monitoring circuit is
disabled.
STC_EN
STC_EN=‘1’ indicates that the accelerometer self test is enabled.
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7 Application information
7.1 A ppl i cat i on Ci r cui t ry and Exter nal Component Charact er i st i cs
See Figure 27 and Table 33 for specification of the external components. The PCB layout example
i s shown in Figure 28.
Figure 27. Appli cat i on schem at i c.
Table 33. External component description for SCC2130-D08.
Symbol
Description
Unit
C1
High v oltage capacitor.
Voltage rating
ESR
Rec ommended c omponent:
Murata G CM21BR71H474KA55, 0805, 470N, 50V, X7R
30
100
nF
V
mΩ
C2
Decoupling capacitor between DV DD and DV SS
ESR
Rec ommended c omponent:
Murata G CM21BR71C105KA58, 0805, 1U, 16V, X7R
100
nF
mΩ
C3
Decoupling capacitor between D_EX TC and DV SS
ESR
Rec ommended c omponent:
Murata G CM21BR71C105KA58, 0805, 1U, 16V, X7R
100
nF
mΩ
C4
Decoupling capacitor between A V DD and A V SS
ESR
Rec ommended c omponent:
Murata G CM188R71C104KA37, 0603, 100N, 16V, X7R
100
nF
mΩ
C5
Decoupling capacitor between A _EX TC and A V SS
ESR
Rec ommended c omponent:
Murata G CM21BR71C105KA58, 0805, 1U, 16V, X7R
100
nF
mΩ
C6, C7
Optional decoupling capacitor
ESR
Rec ommended c omponent:
Murata GRM32ER71A476KE15L, 1210, 47U, 10V, X7R
100
µF
mΩ
L1
Inductance for high v oltage generation from V in_Boost
ESR
Rec ommended c omponent:
Bourns C M 322522-470KL
5
µH
Ω
(Vin_Boost)
Murata Electronics O y SCC2130-D08 37/38
www.murata.com Doc.Nr. 82 1775 00 Rev. B0
Subj ect to changes
Figure 28. Appli cat i on P CB l ayout .
General circuit diagram and PCB layout recommendations for SCC2130-D08 (refer to Figure 27
and Figure 28):
1. Connec t dec oupl i ng SM D capac i tors (C1 - C5) right next to res pect i ve component pins.
2. Locate ground plate under component.
3. Do not route signals or power supplies under the component on top layer.
4. Minimize the trace length between the L1 inductor and LBOOST pin (pin 7).
5. Ensure good ground connec tion of DV SS , AVS S _RE F and A VSS pi ns (pi ns 8, 15, 16).
6. For optimum performance the use of decoupling capacitors C6 and C7 is recommended.
Capac i tor C6 s houl d be l ocat ed close t o C2 and C7 cl os e to C4.
7.2 Assembly Instructio ns
Usage of PCB coating materials may effect component performance. The coating material and
coating process used should be validated. For additional assembly related details please refer to
“Technical Note 96” for assembly instructions:
TN96_Assembly_Instructions_for_SCC2000_Series
Murata Electronics O y SCC2130-D08 38/38
www.murata.com Doc.Nr. 82 1775 00 Rev. B0
Subj ect to changes
8 Orde r info rmatio n
Table 34. SCC2130-D08 order codes wit h packi ng quantity.
O r der c ode
Description
Qty
SCC2130-D08-004
Gyro (X-ax is ±125dps) accelerome ter (±6g) combo with digital SPI i/f
4pcs
SCC2130-D08-05
Gyro (X-ax is ±125dps) accelerome ter (±6g) combo with digital SPI i/f
50pcs
SCC2130-D08-6
Gyro (X-ax is ±125dps) accelerome ter (±6g) combo with digital SPI i/f
600pcs