UC1707 UC2707 UC3707 Dual Channel Power Driver FEATURES DESCRIPTION * Two independent Drivers The UC1707 family of power drivers is made with a high-speed Schottky process to interface between low-level control functions and high-power switching devices - particularly power MOSFETs. These devices contain two independent channels, each of which can be activated by either a high or low input logic level signal. Each output can source or sink up to 1.5A as long as power dissipation limits are not exceeded. * 1.5A Totem Pole Outputs * Inverting and Non-Inverting Inputs * 40ns Rise and Fall into 1000pF * High-Speed, Power MOSFET Compatible * Low Cross-Conduction Current Spike * Analog Shutdown with Optional Latch * Low Quiescent Current * 5V to 40V Operation * Thermal Shutdown Protection * 16-Pin Dual-In-Line Package * 20-Pin PLCC and CLCC Package Although each output can be activated independently with its own inputs, it can be forced low in common through the action either of a digital high signal at the Shutdown terminal or a differential low-level analog signal. The Shutdown command from either source can either be latching or not, depending on the status of the Latch Disable pin. Supply voltage for both VIN and VC can independently range from 5V to 40V. These devices are available in two-watt plastic "bat-wing" DIP for operation over a 0C to 70C temperature range and, with reduced power, in a hermetically sealed cerdip for -55C to +125C operation. Also available in surface mount DW, Q, L packages. TRUTH TABLE (Each Channel) BLOCK DIAGRAM 03/99 INV. N.I. OUT OUT = INV and N.I. H H L OUT = INV or N.I. L H H H L L L L L UC1707 UC2707 UC3707 CONNECTION DIAGRAMS ABSOLUTE MAXIMUM RATINGS Supply Voltage, VIN, N/J-Pkg . . . . . . . . . . . . . . . . . . . . . . . 40V Collector Supply Voltage, VC, N/J-Pkg . . . . . . . . . . . . . . . 40V Output Current (Each Output, Source or Sink) Steady-State, N/J-Pkg. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mA Peak Transient N-Pkg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5A J-Pkg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0A Capacitive Discharge Energy N-Pkg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mJ J-Pkg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15mJ Digital Inputs (See Note), N/J-Pkg . . . . . . . . . . . . . . . . . . . 5.5V Analog Stop Inputs, N/J-Pkg . . . . . . . . . . . . . . . . . . . . . . . . VIN Power Dissipation at TA = 25C (See Note) N-Pkg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2W J-Pkg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W Power Dissipation at T (Leads/Case) = 25C (See Note) N-Pkg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5W J-Pkg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2W Operating Temperature Range . . . . . . . . . . . . -55C to +125C Storage Temperature Range . . . . . . . . . . . . . -65C to +150C Lead Temperature (Soldering, 10 Seconds) . . . . . . . . . . 300C DIL-16, SOIC-16 (TOP VIEW) J or N Package, Note: All four ground pins must be connected to a common ground. Note: All voltages are with respect to the four ground pins which must be connected together. All currents are positive into, negative out of the specified terminal. Digital Drive can exceed 5.5V if input current is limited to 10mA. Consult Packaging section of Databook for thermal limitations and considerations of package. PLCC-20, LCC-20 (TOP VIEW) Q, L Packages N/C INPUT B INV. INPUT B I.N. INPUT A INV. INPUT A NON INV. 3 2 1 20 19 LATCH DISABLE 4 18 VIN GROUND 5 17 GROUND N/C 6 16 N/C GROUND 7 15 GROUND OUTPUT A 8 14 OUTPUT B 9 SHUTDOWN VC 10 11 12 13 ANALOG STOP INV. ANALOG STOP NON INV. N/C 2 UC1707 UC2707 UC3707 ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for TA = -55C to +125C for the UC1707, -25C to +85C for the UC2707 and 0C to +70C for the UC3707; VIN = VC = 20V. TA = TJ. PARAMETERS TEST CONDITIONS MIN TYP MAX UNITS VIN Supply Current VIN = 40V 12 15 mA VC = 40V, Outputs Low 5.2 7.5 mA VC Supply Current VIN =0, VC =30V, No Load .05 0.1 mA VC Leakage Current Digital Input Low Level 0.8 V Digital Input High Level 2.2 V -0.06 -1.0 mA Input Current VI = 0 .05 0.1 mA Input Leakage VI = 5V IO = -50mA 2.0 V Output High Sat., VC-VO 2.5 V IO = -500mA IO = -50mA 0.4 V Output Low Sat., VO 2.5 V IO = -500mA 100 130 160 mV Analog Threshold VCM = 0 to 15V -10 -20 A Input Bias Current VCM = 0 Thermal Shutdown 155 C Shutdown Threshold Pin 7 Input 0.4 1.0 2.2 V Latch Disable Threshold Pin 3 Input 0.8 1.2 2.2 V TYPICAL SWITCHING CHARACTERISTICS: VIN = VC = 20V, TA = 25C. Delays measured to 10% output change. PARAMETERS From Inv. Input to Output Rise Time Delay 10% to 90% Rise Fall Time Delay 90% to 10% Fall From N.I. Input to Output Rise Time Delay 10% to 90% Rise Fall Time Delay 90% to 10% Fall VC Cross-Conduction Current Spike Duration Analog Shutdown Delay Digital Shutdown Delay TEST CONDITIONS Output Rise Output Fall Stop non-Inv. = 0V Stop Inv. = 0 to 0.5V 2V Input on Pin 7 3 OUTPUT CL = open 1.0 2.2 40 50 60 25 40 50 30 40 50 25 40 50 30 25 45 25 25 0 180 180 50 40 40 55 40 50 50 65 50 UNITS nF ns ns ns ns ns ns ns ns ns ns ns ns ns UC1707 UC2707 UC3707 SIMPLIFIED INTERNAL CIRCUITRY The input common-mode voltage range is from ground to (VIN-3V). When not used both inputs shoul1d be grounded. Activate time is a function of overdrive with a typical value of 180ns. Pin 7 serves both as a comparator output and as a common digital shutdown input. A high signal here will accomplish the fastest turn off of both outputs. Note that "OFF" is defined as the outputs low. Pulling shutdown low defeats the latch operation regardless of its status. Figure 1. Typical digital input gate. The Shutdown latch is disabled when pin 3 is open. An impedance of 4k or less from pin 3 to ground will allow a shutdown signal to set the latch which can then be reset by either recycling the VIN supply or by momentarily (>200ns) raising pin 3 high. The input zener may be used to clamp input signal voltages higher than 5V as long as the zener current is limited to 10mA max. External pull-up resistors are not required. Figure 2. Typical digital input gate. Figure 3. Latch disable. 4 UC1707 UC2707 UC3707 SIMPLIFIED INTERNAL CIRCUITRY (cont.) Figure 4. Transformer coupled push-pull MOSFET drive circuit. The Analog shutdown can give pulse-by-pulse current limiting with a reset pulse from the clock output of the UC1524. R1C1 is used to filter leading edge spikes. Figure 5. Current limiting. 5 UC1707 UC2707 UC3707 APPLICATIONS With an external reference, the shutdown comparator can be used for over-voltage protection. R1 and R2 set the shutdown level while R3 adds positive feedback for hysteresis. Figure 6. Over-voltage protection. When driven with a TTL square wave drive, the low output impedance of the UC1707 allows ready implementation of charge pump voltage converters. Figure 8. Charge pump circuits. D1, D2: UC3611 Schottky Diodes Figure 7. Power MOSFET drive circuit. D1, D2: UC3611 Schottky Diodes Figure 9. Power bipolar drive circuit. 6 UC1707 UC2707 UC3707 TRANSFORMER COUPLING D1, D2: UC3611 Schottky Diode Figure 10. Transformer coupled MOSFET drive circuit. D1, D2: UC3611 Schottky Diode Figure 11. Power MOSFET drive circuit using negative bias voltage and level shifting to ground reference PWM. UNITRODE CORPORATION 7 CONTINENTAL BLVD. * MERRIMACK, NH 03054 TEL. (603) 424-2410 * FAX (603) 424-3460 7 PACKAGE OPTION ADDENDUM www.ti.com 5-Feb-2007 PACKAGING INFORMATION (1) Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) 5962-87619012A ACTIVE LCCC FK 20 1 TBD 5962-8761901EA ACTIVE CDIP J 16 1 TBD POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type 5962-8761901V2A ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type 5962-8761901VEA ACTIVE CDIP J 16 1 TBD Call TI N / A for Pkg Type UC1707J ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type UC1707J/80313 OBSOLETE CDIP J 16 TBD Call TI Call TI UC1707J/80900 ACTIVE CDIP J 16 TBD Call TI Call TI UC1707J883B ACTIVE CDIP J 16 TBD A42 SNPB UC1707JQMLV ACTIVE CDIP J 16 UC1707L ACTIVE LCCC FK 20 UC1707L/81032 ACTIVE LCCC FK 20 UC1707L/81040 ACTIVE LCCC FK 20 UC1707L883B ACTIVE LCCC FK 20 1 TBD UC2707DW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2707DWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2707DWTR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2707DWTRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 1 TBD 1 TBD TBD TBD Call TI N / A for Pkg Type Call TI POST-PLATE N / A for Pkg Type Call TI Call TI Call TI Call TI POST-PLATE N / A for Pkg Type UC2707J ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type UC2707N ACTIVE PDIP N 16 25 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC2707NG4 ACTIVE PDIP N 16 25 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC2707Q ACTIVE PLCC FN 20 46 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR UC3707DW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3707DWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3707DWTR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3707DWTRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3707J ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type UC3707N ACTIVE PDIP N 16 25 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3707NG4 ACTIVE PDIP N 16 25 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3707Q ACTIVE PLCC FN 20 46 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR UC3707QG3 ACTIVE PLCC FN 20 46 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR The marketing status values are defined as follows: Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 5-Feb-2007 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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