2N6790 - Intersil Corporation

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

2N6790

3.5A, 200V, 0.800 Ohm, N-Channel Power

MOSFET

The 2N6790 is an N-Channel enhancement mode silicon

gate power MOS ﬁeld effect transistor designed for

applications such as switching regulators, switching

converters, motor drivers, relay drivers, and drivers for high

power bipolar switching transistors requiring high speed and

low gate drive power. This device can be operated directly

from an integrated circuit.

Features

• 3.5A, 200V

•r

DS(ON) = 0.800Ω

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Majority Carrier Device

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

Components to PC Boards”

Symbol

Packaging

JEDEC TO-205AF

Ordering Information

PART NUMBER PACKAGE BRAND

2N6790 TO-205AF 2N6790

NOTE: When ordering, include the entire part number.

SOURCE

DRAIN

(CASE)

GATE

Data Sheet November 1998 File Number

1900.2

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Speciﬁed 2N6790 UNITS

Drain to Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS 200 V

Drain to Gate Voltage (RGS = 20kΩ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR 200 V

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID3.5 A

TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID2.25 A

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

DM 14 A

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

GS 20 V

Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IS3.5 A

Pulse Source Current (Body Diode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM 14 A

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD20 W

Above TC = 25oC, Derate Linearly. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.16 W/oC

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg 300

260

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe

device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTE:

1. TJ= 25oC to 125oC.

Electrical Speciﬁcations TC = 25oC, Unless Otherwise Speciﬁed

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BVDSS ID = 0.25mA, VGS = 0V 200 - - V

Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 1.0mA 2 - 4 V

Zero-Gate Voltage Drain Current IDSS VDS = 200V, VGS = 0V - - 250 µA

VDS = 160V, VGS = 0V TC = 125oC - - 1000 µA

Gate to Source Leakage Current IGSS VGS = ±20V, VDS = 0 - - 100 nA

Drain to Source On-Voltage (Note 2) VDS(ON) ID = 3.5A, VGS = 10V - - 2.8 V

Drain to Source On Resistance rDS(ON) ID = 2.25A, VGS = 10V - .5 0.800 Ω

ID = 2.25A, VGS = 10V TC = 125oC - - 1.5 Ω

Diode Forward Voltage VSD IS = 3.5A, VGS = 0V 0.7 - 1.5 V

Forward Transconductance (Note 2) gfs ID = 2.25A, VDS = 5V 1.5 2.25 4.5 S

Input Capacitance CISS VGS = 0V, VDS = 25V

f = 1MHz 200 450 600 pF

Output Capacitance COSS 60 150 300 pF

Reverse-Transfer Capacitance CRSS 15 40 80 pF

Turn-On Delay Time td(ON) ID= 2.25A

VGS ≅ 74V, RG = 50Ω- - 40 ns

Rise Time tr- - 50 ns

Turn-Off Delay Time td(OFF) - - 50 ns

Fall Time tf- - 50 ns

Safe Operating Area SOA VDS = 160V, ID = 125mA 20 - - W

VDS = 5.7V, ID = 3.5A 20 - - W

Thermal Resistance Junction to Case RθJC - - 6.25 oC/W

Thermal Resistance Junction to Ambient RθJA Free Air Operation - - 175 oC/W

Source to Drain Diode Speciﬁcations

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Reverse Recovery Time trr TJ = 150oC, ISD = 3.5A, dlSD/dt = 100A/ s 350 - ns

Reverse Recovered Charge QRR TJ = 150oC, ISD = 3.5A, dlSD/dt = 100A/ s 2.3 - C

NOTES:

2. Pulse test: pulse width ≤300µs, duty cycle ≤2%.

3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).

2N6790

Typical Performance Curves

Unless Otherwise Speciﬁed

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

FIGURE 4. FORWARD BIAS SAFE OPERATING AREAS FIGURE 5. OUTPUT CHARACTERISTICS

TC, CASE TEMPERATURE (oC)

POWER DISSIPATION MULTIPLIER

00 25 50 75 100 150

0.2

0.4

0.6

0.8

1.0

1.2

125 TC, CASE TEMPERATURE (oC)

50 75 10025 150

ID, DRAIN CURRENT (A)

125

ZθJC, NORMALIZED

1.0

0.1

0.01 10-2

10-5 10-4 10-3 0.1 1 10

T1, RECTANGULAR PULSE DURATION (s)

NOTES:

DUTY FACTOR: D = t1/t2

PEAK TJ= PDM x ZθJC x ZθJC x RθJC + TC

PDM

t1t2

0.01

0.5

0.2

0.1

0.05

0.02

SINGLE PULSE

THERMAL IMPEDANCE

0.05 1 10 100 1000

ID, DRAIN CURRENT (A)

OPERATION IN THIS AREA

LIMITED BY rDS(ON)

VDS, DRAIN TO SOURCE (V)

100ms

100µs

1.0ms

10ms

10µs

0.1 TC = 25oC

TJ = MAX RATED

SINGLE PULSE

VDS, DRAIN TO SOURCE VOLTAGE (V)

25 50 750 100

ID, DRAIN CURRENT (A)

10V

80µs PULSE TEST

VGS = 6V

2N6790

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

Typical Performance Curves

Unless Otherwise Speciﬁed (Continued)

VDS, DRAIN TO SOURCE VOLTAGE (V)

2468010

ID, DRAIN CURRENT (A)

10V

VGS = 7V

80µs PULSE TEST 9V

ID(ON), ON-STATE DRAIN CURRENT (A)

24 8

VGS, GATE TO SOURCE VOLTAGE (V)

125oC

25oC

-55oC

VDS > ID(ON) x rDS(ON) MAX

80µs PULSE TEST

rDS(ON), DRAIN TO SOURCE ON

ID, DRAIN CURRENT (A)

1.0

0.5

001015

RESISTANCE (Ω)

VGS = 20V

VGS = 10V

1.5

205

PULSE DURATION = 2.0µs

INITIAL TJ = 25oC

1.4

1.0

0.6

-40 0 40 120 150

TJ, JUNCTION TEMPERATURE (oC)

NORMALIZED ON RESISTANCE

2.2

0.2 80

1.8 VGS = 10V

ID= 2A

1.25

1.05

0.85

0 160

TJ, JUNCTION TEMPERATURE (oC)

NORMALIZED DRAIN TO SOURCE

1.15

0.95

0.75 -40 40 80 120

BREAKDOWN VOLTAGE

VDS, DRAIN TO SOURCE VOLTAGE (V)

C, CAPACITANCE (pF)

1000

800

600

400

200

010

CISS

COSS

CRSS

20 30 40 50

VGS = 0V, f = 1MHz

CISS = CGS + CGD

CRSS = CGD

COSS = CDS + CGD

2N6790

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

Typical Performance Curves

Unless Otherwise Speciﬁed (Continued)

ID, DRAIN CURRENT (A)

2468010

3.75

3.0

2.25

1.50

gfs, TRANSCONDUCTANCE (S)

80µs PULSE TEST

0.75

TJ = 125oC

TJ = 25oC

TJ = -55oC

12 14

4.25

5.0

TJ = 150oC

IDR, REVERSE DRAIN CURRENT (A)

VSD, SOURCE TO DRAIN VOLTAGE (V)

102

101234

TJ = 25oC

TJ = 150oC

TJ = 25oC

Qg, TOTAL GATE CHARGE (nC)

4 8 12 16020

VGS, GATE TO SOURCE VOLTAGE (V)

VDS = 160V

VDS = 100V

VDS = 40V

ID = 7A

2N6790

Test Circuits and Waveforms

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

VGS

0.01Ω

IAS

VDS

VDD

DUT

VARY tP TO OBTAIN

REQUIRED PEAK IAS

VDD

VDS

BVDSS

IAS

tAV

VGS

DUT

-VDD

tON

td(ON)

90%

10%

VDS 90%

10%

td(OFF)

tOFF

90%

50%

10% PULSE WIDTH

VGS

0.3µF

12V

BATTERY 50kΩ

VDS

DUT

IG(REF)

(ISOLATED

VDS

0.2µF

CURRENT

REGULATOR

ID CURRENT

SAMPLING

IG CURRENT

SAMPLING

SUPPLY)

RESISTOR RESISTOR

SAME TYPE

AS DUT Qg(TOT)

Qgd

Qgs

VDS

VGS

VDD

IG(REF)

2N6790

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certiﬁcation.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-

out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

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2N6790