Rev.2.00, Jul.16.2004, page 1 of 11
HD26LS31
Quadruple Differential Line Drivers With 3 State Outputs
REJ03D0294–0200Z
(Previous ADE-205-576 (Z))
Rev.2.00
Jul.16.2004
Description
The HD26LS31 features quadruple differential line drivers which satisfy the requirements of EIA standard RS-422A.
This device is designed to p r ovide differential signals with high current capability on bus lines. The circuit provides
enable input to control all four drivers. The output circuit has acti ve pul l up and pull down and is capable of sinking or
sourcing 40 mA.
Features
• Ordering Information
Part Name Package Type Package Code Package
Abbreviation Taping Abbreviation
(Quantity)
HD26LS31P DILP-16 pin DP-16E, -16FV P —
Logic Diagram
1A
2A
3A
4A
Enable G
Enable G
1Y
1Z
2Y
2Z
3Y
3Z
4Y
4Z
HD26LS31
Rev.2.00, Jul.16.2004, page 2 of 11
Pin Arrangement
(Top view)
1
2
3
4
5
6
7
1A
GND
1Y
1Z
2Z
8
Enable G
2Y
2A
13
14
15
10
11
12
9
16 VCC
4A
4Y
4Z
Enable G
3Z
3Y
3A
Function Table
Input Enables Outputs
AG G
GG
GYZ
HH X H L
LH X L H
HX L H L
LXLLH
XL H Z Z
H : High level
L : Low level
X : Irrelevant
Z : High impedance (Off)
Absolute Maximum Ratings
Item Symbol Ratings Unit
Supply Voltage VCC 7.0 V
Input Voltage VIN 7.0 V
Output Voltage VOUT 5.5 V
Power Dissipation PT1W
Storage Temperature Range Topr 0 to +70 °C
Lead Temperature Range Tstg –65 to +150 °C
Note: 1. The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two
of which may be realized at the same time.
Recommended Operating Conditions
Item Symbol Min Typ Max Unit Application Terminal
Supply Voltage VCC 4.75 5.0 5.25 V VCC
Output Current IOH — — –40 mA All Output
Output Current IOL ——40mAAll Output
Operating Temperature Topr 0 25 70 — —
HD26LS31
Rev.2.00, Jul.16.2004, page 3 of 11
Electrical Characteristics (Ta = 0 to +70°C)
Item Symbol Min Typ*1Max Unit Application
Terminal Conditions
Input Voltage VIH 2.0 — — V All Inputs
VIL ——0.8
Input Clamp Voltage VIK — — –1.5 VCC = 4.75 V, II = –18 mA
Output Voltage VOH 2.5 — — All Outputs VCC = 4.75 V IOH = –20 mA
VOH ——2.4 I
OH = –40 mA
VOL ——0.5 I
OL = 40 mA
Output Current IOZL — — –20 mA VCC = 5.25 V VO = 0.5 V
IOZH ——20 V
CC = 5.25 V VO = 2.5 V
Input Current II— — 0.1 mA All Inputs VCC = 5.25 V VI = 7 V
IIH ——20µA V
I = 2.7 V
IIL — — –0.36 mA VI = 0.4 V
Short Circuit Output
Current
IOS*2–30 — –150 All Outputs VCC = 5.25 V
Supply Current ICC —3280 V
CC VCC = 5.25 V
Notes: 1. All typical values are at VCC = 5 V, Ta = 25°C
2. Not more than one output should be shorted at a time and duration of the short circuit should not exceed one
second.
Switching Characteristics (VCC = 5 V, Ta = 25°C)
Item Symbol Min Typ Max Unit Application
terminal Test
circuit Conditions
Propagation Delay Time tPLH — 14 20 ns All Outputs 1 CL = 30 pF
tPHL —1420ns
Output Enable Time tZH —2540ns 2 C
L = 30 pF, RL = 75 Ω
tZL —3745ns 3 C
L = 30 pF, RL = 180 Ω
Output Disable Time tHZ —2130ns 2 C
L = 10 pF
tLZ —2335ns 3 C
L = 10 pF
Complementary Output To
Output
Skew —16ns 1 C
L = 30 pF
HD26LS31
Rev.2.00, Jul.16.2004, page 4 of 11
Test Circuit 1
Output
Output
AZ
Y
Pulse Generator
PRR = 1MHz
Duty Cycle 50%
Zout = 50Ω
Input
G
G
4.5 V
C =
30 pF
L
C =
30 pF
L
Note: 1. CL includes probe and jig capacitance.
Waveforms
Input
0.3 V
2.7 V
1.3 V
0 V
3 V
1.3 V
Output Y
OH
VOL
V
tPHL
tPLH tPHL
1.5 V 1.5 V
1.5 V 1.5 V
VOH
VOL
Output Z
2.7 V
0.3 V
trtf
Skew
tPLH
Skew
HD26LS31
Rev.2.00, Jul.16.2004, page 5 of 11
Test Circuit 2
V
CC
G
AY
Z
S1
Pulse Generator
PRR = 1 MHz
Duty Cycle 50%
Zout = 50Ω
G
Input
4.5 V Output
Output 180 Ω
180 Ω
75 Ω
S1
C
L
75 Ω
C
L
Note: 1. CL includes probe and jig capacitance.
Waveforms
Enable G
0.3 V
2.7 V
1.5 V
2.7 V
0 V
3 V
1.5 V
0.3 V
Enable G
Output
t
ZH
OH
V
1.5 V
t
HZ
0.5 V
S1 Open
S1 : Closed
0 V
1.5 V
t
r
t
f
S1 : Open
HD26LS31
Rev.2.00, Jul.16.2004, page 6 of 11
Test Circuit 3
VCC
G
AY
Z
S2
Pulse Generator
PRR = 1 MHz
Duty Cycle 50%
Zout = 50Ω
G
Input
4.5 V Output
Output
180 Ω
75 Ω
CL
75 Ω
CL
180 Ω
S2
Note: 1. CL includes probe and jig capacitance.
Waveforms
Enable G
0.3 V
2.7 V
1.5 V
2.7 V
0 V
3 V
1.5 V
0.3 V
Enable G
Output
t
ZL
OL
V
1.5 V
t
LZ
0.5 V
S2 : Open
4.5 V
1.5 V
t
r
t
f
S2 : Closed
HD26LS31
Rev.2.00, Jul.16.2004, page 7 of 11
HD26LS31 Line Driver Applications
The HD26LS31 is a line driver that meets the EIA RS-422A conditions, and has been designed to supply a high current
for differential signals to a b us li ne. Its features are listed below.
• Operates on a single 5 V power supply.
• High output impedance when power is off
• Three-state output
• On-chip current limiter circuit
• Sink current and source current both 40 mA
A block diagram is shown in figure 1. The enable function is common to all four drivers, and either active-high or
active-low can be selected.
The output section consists of two output stages (the Y side and Z side), each of which has the same sink current and
source current capacity.
Input is TTL compatible, and an output current limiter circuit is built into the output stage as shown in figure 2.
1A
2A
3A
4A
Enable G
Enable G
1Y
1Z
2Y
2Z
3Y
3Z
4Y
4Z
Figure 1 HD26LS31 Block Diagram
The output current limiter circuit consists of transistor Q1 and resistance R1, and operates when the voltage drop on both
sides of R1 reaches approximately 0.7 V. At this time the current, i, is as follows:
i = 0.7 (V) / 9 (Ω) ≈ 78 (mA)
When a current greater than this flows, Q1 is turned on, the Q2 base current flows to the output side, and the flow of an
excessively large output current is prevented.
However, since this type of current limiter circuit has the characteristics shown in figure 3, the output stage power
dissipation is large.
Therefore, when the output is shorted, this should be limited to a maximum of one second for one pin only.
The IOL vs. VOL characteristic for low-level output is sho wn in figure 4.
An example of termination resistance connection when the HD26LS31 is used as a balanced differential type driver is
shown.
V
CC
Output
Q
3
R
1
9 Ω
Q
4
Q
2
Q
1
Figure 2 Output Stage Circuit Configuration
HD26LS31
Rev.2.00, Jul.16.2004, page 8 of 11
When termination resistance RT is connected between the two transmission lines, as shown in figure 7 the current path
situation is that current IOH on the side outputting a high level (in this case, the Y output) flows to t he side outputting a
low level (in this case, the Z output) via RT, with the result that the low level rise is large.
If termination resistance RT is dropped to GND on both transmit lines, as shown in figure 5 the current path situation is
that the current that flows into the side outputting a low level (in this case, the Z output) is only the input bias curre nt
from the receiver. As this input bias current is small compared with the signal current, it has almost no effect on the
differential input signal at the receiver end.
Figure 6 shows the output voltage characteristics when termination resistance RT is varied.
Also, when used in a party line system, etc., the low level rises further due to the receiver input bias current, so that it is
probably advisable to dro p the termination resistance to GND.
However, the fact that it is possible to make the value of RT equal to the characteristic impedance of the transmission
line offers the advantage of being able to hold the power dissipation on the side outputting a high level to a lower level
than in the above case.
Consequently, the appropriate use must be decided according to the actual operating conditions (transmission line
characteristics, transmission distance, whether a party line is used, etc.).
Figure 8 shows the output voltage characteristics when termination resistance RT is varied.
5.0
4.0
3.0
2.0
1.0
0 –20 –40 –60 –80 –100
Output Current I
OH
(mA)
Output Voltage V
OH
(V)
V
CC
= 5.25 V
V
CC
= 4.75 V
V
CC
= 5.0 V Ta = 25°C
Figure 3 IOH vs. VOH Characteristics
0.5
0.4
0.3
0.2
0.1
0 1020304050
Output Current IOL (mA)
Output Voltage VOL (V)
VCC = 4.75 V
Ta = 25°C
VCC = 5.0 V
VCC = 5.25 V
Figure 4 IOL vs. VOL Characteristics
HD26LS31
Rev.2.00, Jul.16.2004, page 9 of 11
Y
Z
"H"
"L"
IOH
RT
RT
IIN (Receiver)
RT = ZO
2
ZO is the transmission line characteristic
impedance
Figure 5 Example of Driver Use-1
5
2
1.0
0.5
0.2
0.1
0.05
10 20 50 100 200 500 1 k 2 k 5 k 10 k 20 k 50 k
Termination Resistance RT (Ω)
Output Voltage VOH (Y), VOL (Z) (V)
VCC = 5 V
Ta = 25°C
Z
Y
"H"
VOH
GND
RT
RT
VOL
VOH (Y)
VOL (Z)
Figure 6 Termination Resistance vs. Output Voltage Characteristics
Z
Y "H"
"L"
IOH
IOL
RT
IIN (Receiver)
RT = ZO
ZO is the transmission line characteristic
impedance
Figure 7 Example of Driver Use-2
HD26LS31
Rev.2.00, Jul.16.2004, page 10 of 11
A feature of termination implemented as shown in figure 9 is that power dissipation is low when the duty of the
transmitted signal is high.
However, care is required, since if RT is sufficiently small, when the output on the pulled -up side goes low, since the
inverter transistor (Q4 in figure 2) has no protection circuit, and so a large current will flow and the output low level will
rise.
Figure 10 shows the output voltage characteristics when terminatio n resistance RT is varied.
With the method of using the dr iver describ e d above, if termination resistance RT becomes sufficiently small, the region
within which the output current limiter circuit operates will be entered, as can be seen fro m the IOH vs. VOH
characteristics shown in figure 3. In this region, the output sta ge power dissipation is large and the output voltage
changes abruptly. A measure such as insertion of a capacitor in series with the termination resistance is therefore
necessary. Consequently, when selecting the transmission line, the circuit termination resistance to be used requires
careful consideration.
5
2
1.0
0.5
0.2
0.1
0.05
10 20 50 100 200 500 1 k 2 k 5 k 10 k 20 k 50 k
Termination Resistance RT (Ω)
Output Voltage VOH (Y), VOL (Z) (V)
VOH (Y)
VOL (Z)
VCC = 5 V
Ta = 25°C
Z
"H"
VOH
GND
RT
VOL
Y
Figure 8 Termination Resistance vs. Output Voltage Characteristics
V
CC
R
T
R
T
Z
Y
Data input
Figure 9 Example of Driver Use-3
5
2
1.0
0.5
0.2
0.1
0.05
10 20 50 100 200 500 1 k 2 k 5 k 10 k 20 k 50 k
Termination Resistance RT (Ω)
Output Voltage VOH (Y), VOL (Z) (V)
VOL (Y)
VOH (Z)
VCC = 5 V
Ta = 25°C
Z
"L" VOL
GND
RTVOH
Y
RT
VCC
Figure 10 Termination Resistance vs. Output Voltage Characteristic
HD26LS31
Rev.2.00, Jul.16.2004, page 11 of 11
Package Dimensions
16
18
9
19.2
20.32 Max
6.3
7.4 Max
5.06 Max2.54 Min
0.51 Min
Package Code
JEDEC
JEITA
Mass
(reference value)
DP-16E
Conforms
Conforms
1.05 g
2.54 ± 0.25 0.48 ± 0.1
0.89 1.3 7.62
0.25+ 0.1
– 0.05
0˚ – 15˚
As of January, 2003
Unit: mm
16
18
9
19.2
20.32 Max
6.3
7.4 Max
5.06 Max2.54 Min
0.51 Min
Package Code
JEDEC
JEITA
Mass
(reference value)
DP-16FV
Conforms
Conforms
1.05 g
2.54 ± 0.25
*NI/Pd/AU Plating
*0.48 ± 0.08
0.89 1.3 7.62
*0.25
± 0.06
0˚ – 15˚
Unit: mm
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