ACPL-4800 High CMR Intelligent Power Module and Gate Drive Interface Optocoupler Datasheet Description Features The ACPL-4800 fast speed optocoupler contains a GaAsP LED and photo detector with built-in Schmitt trigger to provide logic-compatible waveforms, eliminating the need for additional wave shaping. The totem pole output eliminates the need for a pull up resistor and allows for direct drive Intelligent Power Module or gate drive. * Performance Specified for Fast IPM Applications over Industrial Temperature Range: -40C to 100C Functional Diagram * Propagation Delay Difference Min. -100 ns, Max. 250 ns * Wide Operating VCC Range: 4.5 to 20 Volts * Typical Propagation Delays 150 ns * Minimized Pulse Width Distortion PWD = 250 ns 8 V CC * 30 kV/ s Minimum Common Mode Transient Immunity at VCM = 1000 V ANODE 2 7 NC * Hysteresis CATHODE 3 6 VO NC 1 * Totem Pole Output (No Pull-up Resistor Required) NC 4 SHIELD 5 GND TRUTH TABLE (POSITIVE LOGIC) LED VO ON HIGH OFF LOW * Safety Approval: Pending for UL 1577, 3750 Vrms / 1 minute Pending for CSA File CA88324, Notice #5 Pending for IEC/EN/DIN EN 60747-5-2, VIORM = 630 Vpeak Applications * IPM Interface Isolation * Isolated IGBT/MOSFET Gate Drive Note: The connection of a 0.1 F bypass capacitor between pins 5 & 8 is recommended. * AC and Brushless DC Servo Motor Drives * Low Power Inverters * General Digital Isolation Schematic Ordering Information ICC Specify Part Number followed by Option Number (if desired). Example: ACPL-4800-XXX 060 = IEC/EN/DIN EN 60747-5-2 Option 300 = Gull Wing Lead Option 500 = Tape and Reel Packaging Option XXXE = Lead-Free Option 8 V CC IO 2 IF + VF 3 VO 6 SHIELD 5 GND Option data sheets are available. Contact Avago sales representative or authorized distributor for information. Package Outline Drawings DIP-8 Package 7.62 0.25 (0.300 0.010) 9.65 0.25 (0.380 0.010) TYPE NUMBER 8 7 6 5 OPTION CODE* 6.35 0.25 (0.250 0.010) DATE CODE A XXXXZ YYWW RU 1 1.19 (0.047) MAX. 2 3 4 UL RECOGNITION 1.78 (0.070) MAX. 5 TYP. 3.56 0.13 (0.140 0.005) 4.70 (0.185) MAX. + 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002) 0.51 (0.020) MIN. 2.92 (0.115) MIN. 1.080 0.320 (0.043 0.013) 0.65 (0.025) MAX. 2.54 0.25 (0.100 0.010) 2 DIMENSIONS IN MILLIMETERS AND (INCHES). * MARKING CODE LETTER FOR OPTION NUMBERS "V" = OPTION 060 OPTION NUMBERS 300 AND 500 NOT MARKED. DIP-8 Package with Gull Wing Surface Mount Option 300 LAND PATTERN RECOMMENDATION 9.65 0.25 (0.380 0.010) 8 7 6 1.016 (0.040) 5 6.350 0.25 (0.250 0.010) 1 2 3 10.9 (0.430) 4 2.0 (0.080) 1.27 (0.050) 1.19 (0.047) MAX. 1.780 (0.070) MAX. 9.65 0.25 (0.380 0.010) 7.62 0.25 (0.300 0.010) 3.56 0.13 (0.140 0.005) 1.080 0.320 (0.043 0.013) 0.635 0.25 (0.025 0.010) 0.635 0.130 2.54 (0.025 0.005) (0.100) BSC DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES). NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX. 3 + 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002) 12 NOM. Solder Reflow Temperature Profile (Gull Wing Surface Mount Option 300 Parts) 300 PREHEATING RATE 3C + 1C/-0.5C/SEC. REFLOW HEATING RATE 2.5C 0.5C/SEC. PEAK TEMP. 240C PEAK TEMP. 230C 200 TEMPERATURE (C) PEAK TEMP. 245C 2.5C 0.5C/SEC. 30 SEC. 160C 150C 140C SOLDERING TIME 200C 30 SEC. 3C + 1C/-0.5C 100 PREHEATING TIME 150C, 90 + 30 SEC. 50 SEC. TIGHT TYPICAL LOOSE ROOM TEMPERATURE 0 50 0 100 Note: Use of non-chlorine-activated fluxes is highly recommended 150 TIME (SECONDS) Recommended Pb-Free IR Profile tp TIME WITHIN 5C of ACTUAL PEAK TEMPERATURE 20-40 SEC. 260 +0/-5C TEMPERATURE (C) Tp TL T smax 217C RAMP-UP 3C/SEC. MAX. 150 - 200 C RAMP-DOWN 6C/SEC. MAX. T smin ts PREHEAT 60 to 180 SEC. tL 60 to 150 SEC. 25 t 25C to PEAK TIME (SECONDS) NOTES: THE TIME FROM 25 C to PEAK TEMPERATURE = 8 MINUTES MAX. Tsmax = 200C, Tsmin = 150C 4 200 250 Table 2. Insulation and Safety Related Specifications Parameter Symbol 8-Pin DIP Unit Conditions Minimum External Air Gap (External Clearance) L(101) 7.1 mm Measured from input terminals to output terminals, shortest distance through air. Minimum External Tracking (External Creepage) L(102) 7.4 mm Measured from input terminals to output terminals, shortest distance path along body. Minimum Internal Plastic Gap (Internal Clearance) 0.08 Through insulation distance, conductor to conductor, usually the direct distance between the photo emitter and photo detector inside the optocoupler cavity. Minimum Internal Tracking (Internal Creepage) NA mm Measured from input terminals to output terminals, along internal cavity. Tracking Resistance CTI (Comparative Tracking Index) 200 mm DIN IEC 112/VDE 0303 Part 1 Isolation Group IIIa Material Group (DIN VDE 0110, 1/89, Table 1) Option 300 - surface mount classification is Class A in accordance with CECC 00802. Table 3. IEC/EN/DIN EN 60747-5-2 Insulation Characteristics (Option 060) Description Symbol Characteristic Unit Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage 300 Vrms I-IV for rated mains voltage 450 Vrms I-III Climatic Classification 55/85/21 Pollution Degree (DIN VDE 0110/1.89) 2 Maximum Working Insulation Voltage VIORM 630 Vpeak Input to Output Test Voltage, Method b* VIORM x 1.875=VPR,100% Production Test with tm=1 sec, Partial discharge < 5 pC VPR 1181 Vpeak Input to Output Test Voltage, Method a* VIORM x 1.5=VPR, Type and Sample Test, tm=60 sec, Partial discharge < 5 pC VPR 945 Vpeak Highest Allowable Over-voltage (Transient Over-voltage tini = 10 sec) VIOTM 6000 Vpeak Case Temperature TS 175 C Input Current IS, INPUT 230 mA Output Power (refer to Thermal Derating Curve) PS, OUTPUT 600 mW Insulation Resistance at TS, VIO = 500 V RS >109 Safety-limiting values - maximum values allowed in the event of a failure. * Refer to the optocoupler section of the Isolation and Control Components Designer's Catalog, under Product Safety Regulations section, (IEC/EN/ DIN EN 60747-5-2) for a detailed description of Method a and Method b partial discharge test profiles. Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application. 5 OUTPUT POWER - PS , INPUT CURRENT - I S Thermal Derating Curve 800 P S (mW) 700 IS (mA) 600 500 400 300 200 100 0 0 25 50 75 100 125 150 175 200 TA - CASE TEMPERATURE - o C Table 4. Absolute Maximum Rating Parameter Symbol Min. Max. Units Storage Temperature TS -55 125 C Operating Temperature TA -40 100 C Average Forward Input Current IF(AVG) 10 mA Peak Transient Input Current IF(TRAN) ( 1 s Pulse Width, 300 pps) 1.0 A ( 200 s Pulse Width, < 1% Duty Cycle) 40 mA Note Reverse Input Voltage VR 5 V Average Output Current IO 25 mA Supply Voltage VCC 0 25 V Output Voltage VO -0.5 25 V Total Package Power Dissipation PT 210 mW Lead Solder Temperature (Through Hole Parts Only) 260 C for 10 sec., 1.6 mm below seating plane Solder Reflow Temperature Profile (Surface Mount Parts Only) See Package Outline Drawings section Table 5. Recommended Operating Conditions Parameter Symbol Min. Max. Units Power Supply Voltage VCC 4.5 20 V Forward Input Current (ON) IF(ON) 6 10 mA Forward Input Voltage (OFF) VF(OFF) - 0.8 V Operating Temperature TA -40 100 6 C 1 Table 6. Electrical Specification -40C TA 100C, 4.5V VCC 20V, 6mA IF(ON) 10 mA, 0V VF(OFF) 0.8 V, unless otherwise specified. All Typicals at TA = 25C. See Note 7. Parameter Sym. Min. Logic Low Output Voltage VOL Logic High Output Voltage VOH 2.4 Typ. Max. Units Test Conditions Fig. 0.5 V IOL = 6.4 mA 1,3 V IOH = -2.6 mA 2,3,7 VCC - 1.1V IOH = -0.4 mA 2.7 Output Leakage Current (VOUT = VCC+0.5V) IOHH Logic Low Supply Current ICCL Logic High Supply Current 100 A 500 ICCH Logic Low Short Circuit Output Current IOSL Logic High Short Circuit Output Current IOSH Input Forward Voltage VF Note 1.9 3.0 2.0 3.0 1.5 2.5 1.6 2.5 25 Vcc = 5 V IF = 10mA Vcc = 20 V mA Vcc = 5.5 V Vcc = 20 V mA Vcc = 20 V IF = 10 mA IO = Open VO = Vcc = 5.5 V VF=0V 2 2 VCC = 20 V IF=6mA VO=GND V TA = 25 C IF=6mA V IR = 10 A mA Vcc = 5.5 V VF = 0 V IO = Open VO = Vcc = 20 V 50 -25 mA -50 1.5 1.7 VCC = 5.5 V 4 1.85 5 Input Reverse Breakdown Voltage BVR Input Diode Temperature Coefficient DVF DTA -1.7 mV/C IF = 6 mA Input Capacitance CIN 60 pF 7 f = 1 MHz, VF = 0 V 3 Table 7. Switching Specifications (AC) -40C TA 100C, 4.5V VCC 20V, 6mA IF(ON) 10 mA, 0V VF(OFF) 0.8V. All Typicals at TA = 25C, IF(ON) = 6 mA unless otherwise specified. Parameter Typ. Max. Units Test Conditions Fig. Note Propagation Delay Time to tPHL Logic Low Output Leve 150 350 ns With Peaking Capacitor 5,6 5 Propagation Delay Time to tPLH Logic High Output Level 110 350 ns With Peaking Capacitor 5,6 5 250 ns 250 ns Pulse Width Distortion Sym. Min. PWD Propagation Delay PDD Difference Between Any 2 Parts -100 | tPHL - tPLH | 8 10 Output Rise Time (10-90%) tr 16 ns 5,8 Output Fall Time (90-10%) 20 ns 5,8 tf Logic High Common Mode |CMH| Transient Immunity -30000 V/s |VCM| = 1000 V, IF = 6.0 mA, VCC = 5 V, TA = 25 C 9 6 Logic Low Common Mode |CML| Transient Immunity 30000 V/s |VCM| = 1000 V, VF = 0 V, VCC = 5 V, TA = 25 C 9 6 Table 8.Package Characteristics Parameter Sym. Min. Typ. Max. Units Test Conditions Input-Output Momentary Withstand Voltage* VISO 3750 Input-Output Resistance RI-O 1012 Input-Output Capacitance CI-O 0.6 pF Fig. Note Vrms RH < 50%, t = 1 min. TA = 25C 4,7 VI-O = 500 Vdc 4 f = 1 MHz, VI-O = 0 Vdc 4 Notes: 1. Derate total package power dissipation, PT, linearly above 70C free-air temperature at a rate of 4.5 mW/C. 2. Duration of output short circuit time should not exceed 10 ms. 3. Input capacitance is measured between pin 2 and pin 3. 4. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together and pins 5, 6, 7, and 8 shorted together. 5. The tPLH propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.3 V point on the leading edge of the output pulse. The tPHL propagation delay is measured from the 50% point on the trailing edge of the input pulse to the 1.3 V point on the trailing edge of the output pulse. 6. CMH is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic high state, VO > 2.0 V. CML is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic low state, VO < 0.8 V. 7. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 4200 V rms for one second (leakage detection current limit, II-O 5 mA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table, if applicable. 8. Pulse Width Distortion (PWD) is defined as |tPHL - tPLH | for any given device. 9. Use of a 0.1 F bypass capacitor connected between pins 5 and 8 is recommended. 10. The difference between tPLH and tPHL between any two devices under the same test condition. 8 0 VCC = 4.5/20V VF = 0V IO = 6.4mA 0.14 VCC = 4.5V IF = 6mA IOH - HIGH LEVEL OUTPUT CURRENT - mA VOL - LOW LEVEL OUTPUT VOLTAGE - V 0.15 0.13 VCC = 4.5V VCC = 20V 0.12 0.11 -5 -10 VO = 2.7V -15 VO = 2.4V -20 0.1 -25 -50 0 50 100 150 -50 0 50 100 Figure 1. Typical Logic Low Output Voltage vs. Temputer Figure 2. Typical Logic High Output Current vs. Temputer 4.5 1000 TA = 25 C 4 IO = -2.6mA 100 IF IF - FORWARD CURRENT - mA 3.5 Vo - OUTPUT VOLTAGE - V 150 TA - TEMPERATURE - C TA - TEMPERATURE - C 3 2.5 2 1.5 TA = 25C 1 VCC = 4.5V + VF - 10 1.0 0.1 0.01 0.5 IO = 6.4mA 0 0 1 2 3 4 0.001 1.1 5 1.2 IF - INPUT CURRENT - mA Figure 3. Typical Output Voltage vs. Forward Input Current PULSE GEN. t r = t f = 5 ns f = 100 kHz 10 % DUTY CYCLE VO = 5 V Z O = 50 Figure 4. Typical Input Diode Forward Characteristic V CC THE PROBE AND JIG CAPACITANCES ARE INCLUDED IN C1 AND C2. OUTPUT V O MONITORING NODE 1 V CC INPUT MONITORING NODE C1 = 120 pF 2 7 3 6 4 GND 5 1.10 k R1 3 mA IF (ON) 5V 8 * R1 1.3 1.4 1.5 VF - FORWARD VOLTAGE - V D1 619 D2 C2 = 15 pF 5k 681 5 mA 330 10 mA ALL DIODES ARE 1N916 OR 1N3064. IF (ON) 50 % I F (ON) 0 mA INPUT I F D3 t PLH D4 t PHL OUTPUT V O * 0.1 F BYPASS N SEE NOTE 9. Figure 5. Circuit for tPLH,tPHL,tr,tf 9 V OH 1.3 V V OL 230 25 20 190 Tphl 170 Vo - OUTPUT VOLTAGE - V Tp - PROPAGATION DELAY - ns 210 VCC = 20V IF = 10mA 150 130 Tplh 110 90 TA = 25oC IO = -2.6mA 15 10 5 70 50 0 -60 -40 -20 0 20 40 60 80 100 120 0 5 TA - TEMPERATURE - C 10 15 Figure 6. Typical Propagation Delays vs.Temperature. Figure 7. Typical Logic High Output Voltage vs. Supply Voltage 200 IF (mA) 10 180 TP - PROPAGTION DELAY - ns 160 6 Tphl 140 120 100 IF (mA) 6 10 80 Tplh 60 40 o TA = 25 C 20 0 0 5 10 15 20 25 VCC - SUPPLY VOLTAGE - V Figure 8. Typical Propogation Delats vs. Supply Voltage V CC A B V CM (PEAK) 1 8 2 7 V OH 3 6 OUTPUT V O 4 5 |VCM | 0.1 F BYPASS 0V R IN + V FF PULSE GENERATOR + OUTPUT V O MONITORING NODE V CM - Figure 9. Test Circuit for Common Mode Transient Immunity and Typical Waveforms 10 20 VCC - SUPPLY VOLTAGE - V V OL SWITCH AT A: I F = 5 mA** V O (MIN.)* SWITCH AT B: V F = 0 V V O (MAX.)* 25 For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Pte. in the United States and other countries. Data subject to change. Copyright (c) 2006 Avago Technologies Pte. All rights reserved. Obsoletes 5989-4496EN 5989-4685EN - January9, 2006 11