Document No. 70-0334-07 www.psemi.com
Page 1 of 10
©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
The PE42750 is an SPDT UltraCMOS® Switch designed
for Broadband applications such as CATV, DTV, Multi-
Tuner Digital Video Recorder (DVR ), Set-top Box, PCTV
and Video Game Consoles. The PE42750 meets FCC
15.115 specification of 80 dB isolation at 216 MHz in
both powered and unpowered states. The PE42750
covers a broad frequency range from 5 MHz to 2200
MHz with a single positive supply and CMOS control.
The PE42750 provides a smaller, cost effective, more
reliable and manufacturable alternative to mechanical
relays in set-top box applications.
The PE42750 is manufactured using Peregrine’s
UltraCMOS® process, a patented variation of silicon-on-
insulator (SOI) technology on a sapphire substrate,
offering the performance of GaAs with the economy and
integration of conventional CMOS.
Product Specification
75 Terminated 5 - 2200 MHz SPDT
CATV UltraCMOS® Switch
Featuring Unpowered Operation
Product Description
PE42750
Features
Meets FCC 15.115 isolation specification
All ports terminated when unpowered
2000V HBM ESD tolerance, all ports
High isolation: 63 dB at 1000 MHz
Low insertion loss, typical:
0.7 dB at 5 MHz
1.0 dB at 1000 MHz
CMOS single-pin control with logic select
Single +3 volt supply operation
Low current consumption: 8 A
Absorptive Switch Design
Figure 1. Functional Diagram
12-lead 3 x 3 x 0.75 mm QFN
Figure 2. Package Type
Peregrine Specification 71-0013
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
Product Specification
PE42750
Page 2 of 10
©2010-2012 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0334-07 UltraCMOS® RFIC Solutions
Table 1. Electrical Specifications @ +25°C, VDD = +3V (ZS = ZL = 75)
Notes: 1. Measured in a 50 system
2. 0/3V on control pin, 1 ns rise time
3. Minimum per FCC 15.115 spec
4. 10 dBm per tone for 1:3 ratio of fundamental to IMD3 products
Table 2. Electrical Characterization (Unpowered Operation)
Parameter Condition Minimum Typical Maximum Units
Operating Frequency 5 2200 MHz
Insertion Loss - RFX to RFC
5 to 220 MHz 0.7 0.8
dB
221 to 550 MHz 0.8 0.9
551 to 810 MHz 0.9 1.0
871 to 2200 MHz 1.7 1.8
Isolation - RFX to RFX3
5 to 220 MHz 80 84
dB
221 to 550 MHz 70 76
551 to 810 MHz 65 72
871 to 2200 MHz 50 57
Isolation - RFX to RFC
5 to 220 MHz 74 80
221 to 550 MHz 67 72
551 to 810 MHz 65 70
871 to 2200 MHz 51 55
Return Loss - RFX to RFC
5 to 220 MHz
221 to 550 MHz
551 to 810 MHz
811 to 870 MHz
871 to 2200 MHz
23
20
18
17
10
dB
IIP2 RFX1 5-2200 MHz 100 dBm
IIP3 RFX1,4 5-2200 MHz 47.5 dBm
Input 1 dB Compression RFX or RFC1 1000 MHz 21.5 23.5 dBm
Switching time2 50% CTRL to 10/90% RF 2 3 µs
Video Feedthough2 2 mVpp
dB
811 to 870 MHz 0.9 1.0
811 to 870 MHz 65 71
811 to 870 MHz 65 70
Parameter Condition Minimum Typical Maximum Units
Operating Frequency 5 2200 MHz
Isolation RF1 to RF2
5 to 220 MHz 83 90
dB
221 to 550 MHz 77 83
551 to 810 MHz 73 79
871 to 2200 MHz 65 72
811 to 870 MHz 73 79
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
Product Specification
PE42750
Page 3 of 10
Document No. 70-0334-07 www.psemi.com ©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
No. Name Description
1 GND RF Ground
2 RF11 RF I/O
3 GND RF Ground
4 GND RF Ground
5 RFC1 RF Common
6 GND RF Ground
7 GND RF Ground
8 RF21 RF I/O
9 GND RF Ground
10 C22 Control 2 (or logic select)
11 C12 Control 1 (or logic select)
12 VDD Supply
Pad GND Exposed Ground Paddle
Table 3. Pin Descriptions
Table 5. Absolute Maximum Ratings
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS® device, observe the same
precautions that you would use with other ESD-sensitiv e
devices. Although this device contains circuitry to protect it from
damage due to ESD, precautions should be taken to avoid
exceeding the rating specified.
Table 4. Operating Conditions @ 25°C
Notes: 1. RF pins 2, 5, and 8 must be at 0 VDC. The RF pins do not require
DC blocking capacitors for proper operation if the 0 V DC
requirement is met
2. Pins 10 and 11 can be set for single pin control
3. GND must be connected to exposed ground paddle to ensure
good isolation
Figure 3. Pin Configuration (Top View)
Parameter/Condition Min Max Unit
VI Voltage on CTRL input -0.3 VDD + 0.3 V
PRF RF power on RFC, RF1, RF2
Terminated/Through 75 23/26 dBm
TST Storage temperature -55 +150 °C
VESD ESD Voltage, HBM,
MIL_STD 883, Method 3015.7 2000
V
VESD MM ESD Voltage all pins
JEDEC JESD22-A115-A 150
VESD CDM ESD Voltage
JEDEC JESD22-C101D 1000
VDD Power supply voltage -0.3 4.0 V
Parameter Min Typ Max Unit
VDD Power Supply 2.7 3.0 3.63 V
IDD Power Supply Current
(VDD = 3V, VCNTL = 3V) 8 A
Control Voltage High 0.7 x VDD VDD V
Control Voltage Low 0 0.3 x VDD V
TOP Operating
Temperature -40 +85 °C
PRF RF power on RFC,
RF1, RF2 Terminated/
Through 75
23/26 dBm
Exceeding absolute max imum ratings may cause permanent
damage. Operation between operating range maximum a nd
absolute maximum for extended periods may reduc e reliability.
Moisture Sensitivity Level
The Moisture Sensitivity Le vel rating for the PE42750 in
the 12-lead 3 x 3 x 0.75 mm QFN pa ckage is MSL1.
Switching Frequency
The PE42750 has a maxim um 25 kHz switching rate.
Latch-Up Avoidance
Unlike conventional CMO S devices, UltraCMOS®
devices are immune to latch-up.
Operation should be restricted to the limits in the Operating
Ranges table.
Table 6. Truth Table1
VDD C1 C2 RFC – RF1 RFC – RF2
OFF2 Low Low OFF OFF
ON Low Low ON OFF
ON Low High OFF ON
ON High Low OFF ON
ON High High ON OFF
Note: 1. A versatile logic table has been established to allow either
C1 or C2 to act as a single pin control and in either polarity
2. VDD at “OFF” represents an all terminated state
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
Product Specification
PE42750
Page 4 of 10
©2010-2012 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0334-07 UltraCMOS® RFIC Solutions
Figure 4. Nominal Insertion Loss (RFX-RFC)
Figure 7. Active Port
Return Loss vs Temperature (RFX)
2.5
2
1.5
1
0.5
0
0 0 .5 1 1.5 2 2.5 3
RF1
RF2
30
25
20
15
10
5
0
0 0.5 1 1.5 2 2.5 3
40degC
25degC
85degC
Performance Plots @ 25°C and 3.0V unless otherwise specified.
Figure 5. Insertion Loss vs
Temperature (RFX-RFC)
Figure 6. Insertion Loss vs VDD (RFX-RFC)
2.5
2
1.5
1
0.5
0
00.511.522.53
25degC
40degC
85degC
Figure 9. RFC Port Return Loss vs Temperature
2.5
2
1.5
1
0.5
0
00.511.522.53
3.0V
2.7V
3.3V
Figure 8. Active Port
Return Loss vs VDD (RFX)
30
25
20
15
10
5
0
0 0.5 1 1.5 2 2.5 3
2.7V
3.0V
3.3V
30
25
20
15
10
5
0
00.511.522.53
40degC
25degC
85degC
Frequency (GHz)
Loss (dB)
Loss (dB)
Frequency (GHz)
Frequency (GHz)
Frequency (GHz)
Frequency (GHz)
Frequency (GHz)
Loss (dB)
Loss (dB)
Loss (dB)
Loss (dB)
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
Product Specification
PE42750
Page 5 of 10
Document No. 70-0334-07 www.psemi.com ©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
Figure 10. RFC Port Return Loss vs VDD
Figure 12. RF1-RF2 Isolation vs Temperature
Figure 11. RF1-RF2 Isolation vs VDD
Figure 13. Unpowere d RF1-RF2 Isolation
30
25
20
15
10
5
0
0 0.5 1 1.5 2 2.5 3
2.7V
3.0V
3.3V
100
90
80
70
60
50
40
00.511.522.53
40degC
25degC
85degC
100
90
80
70
60
50
40
00.511.522.53
2.7V
3.0V
3.3V
100
90
80
70
60
50
40
00.511.522.53
VDD=0V
Figure 15. Input IIP3 RFC-RFX Figure 14. RFX-RFC I solation
110
100
90
80
70
60
50
40
0.0 0.5 1.0 1.5 2.0 2.5 3.0
Measured
Performanceon
EVKPCB
Extrapolated
Performance*
0
10
20
30
40
50
60
70
00.511.522.53
RFX
Note: EVK-PCB-related resonance removed from dataset. Extrapolated
performance shown represents true performance of part.
Isolation (dB)
IIP3 (dBm)
Frequency (GHz) Frequency (GHz)
Frequency (GHz)
Loss (dB)
Frequency (GHz)
Loss (dB)
Frequency (GHz)
Loss (dB)
Frequency (GHz)
Loss (dB)
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
Product Specification
PE42750
Page 6 of 10
©2010-2012 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0334-07 UltraCMOS® RFIC Solutions
Figure 16. Typical Application (1 of 3)
Figure 17. Typical Application (2 of 3)
Figure 18. Typical Application (3 of 3)
DTV-T uner
PE42750
SPDT
Antenna Input
CATV Input
80dB 54 – 216MHz
60dB 216 – 550MHz
55dB 550 – 806MHz
DTV-Tune r
PE42750
SPDT
DTV Tuner
Antenna Input
CATV Input
80dB 54 – 216MHz
60dB 216 – 550MHz
55dB 550 – 806MHz
Power
Splitter
Power
Splitter PE42750
SPDT
Du al Tuner DTV / DVR / Set-to p Box
Tuner
CATV Input
OFF – Te rminated
TV Set / Cabl e Set-top Bo x
75Ω
PE42750 SPDT
RF2
Typical Applications
The PE42750 provide s the high isolation required by
FCC part 15.115 regulatio n between the television
antenna and the cable pla nt. The advantage of the
PE42750 is that device isolation performance is
maintained when power is removed. When the PE42750
is unpowered all ports are terminated.
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
Product Specification
PE42750
Page 7 of 10
Document No. 70-0334-07 www.psemi.com ©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
Evaluation Kit Information Figure 20. Evaluation Board Layouts
Peregrine Specification 101/0491
75 OHM T-Line
75 OHM T-Line
75 OHM T-Line
75 OHM T-Line
NOTES:
4.3 Er AND 2.1MIL Cu THICKNESS.
3. ALL TRANSMISION LINES ARE:
12MIL WIDTH, 12MIL GAPS, 28MIL CORE DIELECTRIC
TO DAMAGE BY ELECTROSTATIC DISCHARGE (ESD)
2. CAUTION:
1. USE 101-0491-01
CONTAINS PARTS AND ASSEMBLIES SUSCEPTIBLE
1
2
J5
CBJE130-2
R1
1M
R2
1M
1C1
3C2
5GND
7GND
2
GND 4
GND 6
GND 8
GND 10
GND 12
GND 14
GND
13 GND
9VDD
11 GND
J6
HEADER 14
1
2
J4
CBJE130-2
1
2
J3
CBJE130-2
C3
DNI
C2
DNI
C1
DNI
1
2
J2
CBJE130-2
1
2
J1
CBJE130-2
4GND
1GND
2RF1
3GND
5RFC
6GND
7
GND
8
RF2
9
GND
10
C2
11
C1
12
VDD
U1
QFN_12L_3X3
RF1
RFC
RF2
The SPDT Switch Evaluation Kit facilitates
customer evaluation of the PE42750 SPDT switch.
The RF common port is connected through a 75
transmission line to J2. Ports 1 and 2 are
connected through 75 transmission lines to J1
and J3. A through line connects F connectors J4
and J5. This transmission line can be used to
estimate the PCB loss over the environmental
conditions. J6 provides DC and digital inputs to the
device.
The board is composed of a two metal layer FR4
material with a total thickness of 0.032”. The
transmission lines are hybrid microstrip/coplanar
waveguide with ground plane (28 mil core, 12 mil
width, 12 mil gap).
The provided jumpers short the control pins to
ground for logic low. With the jumper removed the
control input rises to VDD for logic high through the
1 M pull up resistor. These resistors will draw
several microamps from VDD. They are not required
for normal operation.
Figure 19. Evaluation Board Schematic
Peregrine Specification 102/0586
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
Product Specification
PE42750
Page 8 of 10
©2010-2012 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0334-07 UltraCMOS® RFIC Solutions
Figure 21. Package Drawing Hana - AYT (Thailand)
12-lead 3 x 3 x 0.75 mm QFN
19-0133
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Product Specification
PE42750
Page 9 of 10
Document No. 70-0334-07 www.psemi.com ©2010-2012 Peregrine Semiconductor Corp. All rights reserved.
Figure 22. Package Drawing Hana - JX (China)
12-lead 3 x 3 x 0.75 mm QFN
Figure 23. Marking Specifications
42750
YYWW
ZZZZZ
= Pin 1 designator
AAAAA = Five digit part number
YYWW = Date Code, last two digits of the year and work week
ZZZZZ = Five digits of the lot number
19-0155
17-0009
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
Product Specification
PE42750
Page 10 of 10
©2010-2012 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0334-07 UltraCMOS® RFIC Solutions
Table 7. Ordering Information
Order Code Description Package
Shipping Method
PE42750MLAA-Z 1 PE42750G-12LQFN 3x3mm-3000C Green 12-lead 3x3mm QFN 3,000 Dice/Reel
PE42750MLAB-Z 2 PE42750-12LQFN 3x3mm-3000C Green 12-lead 3x3mm QFN 3,000 Dice/Reel
EK42750-01 1 PE42750-EK Evaluation Kit 1/box
EK42750-02 2 PE42750-EK Evaluation Kit 1/box
12-lead 3x3x0.75 mm QFN
Figure 24. Tape and Reel Specifications
Tape Feed Direction
Device Orientation in Tape
Top of
Device
Pin 1
Ao = 3.30 ± 0.1 mm
Bo = 3.30 ± 0.1 mm
Ko = 1.10 ± 0.1 mm
Advance Information: The product is in a formative or design stage. The datasheet contains
design target specifications for product development. Specifications and features may change
in any manner without notice. Preliminary Specification: The datasheet contains preliminary
data. Additional data may be added at a later date. Peregrine reserves the right to change
specifications at any time without notice in order to supply the best possible product. Product
Specification: The datasheet contains final data. In the event Peregrine decides to change the
specifications, Peregrine will notify customers of the intended changes by issuing a CNF
(Customer Noti fication Form).
The information in this datasheet is believed to be reliable. However, Peregrine assumes no
liability for the use of this information. Use shall be entirely at the user’s own risk.
No patent rights or licenses to any circuits described in this datasheet are implied or granted to any
third party.
Peregrine’s products are not designed or intended for use in devices or systems intended for surgical
implant, or in other applications intended to support or sustain life, or in any application in which the
failure of the Peregrine product could create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including consequential or incidental damages, arising out
of the use of its products in such applications.
The Peregrine name, logo, UltraCMOS and UTSi are registered trademarks and HaRP, MultiSwitch
and DuNE are trademarks of Peregrine Semiconductor Corp.
Sales Contact and Information
For Sales and contact information please visit www.psemi.com.
Notes: 1. Hana AYT (Thailand) assembly house. Please contact factory for assembly house details.
2. Hana JX (China) assembly house. Please contact factory for assembly house details.
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com