LMV793MA/NOPB - Texas Instruments

0.1 1 10 1k 10k

FREQUENCY (Hz)

100

1000

100

VOLTAGE NOISE (nV/

Hz)

2.5V

CCM

IIN

VOUT

IIN - RF

CIN = CD + CCM

LMV793, LMV794

www.ti.com

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

LMV793/LMV794 88 MHz, Low Noise, 1.8V CMOS Input, Decompensated Operational

Amplifiers

Check for Samples: LMV793,LMV794

1FEATURES DESCRIPTION

The LMV793 (single) and the LMV794 (dual) CMOS

2(Typical 5V Supply, Unless Otherwise Noted) input operational amplifiers offer a low input voltage

• Input Referred Voltage Noise 5.8 nV/√Hz noise density of 5.8 nV/√Hz while consuming only

• Input Bias Current 100 fA 1.15 mA (LMV793) of quiescent current. The

LMV793/LMV794 are stable at a gain of 10 and have

• Gain Bandwidth Product 88 MHz a gain bandwidth product (GBW) of 88 MHz. The

• Supply Current per Channel LMV793/LMV794 have a supply voltage range of

– LMV793 1.15 mA 1.8V to 5.5V and can operate from a single supply.

The LMV793/LMV794 each feature a rail-to-rail

– LMV794 1.30 mA output stage capable of driving a 600Ωload and

• Rail-to-Rail Output Swing sourcing as much as 60 mA of current.

– @ 10 kΩLoad 25 mV from Rail The LMV793/LMV794 provide optimal performance in

– @ 2 kΩLoad 45 mV from Rail low voltage and low noise systems. A CMOS input

• Ensured 2.5V and 5.0V Performance stage, with typical input bias currents in the range of

a few femto-Amperes, and an input common mode

• Total Harmonic Distortion 0.04% @1 kHz, 600Ωvoltage range, which includes ground, make the

• Temperature Range −40°C to 125°C LMV793/LMV794 ideal for low power sensor

applications where high speeds are needed.

APPLICATIONS The LMV793/LMV794 are manufactured using TI’s

• ADC Interface advanced VIP50 process. The LMV793 is offered in

• Photodiode Amplifiers either a 5-Pin SOT23 or an 8-Pin SOIC package. The

LMV794 is offered in either the 8-Pin SOIC or the 8-

• Active Filters and Buffers Pin VSSOP.

• Low Noise Signal Processing

• Medical Instrumentation

• Sensor Interface Applications

Typical Application

Figure 1. Photodiode Transimpedance Amplifier Figure 2. Input Referred Voltage Noise vs.

Frequency

1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

LMV793, LMV794

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings(1)(2)

Human Body Model 2000V

ESD Tolerance(3) Machine Model 200V

Charge-Device Model 1000V

VIN Differential ±0.3V

Supply Voltage (V+– V−) 6.0V

Input/Output Pin Voltage V++0.3V, V−−0.3V

Storage Temperature Range −65°C to 150°C

Junction Temperature(4) +150°C

Infrared or Convection (20 sec) 235°C

Soldering Information Wave Soldering Lead Temp (10 sec) 260°C

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for

which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test

conditions, see the Electrical Characteristics Tables.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and

specifications.

(3) Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of

JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).

(4) The maximum power dissipation is a function of TJ(MAX),θJA. The maximum allowable power dissipation at any ambient temperature is

PD= (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PC Board.

Operating Ratings(1)

Temperature Range(2) −40°C to 125°C

−40°C ≤TA≤125°C 2.0V to 5.5V

Supply Voltage (V+– V−)0°C ≤TA≤125°C 1.8V to 5.5V

5-Pin SOT-23 180°C/W

Package Thermal Resistance (θJA(2)) 8-Pin SOIC 190°C/W

8-Pin VSSOP 236°C/W

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for

which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test

conditions, see the Electrical Characteristics Tables.

(2) The maximum power dissipation is a function of TJ(MAX),θJA. The maximum allowable power dissipation at any ambient temperature is

PD= (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PC Board.

2.5V Electrical Characteristics(1)

Unless otherwise specified, all limits are specified for TA= 25°C, V+= 2.5V, V−= 0V, VCM = V+/2 = VO.Boldface limits apply

at the temperature extremes.

Symbol Parameter Conditions Min Typ Max Units

(2) (3) (2)

VOS Input Offset Voltage 0.1 ±1.35 mV

±1.65

TC VOS Input Offset Voltage Temperature Drift(4) LMV793 −1.0 μV/°C

LMV794 −1.8

(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very

limited self-heating of the device such that TJ= TA. No specification of parametric performance is indicated in the electrical tables under

conditions of internal self-heating where TJ> TA.

(2) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using the

statistical quality control (SQC) method.

(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary

over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped

production material.

(4) Offset voltage average drift is determined by dividing the change in VOS by temperature change.

Product Folder Links: LMV793 LMV794

LMV793, LMV794

www.ti.com

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

2.5V Electrical Characteristics(1) (continued)

Unless otherwise specified, all limits are specified for TA= 25°C, V+= 2.5V, V−= 0V, VCM = V+/2 = VO.Boldface limits apply

at the temperature extremes.

Symbol Parameter Conditions Min Typ Max Units

(2) (3) (2)

IBInput Bias Current VCM = 1.0V(5) (6) −40°C ≤TA≤85°C 0.05 1

25 pA

−40°C ≤TA≤125°C 0.05 1

100

IOS Input Offset Current VCM = 1.0V(6) 10 fA

CMRR Common Mode Rejection Ratio 0V ≤VCM ≤1.4V 80 94 dB

PSRR Power Supply Rejection Ratio 2.0V ≤V+≤5.5V, VCM = 0V 80 100

75 dB

1.8V ≤V+≤5.5V, VCM = 0V 80 98

CMVR Common Mode Voltage Range CMRR ≥60 dB −0.3 1.5 V

CMRR ≥55 dB -0.3 1.5

AVOL Open Loop Voltage Gain VOUT = 0.15V to 2.2V, LMV793 85 98

RL= 2 kΩto V+/2 80

LMV794 82 92 dB

VOUT = 0.15V to 2.2V, 88 110

RL= 10 kΩto V+/2 84

VOUT Output Voltage Swing High RL= 2 kΩto V+/2 25 75

RL= 10 kΩto V+/2 20 65

71 mV from

either rail

Output Voltage Swing Low RL= 2 kΩto V+/2 30 75

RL= 10 kΩto V+/2 15 65

IOUT Output Current Sourcing to V−35 47

VIN = 200 mV(7) 28 mA

Sinking to V+7 15

VIN = –200 mV(7) 5

ISSupply Current Per Amplifier LMV793 0.95 1.30

1.65 mA

LMV794 1.1 1.50

1.85

SR Slew Rate AV= +10, Rising (10% to 90%) 32 V/μs

AV= +10, Falling (90% to 10%) 24

GBW Gain Bandwidth AV= +10, RL= 10 kΩ88 MHz

enInput Referred Voltage Noise Density f = 1 kHz 6.2 nV/√Hz

inInput Referred Current Noise Density f = 1 kHz 0.01 pA/√Hz

THD+N Total Harmonic Distortion + Noise f = 1 kHz, AV= 1, RL= 600Ω0.01 %

(5) Positive current corresponds to current flowing into the device.

(6) This parameter is specified by design and/or characterization and is not tested in production.

(7) The short circuit test is a momentary test, the short circuit duration is 1.5 ms.

Product Folder Links: LMV793 LMV794

LMV793, LMV794

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

www.ti.com

5V Electrical Characteristics(1)

Unless otherwise specified, all limits are specified for TA= 25°C, V+= 5V, V−= 0V, VCM = V+/2 = VO.Boldface limits apply at

the temperature extremes.

Symbol Parameter Conditions Min Typ Max Units

(2) (3) (2)

VOS Input Offset Voltage 0.1 ±1.35 mV

±1.65

TC VOS Input Offset Voltage Temperature Drift(4) LMV793 −1.0 μV/°C

LMV794 −1.8

IBInput Bias Current VCM = 2.0V(5) (6) −40°C ≤TA≤85°C 0.1 1

25 pA

−40°C ≤TA≤125°C 0.1 1

100

IOS Input Offset Current VCM = 2.0V(6) 10 fA

CMRR Common Mode Rejection Ratio 0V ≤VCM ≤3.7V 80 100 dB

PSRR Power Supply Rejection Ratio 2.0V ≤V+≤5.5V, VCM = 0V 80 100

75 dB

1.8V ≤V+≤5.5V, VCM = 0V 80 98

CMVR Common Mode Voltage Range CMRR ≥60 dB −0.3 4 V

CMRR ≥55 dB -0.3 4

AVOL Open Loop Voltage Gain VOUT = 0.3V to 4.7V, LMV793 85 97

RL= 2 kΩto V+/2 80

LMV794 82 89 dB

VOUT = 0.3V to 4.7V, 88 110

RL= 10 kΩto V+/2 84

VOUT Output Voltage Swing High RL= 2 kΩto V+/2 LMV793 35 75

LMV794 35 75

RL= 10 kΩto V+/2 25 65

71 mV from

either rail

Output Voltage Swing Low RL= 2 kΩto V+/2 LMV793 42 75

LMV794 45 80

RL= 10 kΩto V+/2 20 65

IOUT Output Current Sourcing to V−45 60

VIN = 200 mV(7) 37 mA

Sinking to V+10 21

VIN = –200 mV(7) 6

ISSupply Current per Amplifier LMV793 1.15 1.40

1.75 mA

LMV794 per Channel 1.30 1.70

2.05

(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very

limited self-heating of the device such that TJ= TA. No specification of parametric performance is indicated in the electrical tables under

conditions of internal self-heating where TJ> TA.

(2) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using the

statistical quality control (SQC) method.

(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary

over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped

production material.

(4) Offset voltage average drift is determined by dividing the change in VOS by temperature change.

(5) Positive current corresponds to current flowing into the device.

(6) This parameter is specified by design and/or characterization and is not tested in production.

(7) The short circuit test is a momentary test, the short circuit duration is 1.5 ms.

Product Folder Links: LMV793 LMV794

V+

4 5

N/C

-IN

+IN

V-

N/C

OUTPUT

N/C

OUT A

-IN A

+IN A

V-

4+IN B

-IN B

OUT B

V+

OUTPUT

V-

+IN

V+

-IN

LMV793, LMV794

www.ti.com

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

5V Electrical Characteristics(1) (continued)

Unless otherwise specified, all limits are specified for TA= 25°C, V+= 5V, V−= 0V, VCM = V+/2 = VO.Boldface limits apply at

the temperature extremes.

Symbol Parameter Conditions Min Typ Max Units

(2) (3) (2)

SR Slew Rate AV= +10, Rising (10% to 90%) 35 V/μs

AV= +10, Falling (90% to 10%) 28

GBW Gain Bandwidth AV= +10, RL= 10 kΩ88 MHz

enInput Referred Voltage Noise Density f = 1 kHz 5.8 nV/√Hz

inInput Referred Current Noise Density f = 1 kHz 0.01 pA/√Hz

THD+N Total Harmonic Distortion + Noise f = 1 kHz, AV= 1, RL= 600Ω0.01 %

Connection Diagram

Figure 3. 5-Pin SOT-23 (LMV793) Figure 4. 8-Pin SOIC (LMV793) Figure 5. 8-Pin SOIC/VSSOP

(LMV794)

Top View Top View Top View

Product Folder Links: LMV793 LMV794

1.5 2.5 3.5 4.5 5.5 6.0

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

VOS (mV)

V+ (V)

-40°C

125°C

25°C

-0.3 0.6 1.5 2.4 3.3 4.2

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

VOS (mV)

VCM (V)

-40°C

25°C

125°C

V+ = 5V

-0.3 0 0.3 0.6 0.9 1.2

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

VOS (mV)

VCM (V)

125°C

25°C

-40°C

V+ = 1.8V

-40°C

-0.3 0.4 1.1 1.8

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

0.55

0.6

VOS (mV)

VCM (V)

V+ = 2.5V

125°C

25°C

1.5 2.5 3.5 4.5 5.5 6

0.4

0.8

1.2

1.6

SUPPLY CURRENT (mA)

V+ (V)

25°C

-40°C

125°C

1.5 2.5 3.5 4.5 5.5 6.0

SUPPLY CURRENT (mA)

V+ (V)

0.4

0.8

1.2

1.6

25°C

-40°C

125°C

LMV793, LMV794

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

www.ti.com

Typical Performance Characteristics

Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2.

Supply Current vs. Supply Voltage (LMV793) Supply Current vs. Supply Voltage (LMV794)

Figure 6. Figure 7.

VOS vs. VCM VOS vs. VCM

Figure 8. Figure 9.

VOS vs. VCM VOS vs. Supply Voltage

Figure 10. Figure 11.

Product Folder Links: LMV793 LMV794

1 2 3 4 5 6

ISINK (mA)

V+ (V)

25°C

125°C

-40°C

0 1 2 3 4 5

ISOURCE (mA)

VOUT (V)

125°C

25°C

1 2 3 4 5 6

ISOURCE (mA)

V+ (V)

125°C

25°C

-40°C

0 1 2 3 4

-50

IBIAS (pA)

VCM (V)

-40

-30

-20

-10

125°C

V+ = 5V

85°C

1.5 2.5 3.5 4.5 5.5

SLEW RATE (V/Ps)

V+ (V)

RISING EDGE

FALLING EDGE

0 1 2 3 4

-3

-2.5

-2

-1.5

-1

-0.5

0.5

1.5

IBIAS (pA)

VCM (V)

-40°C

25°C

V+ = 5V

LMV793, LMV794

www.ti.com

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

Typical Performance Characteristics (continued)

Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2.

Slew Rate vs. Supply Voltage Input Bias Current vs. VCM

Figure 12. Figure 13.

Input Bias Current vs. VCM Sourcing Current vs. Supply Voltage

Figure 14. Figure 15.

Sinking Current vs. Supply Voltage Sourcing Current vs. Output Voltage

Figure 16. Figure 17.

Product Folder Links: LMV793 LMV794

125°C

25°C

-40°C

VOUT FROM RAIL (mV)

1.8 2.5 3.2 3.9 4.6 5.3 6

V+ (V)

RLOAD = 2 k:

1.8 2.5 3.2 3.9 4.6 5.3 6

100

VOUT FROM RAIL (mV)

V+ (V)

125°C

25°C

-40°C

RLOAD = 600:

1.8 2.5 3.2 3.9 4.6 5.3 6

VOUT FROM RAIL (mV)

V+ (V)

125°C

25°C

-40°C

RLOAD = 2 k:

1.8 2.5 3.2 3.9 4.6 5.3 6

V+ (V)

VOUT FROM RAIL (mV)

-40°C

25°C

125°C

RLOAD = 10 k:

0 1 2 3 4 5

ISINK (mA)

VOUT (V)

125°C

25°C

-40°C

1.8 2.5 3.2 3.9 4.6 5.3 6

V+ (V)

VOUT FROM RAIL (mV)

125°C

25°C

-40°C

RLOAD = 10 k:

LMV793, LMV794

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

www.ti.com

Typical Performance Characteristics (continued)

Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2.

Sinking Current vs. Output Voltage Positive Output Swing vs. Supply Voltage

Figure 18. Figure 19.

Negative Output Swing vs. Supply Voltage Positive Output Swing vs. Supply Voltage

Figure 20. Figure 21.

Negative Output Swing vs. Supply Voltage Positive Output Swing vs. Supply Voltage

Figure 22. Figure 23.

Product Folder Links: LMV793 LMV794

10 100 1k 10k 100k

FREQUENCY (Hz)

0.01

0.02

0.03

0.04

0.05

THD+N (%)

V+ = 2.5V

VO = 1 VPP

AV = +10

RL = 100 k:

RL = 600:

10 100 1k 10k 100k

FREQUENCY (Hz)

0.01

0.02

0.03

0.04

THD+N (%)

V+ = 5V

VO = 4 VPP

AV = +10

RL = 600:

RL = 100 k:

020 40 60 80 100 120

CLOAD (pF)

OVERSHOOT AND UNDERSHOOT %

US%

OS%

0.1 1 10 1k 10k

FREQUENCY (Hz)

100

1000

100

VOLTAGE NOISE (nV/

Hz)

2.5V

1.8 2.5 3.2 3.9 4.6 5.3 6

V+ (V)

100

120

VOUT FROM RAIL (mV)

RLOAD = 600:

-40°C

25°C 125°C

400 nV/DIV

1S/DIV

VS = ±2.5V

VCM = 0.0V

LMV793, LMV794

www.ti.com

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

Typical Performance Characteristics (continued)

Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2.

Negative Output Swing vs. Supply Voltage Time Domain Voltage Noise

Figure 24. Figure 25.

Input Referred Voltage Noise vs. Frequency Overshoot and Undershoot vs. CLOAD

Figure 26. Figure 27.

THD+N vs. Frequency THD+N vs. Frequency

Figure 28. Figure 29.

Product Folder Links: LMV793 LMV794

10 mV/DIV

100 ns/DIV

VIN = 2 mVPP

f = 1 MHz, AV = +10

V+ = 5V, CL = 10 pF

200 mV/DIV

100 ns/DIV

VIN = 100 mVPP

f = 1 MHz, AV = +10

V+ = 2.5V, CL = 10 pF

100k 1M 10M 100M

-20

100

GAIN (dB)

FREQUENCY (Hz)

-20

100

PHASE (°)

PHASE

GAIN

V+ = 5V

CL = 20 pF

RL = 2 k:, 10 k:

10k 100k 1M 10M 100M

FREQUENCY (Hz)

0.1

100

1000

OUTPUT IMPEDANCE (:)

OUTPUT AMPLITUDE (VPP)

THD+N (dB)

0.01 0.1 1 10

-90

-80

-70

-60

-50

-40

V+ = 5V

f = 1 kHz

AV = +10

RL = 600:

RL = 100 k:

0.01 0.1 1 10

OUTPUT AMPLITUDE (VPP)

-80

-70

-60

-50

-40

THD+N (dB)

V+ = 2.5V

f = 1 kHz

AV = +10 RL = 100 k:

RL = 600:

LMV793, LMV794

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

www.ti.com

Typical Performance Characteristics (continued)

Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2.

THD+N vs. Peak-to-Peak Output Voltage (VOUT) THD+N vs. Peak-to-Peak Output Voltage (VOUT)

Figure 30. Figure 31.

Open Loop Gain and Phase Closed Loop Output Impedance vs. Frequency

Figure 32. Figure 33.

Small Signal Transient Response, AV= +10 Large Signal Transient Response, AV= +10

Figure 34. Figure 35.

Product Folder Links: LMV793 LMV794

0 1 2 3 4

CCM (pF)

VCM (V)

V+ = 5V

100 1k 10k 100k 1M

FREQUENCY (Hz)

100

PSRR (dB)

-PSRR, 5V

-PSRR, 2.5V

+PSRR, 5V

+PSRR, 2.5V

120

10 1k 100k 10M

FREQUENCY (Hz)

CMRR (dB)

1M10k

100

V+ = 2.5V

V+ = 5V

10 mV/DIV

100 ns/DIV

VIN = 2 mVPP

f = 1 MHz, AV = +10

V+ = 2.5V, CL = 10 pF

200 mV/DIV

100 ns/DIV

VIN = 100 mVPP

f = 1 MHz, AV = +10

V+ = 5V, CL = 10 pF

LMV793, LMV794

www.ti.com

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

Typical Performance Characteristics (continued)

Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2.

Small Signal Transient Response, AV= +10 Large Signal Transient Response, AV= +10

Figure 36. Figure 37.

PSRR vs. Frequency CMRR vs. Frequency

Figure 38. Figure 39.

Input Common Mode Capacitance vs. VCM

Figure 40.

Product Folder Links: LMV793 LMV794

LMV793, LMV794

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

www.ti.com

APPLICATION INFORMATION

ADVANTAGES OF THE LMV793/LMV794

Wide Bandwidth at Low Supply Current

The LMV793/LMV794 are high performance op amps that provide a GBW of 88 MHz with a gain of 10 while

drawing a low supply current of 1.15 mA. This makes them ideal for providing wideband amplification in data

acquisition applications.

With the proper external compensation the LMV793/LMV794 can be operated at gains of ±1 and still maintain

much faster slew rates than comparable unity gain stable amplifiers. The increase in bandwidth and slew rate is

obtained without any additional power consumption over the LMV796.

Low Input Referred Noise and Low Input Bias Current

The LMV793/LMV794 have a very low input referred voltage noise density (5.8 nV/√Hz at 1 kHz). A CMOS input

stage ensures a small input bias current (100 fA) and low input referred current noise (0.01 pA/√Hz). This is very

helpful in maintaining signal integrity, and makes the LMV793/LMV794 ideal for audio and sensor based

applications.

Low Supply Voltage

The LMV793 and LMV794 have performance specified at 2.5V and 5V supply. These parts are specified to be

operational at all supply voltages between 2.0V and 5.5V, for ambient temperatures ranging from −40°C to

125°C, thus utilizing the entire battery lifetime. The LMV793/LMV794 are also specified to be operational at 1.8V

supply voltage, for temperatures between 0°C and 125°C optimizing their usage in low-voltage applications.

RRO and Ground Sensing

Rail-to-rail output swing provides the maximum possible dynamic range. This is particularly important when

operating at low supply voltages. An innovative positive feedback scheme is used to boost the current drive

capability of the output stage. This allows the LMV793/LMV794 to source more than 40 mA of current at 1.8V

supply. This also limits the performance of these parts as comparators, and hence the usage of the LMV793 and

the LMV794 in an open-loop configuration is not recommended. The input common-mode range includes the

negative supply rail which allows direct sensing at ground in single supply operation.

Small Size

The small footprint of the LMV793 and the LMV794 package saves space on printed circuit boards, and enables

the design of smaller electronic products, such as cellular phones, pagers, or other portable systems. Long

traces between the signal source and the op amp make the signal path more susceptible to noise pick up.

The physically smaller LMV793/LMV794 packages, allow the op amp to be placed closer to the signal source,

thus reducing noise pickup and maintaining signal integrity.

USING THE DECOMPENSATED LMV793

Advantages of Decompensated Op Amps

A unity gain stable op amp, which is fully compensated, is designed to operate with good stability down to gains

of ±1. The large amount of compensation does provide an op amp that is relatively easy to use; however, a

decompensated op amp is designed to maximize the bandwidth and slew rate without any additional power

consumption. This can be very advantageous.

The LMV793/LMV794 require a gain of ±10 to be stable. However, with an external compensation network (a

simple RC network) these parts can be stable with gains of ±1 and still maintain the higher slew rate. Looking at

the Bode plots for the LMV793 and its closest equivalent unity gain stable op amp, the LMV796, one can clearly

see the increased bandwidth of the LMV793. Both plots are taken with a parallel combination of 20 pF and 10 kΩ

for the output load.

Product Folder Links: LMV793 LMV794

AOL

Gmin

fdf1fu f2fu

fGBWP

UNITY-GAIN STABLE OP AMP

DECOMPENSATED OP AMP

1k 100k 100M

-20

100

GAIN (dB)

10M

10k

FREQUENCY (Hz)

-20

100

PHASE (°)

1k 100k 100M

-20

100

GAIN (dB)

10M

10k

FREQUENCY (Hz)

GAIN

PHASE

-20

100

PHASE (°)

LMV793, LMV794

www.ti.com

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

Figure 41. LMV793 AVOL vs. Frequency

Figure 42. LMV796 AVOL vs. Frequency

Figure 41 shows the much larger 88 MHz bandwidth of the LMV793 as compared to the 17 MHz bandwidth of

the LMV796 shown in Figure 42. The decompensated LMV793 has five times the bandwidth of the LMV796.

What is a Decompensated Op Amp?

The differences between the unity gain stable op amp and the decompensated op amp are shown in Figure 43.

This Bode plot assumes an ideal two pole system. The dominant pole of the decompensated op amp is at a

higher frequency, f1, as compared to the unity-gain stable op amp which is at fdas shown in Figure 43. This is

done in order to increase the speed capability of the op amp while maintaining the same power dissipation of the

unity gain stable op amp. The LMV793/LMV794 have a dominant pole at 1.6 kHz. The unity gain stable

LMV796/LMV797 have their dominant pole at 300 Hz.

Figure 43. Open Loop Gain for Unity-Gain Stable Op Amp and Decompensated Op Amp

Product Folder Links: LMV793 LMV794

VOUT

VIN =1

VOUT

VIN =A

1 + AF

F = VA - VB

VOUT

LMV793

RIN

LMV793, LMV794

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

www.ti.com

Having a higher frequency for the dominate pole will result in:

1. The DC open-loop gain (AVOL) extending to a higher frequency.

2. A wider closed loop bandwidth.

3. Better slew rate due to reduced compensation capacitance within the op amp.

The second open loop pole (f2) for the LMV793/LMV794 occurs at 45 MHz. The unity gain (fu’) occurs after the

second pole at 51 MHz. An ideal two pole system would give a phase margin of 45° at the location of the second

pole. The LMV793/LMV794 have parasitic poles close to the second pole, giving a phase margin closer to 0°.

Therefore it is necessary to operate the LMV793/LMV794 at a closed loop gain of 10 or higher, or to add external

compensation in order to assure stability.

For the LMV796, the gain bandwidth product occurs at 17 MHz. The curve is constant from fdto fuwhich occurs

before the second pole.

For the LMV793/LMV794, the GBW = 88 MHz and is constant between f1and f2. The second pole at f2occurs

before AVOL = 1. Therefore fu’ occurs at 51 MHz, well before the GBW frequency of 88 MHz. For decompensated

op amps the unity gain frequency and the GBW are no longer equal. Gmin is the minimum gain for stability and

for the LMV793/LMV794 this is a gain of 18 to 20 dB.

Input Lead-Lag Compensation

The recommended technique which allows the user to compensate the LMV793/LMV794 for stable operation at

any gain is lead-lag compensation. The compensation components added to the circuit allow the user to shape

the feedback function to make sure there is sufficient phase margin when the loop gain is as low as 0 dB and still

maintain the advantages over the unity gain op amp. Figure 44 shows the lead-lag configuration. Only RCand C

are added for the necessary compensation.

Figure 44. LMV793 with Lead-Lag Compensation for Inverting Configuration

To cover how to calculate the compensation network values it is necessary to introduce the term called the

feedback factor or F. The feedback factor F is the feedback voltage VA-VBacross the op amp input terminals

relative to the op amp output voltage VOUT.

(1)

From feedback theory the classic form of the feedback equation for op amps is:

(2)

A is the open loop gain of the amplifier and AF is the loop gain. Both are highly important in analyzing op amps.

Normally AF >>1 and so the above equation reduces to:

(3)

Deriving the equations for the lead-lag compensation is beyond the scope of this datasheet. The derivation is

based on the feedback equations that have just been covered. The inverse of feedback factor for the circuit in

Figure 44 is:

Product Folder Links: LMV793 LMV794

Ff = f1 + RF

RIN

1 + RIN || RF

Ff = 0 1 + RF

RIN

fz = 1

2SRc + RIN || RF)C

fp = 1

2SRcC

F¨

§1 + RF

RIN

§1 + s(Rc + RIN || RF) C

1 + sRcC

LMV793, LMV794

www.ti.com

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

(4)

where 1/F's pole is located at

(5)

1/F's zero is located at

(6)

(7)

The circuit gain for Figure 44 at low frequencies is −RF/RIN, but F, the feedback factor is not equal to the circuit

gain. The feedback factor is derived from feedback theory and is the same for both inverting and non-inverting

configurations. Yes, the feedback factor at low frequencies is equal to the gain for the non-inverting configuration.

(8)

From this formula, we can see that

• 1/F's zero is located at a lower frequency compared with 1/F's pole.

• 1/F's value at low frequency is 1 + RF/RIN.

• This method creates one additional pole and one additional zero.

• This pole-zero pair will serve two purposes:

– To raise the 1/F value at higher frequencies prior to its intercept with A, the open loop gain curve, in order

to meet the Gmin = 10 requirement. For the LMV793/LMV794 some overcompensation will be necessary

for good stability.

– To achieve the previous purpose above with no additional loop phase delay.

Please note the constraint 1/F ≥Gmin needs to be satisfied only in the vicinity where the open loop gain A and

1/F intersect; 1/F can be shaped elsewhere as needed. The 1/F pole must occur before the intersection with the

open loop gain A.

In order to have adequate phase margin, it is desirable to follow these two rules:

1. 1/F and the open loop gain A should intersect at the frequency where there is a minimum of 45° of phase

margin. When over-compensation is required the intersection point of A and 1/F is set at a frequency where

the phase margin is above 45°, therefore increasing the stability of the circuit.

2. 1/F’s pole should be set at least one decade below the intersection with the open loop gain A in order to take

advantage of the full 90° of phase lead brought by 1/F’s pole which is F’s zero. This ensures that the effect of

the zero is fully neutralized when the 1/F and A plots intersect each other.

Calculating Lead-Lag Compensation for LMV793/LMV794

Figure 45 is the same plot as Figure 41, but the AVOL and phase curves have been redrawn as smooth lines to

more readily show the concepts covered, and to clearly show the key parameters used in the calculations for

lead-lag compensation.

Product Folder Links: LMV793 LMV794

1 + RF

RIN

1 + RIN || RF

= 18 dB = 7.9

1k 10k 100k 1M 10M 100M

-20

100

GAIN (dB) and PHASE (°C)

FREQUENCY (Hz)

PHASE

AVOL

with ADDITIONAL

COMPENSATION

GBP

2nd POLE

ADDITIONAL

COMPENSATION

45° PHASE

MARGIN

LMV793, LMV794

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

www.ti.com

Figure 45. LMV793/LMV794 Simplified Bode Plot

To obtain stable operation with gains under 10 V/V the open loop gain margin must be reduced at high

frequencies to where there is a 45° phase margin when the gain margin of the circuit with the external

compensation is 0 dB. The pole and zero in F, the feedback factor, control the gain margin at the higher

frequencies. The distance between F and AVOL is the gain margin; therefore, the unity gain point (0 dB) is where

F crosses the AVOL curve.

For the example being used RIN = RFfor a gain of −1. Therefore F = 6 dB at low frequencies. At the higher

frequencies the minimum value for F is 18 dB for 45° phase margin. From Equation 8 we have the following

relationship:

(9)

Now set RF= RIN = R. With these values and solving for RCwe have RC= R/5.9. Note that the value of C does

not affect the ratio between the resistors. Once the value of the resistors are set, then the position of the pole in

F must be set. A 2 kΩresistor is used for RFand RIN in this design. Therefore the value for RCis set at 330Ω,

the closest standard value for 2 kΩ/5.9.

Rewriting Equation 5 to solve for the minimum capacitor value gives the following equation:

C = 1/(2πfpRC) (10)

The feedback factor curve, F, intersects the AVOL curve at about 12 MHz. Therefore the pole of F should not be

any larger than 1.2 MHz. Using this value and Rc= 330Ωthe minimum value for C is 390 pF. Figure 46 shows

that there is too much overshoot, but the part is stable. Increasing C to 2.2 nF did not improve the ringing, as

shown in Figure 47.

Figure 46. First Try at Compensation, Gain = −1

Product Folder Links: LMV793 LMV794

LMV793, LMV794

www.ti.com

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

Figure 47. C Increased to 2.2 nF, Gain = −1

Some over-compensation appears to be needed for the desired overshoot characteristics. Instead of intersecting

the AVOL curve at 18 dB, 2 dB of over-compensation will be used, and the AVOL curve will be intersected at 20

dB. Using Equation 8 for 20 dB, or 10 V/V, the closest standard value of RCis 240Ω. The following two

waveforms show the new resistor value with C = 390 pF and 2.2 nF. Figure 49 shows the final compensation and

a very good response for the 1 MHz square wave.

Figure 48. RC= 240Ωand C = 390 pF, Gain = −1

Figure 49. RC= 240Ωand C = 2.2 nF, Gain = −1

Product Folder Links: LMV793 LMV794

LMV793, LMV794

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

www.ti.com

To summarize, the following steps were taken to compensate the LMV793 for a gain of −1:

1. Values for Rcand C were calculated from the Bode plot to give an expected phase margin of 45°. The values

were based on RIN = RF=2kΩ. These calculations gave Rc= 330Ωand C = 390 pF.

2. To reduce the ringing C was increased to 2.2 nF which moved the pole of F, the feedback factor, farther

away from the AVOL curve.

3. There was still too much ringing so 2 dB of over-compensation was added to F. This was done by

decreasing RCto 240Ω.

The LMV796 is the fully compensated part which is comparable to the LMV793. Using the LMV796 in the same

setup, but removing the compensation network, provide the response shown in Figure 50 .

Figure 50. LMV796 Response

For large signal response the rise and fall times are dominated by the slew rate of the op amps. Even though

both parts are quite similar the LMV793 will give rise and fall times about 2.5 times faster than the LMV796. This

is possible because the LMV793 is a decompensated op amp and even though it is being used at a gain of −1,

the speed is preserved by using a good technique for external compensation.

Non-Inverting Compensation

For the non-inverting amp the same theory applies for establishing the needed compensation. When setting the

inverting configuration for a gain of −1, F has a value of 2. For the non-inverting configuration both F and the

actual gain are the same, making the non-inverting configuration more difficult to compensate. Using the same

circuit as shown in Figure 44, but setting up the circuit for non-inverting operation (gain of +2) results in similar

performance as the inverting configuration with the inputs set to half the amplitude to compensate for the

additional gain. Figure 51 below shows the results.

Figure 51. RC= 240Ωand C = 2.2 nF, Gain = +2

Product Folder Links: LMV793 LMV794

1 + RF

= 18 dB = 7.9

LMV793

LMV793, LMV794

www.ti.com

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

Figure 52. LMV796 Response Gain = +2

The response shown in Figure 51 is close to the response shown in Figure 49. The part is actually slightly faster

in the non-inverting configuration. Decreasing the value of RCto around 200Ωcan decrease the negative

overshoot but will have slightly longer rise and fall times. The other option is to add a small resistor in series with

the input signal. Figure 52 shows the performance of the LMV796 with no compensation. Again the

decompensated parts are almost 2.5 times faster than the fully compensated op amp.

The most difficult op amp configuration to stabilize is the gain of +1. With proper compensation the

LMV793/LMV794 can be used in this configuration and still maintain higher speeds than the fully compensated

parts. Figure 53 shows the gain = 1, or the buffer configuration, for these parts.

Figure 53. LMV793 with Lead-Lag Compensation for Non-Inverting Configuration

Figure 53 is the result of using Equation 8 and additional experimentation in the lab. RPis not part of Equation 8,

but it is necessary to introduce another pole at the input stage for good performance at gain = +1. Equation 8 is

shown below with RIN =∞.

(11)

Using 2 kΩfor RFand solving for RCgives RC= 2000/6.9 = 290Ω. The closest standard value for RCis 300Ω.

After some fine tuning in the lab RC= 330Ωand RP= 1.5 kΩwere choosen as the optimum values. RPtogether

with the input capacitance at the non-inverting pin inserts another pole into the compensation for the

LMV793/LMV794. Adding this pole and slightly reducing the compensation for 1/F (using a slightly higher resistor

value for RC) gives the optimum response for a gain of +1. Figure 54 is the response of the circuit shown in

Figure 53.Figure 55 shows the response of the LMV796 in the buffer configuration with no compensation and RP

= RF= 0.

Product Folder Links: LMV793 LMV794

LMV793, LMV794

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

www.ti.com

Figure 54. RC= 330Ωand C = 10 nF, Gain = +1

Figure 55. LMV796 Response Gain = +1

With no increase in power consumption the decompensated op amp offers faster speed over the compensated

equivalent part. These examples used RF=2kΩ. This value is high enough to be easily driven by the

LMV793/LMV794, yet small enough to minimize the effects from the parasitic capacitance of both the PCB and

the op amp.

Note: When using the LMV793/LMV794, proper high frequency PCB layout must be followed. The GBW of these

parts is 88 MHz, making the PCB layout significantly more critical than when using the compensated

counterparts which have a GBW of 17 MHz.

TRANSIMPEDANCE AMPLIFIER

An excellent application for either the LMV793 or the LMV794 is as a transimpedance amplifier. With a GBW

product of 88 MHz these parts are ideal for high speed data transmission by light. The circuit shown on the front

page of the datasheet is the circuit used to test the LMV793/LMV794 as transimpedance amplifiers. The only

change is that VB is tied to the VCC of the part, thus the direction of the diode is reversed from the circuit shown

on the front page.

Very high speed components were used in testing to check the limits of the LMV793/LMV794 in a

transimpedance configuration. The photo diode part number is PIN-HR040 from OSI Optoelectronics. The diode

capacitance for this part is only about 7 pF for the 2.5V bias used (VCC to virtual ground). The rise time for this

diode is 1 nsec. A laser diode was used for the light source. Laser diodes have on and off times under 5 nsec.

The speed of the selected optical components allowed an accurate evaluation of the LMV793 as a

transimpedance amplifier. TIs Evaluation Board for decompensated op amps, PN 551013271-001 A, was used

and only minor modifications were necessary and no traces had to be cut.

Product Folder Links: LMV793 LMV794

p = 1

1 + sCFRF

z = 1

1 + sRF (CF + CIN)

F = 1 + sCFRF

1 + sRF (CF + CIN)

IDIODE VOUT

LMV793

CIN

2.5V CF

DPHOTO

CDCCM

-2.5V

2.5V

VOUT

LMV793

LMV793, LMV794

www.ti.com

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

Figure 56. Transimpedance Amplifier

Figure 56 is the complete schematic for a transimpedance amplifier. Only the supply bypass capacitors are not

shown. CDrepresents the photo diode capacitance which is given on its datasheet. CCM is the input common

mode capacitance of the op amp and, for the LMV793 it is shown in the last drawing of the Typical Performance

Characteristics section of this datasheet. In Figure 56 the inverting input pin of the LMV793 is kept at virtual

ground. Even though the diode is connected to the 2.5V line, a power supply line is AC ground, thus CDis

connected to ground.

Figure 57 shows the schematic needed to derive F, the feedback factor, for a transimpedance amplifier. In this

figure CD+ CCM = CIN. Therefore it is critical that the designer knows the diode capacitance and the op amp input

capacitance. The photo diode is close to an ideal current source once its capacitance is included in the model.

What kind of circuit is this? Without CFthere is only an input capacitor and a feedback resistor. This circuit is a

differentiator! Remember, differentiator circuits are inherently unstable and must be compensated. In this case CF

compensates the circuit.

Figure 57. Transimpedance Feedback Model

Using feedback theory, F = VA/VOUT, this becomes a voltage divider giving the following equation:

(12)

The noise gain is 1/F. Because this is a differentiator circuit, a zero must be inserted. The location of the zero is

given by:

(13)

CFhas been added for stability. The addition of this part adds a pole to the circuit. The pole is located at:

(14)

To attain maximum bandwidth and still have good stability the pole is to be located on the open loop gain curve

which is A. If additional compensation is required one can always increase the value of CF, but this will also

reduce the bandwidth of the circuit. Therefore A = 1/F, or AF = 1. For A the equation is:

Product Folder Links: LMV793 LMV794

VOUT = -RF

1 + sCFRFxIDIODE

1 + ¨

§CF + CIN

= 8S2´

¶2

GBW RF

2CF

= 1

ZCFRF

AF ´

¶P=´

¶GBW

x1 + sCFRF

1 + sRF (CF + CIN)=

¶GBW

¶x

1 + ¨

§CFRF

CFRF

1 + ¨

§RF (CF + CIN)

CFRF

2= 1

GBW

A = GBW

Z=´

LMV793, LMV794

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

www.ti.com

(15)

The expression fGBW is the gain bandwidth product of the part. For a unity gain stable part this is the frequency

where A = 1. For the LMV793 fGBW = 88 MHz. Multiplying A and F results in the following equation:

(16)

For the above equation s = jω. To find the actual amplitude of the equation the square root of the square of the

real and imaginary parts are calculated. At the intersection of F and A, we have:

(17)

After a bit of algebraic manipulation the above equation reduces to:

(18)

In the above equation the only unknown is CF. In trying to solve this equation the fourth power of CFmust be

dealt with. An excel spread sheet with this equation can be used and all the known values entered. Then through

iteration, the value of CFwhen both sides are equal will be found. That is the correct value for CF, and of course

the closest standard value is used for CF.

Before moving the lab, the transfer function of the transimpedance amplifier must be found and the units must be

in Ohms.

(19)

The LMV793 was evaluated for RF= 10 kΩand 100 kΩ, representing a somewhat lower gain configuration and

with the 100 kΩfeedback resistor a fairly high gain configuration. The RF= 10 kΩis covered first. Looking at the

Figure 39 chart for CCM for the operating point selected CCM = 15 pF. Note that for split supplies VCM = 2.5V, CIN

= 22 pF and fGBW = 88 MHz. Solving for CFthe calculated value is 1.75 pF, so 1.8 pF is selected for use.

Checking the frequency of the pole finds that it is at 8.8 MHz, which is right at the minimum gain recommended

for this part. Some over compensation was necessary for stability and the final selected value for CFis 2.7 pF.

This moves the pole to 5.9 MHz. Figure 58 and Figure 59 show the rise and fall times obtained in the lab with a

1V output swing. The laser diode was difficult to drive due to thermal effects making the starting and ending point

of the pulse quite different, therefore the two separate scope pictures.

Figure 58. Fall Time

Product Folder Links: LMV793 LMV794

LMV793, LMV794

www.ti.com

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

Figure 59. Rise Time

In Figure 58 the ringing and the hump during the on time is from the laser. The higher drive levels for the laser

gave ringing in the light source as well as light changing from the thermal characteristics. The hump is due to the

thermal characteristics.

Solving for CFusing a 100 kΩfeedback resistor, the calculated value is 0.54 pF. One of the problems with more

gain is the very small value for CF. A 0.5 pF capacitor was used, its measured value being 0.64 pF. For the 0.64

pF location the pole is at 2.5 MHz. Figure 60 shows the response for a 1V output.

Figure 60. High Gain Response

A transimpedance amplifier is an excellent application for the LMV793. Even with the high gain using a 100 kΩ

feedback resistor, the bandwidth is still well over 1 MHz. Other than a little over compensation for the 10 kΩ

feedback resistor configuration using the LMV793 was quite easy. Of course a very good board layout was also

used for this test. For information on photo diodes please contact OSI Optoelectronics, (310) 978-0516. For

further information on transimpedance amplifiers please contact your Texas Instruments representative.

Product Folder Links: LMV793 LMV794

LMV793, LMV794

SNOSAX6D –MARCH 2007–REVISED MARCH 2013

www.ti.com

REVISION HISTORY

Changes from Revision C (March 2013) to Revision D Page

• Changed layout of National Data Sheet to TI format .......................................................................................................... 23

Product Folder Links: LMV793 LMV794

PACKAGE OPTION ADDENDUM

www.ti.com 12-Oct-2017

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

LMV793MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV7

93MA

LMV793MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV7

93MA

LMV793MF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AS4A

LMV793MFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AS4A

LMV794MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV7

94MA

LMV794MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV7

94MA

LMV794MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AN4A

LMV794MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AN4A

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

PACKAGE OPTION ADDENDUM

www.ti.com 12-Oct-2017

Addendum-Page 2

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

LMV793MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1

LMV793MF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMV793MFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMV794MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1

LMV794MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LMV794MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 20-Dec-2016

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LMV793MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0

LMV793MF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0

LMV793MFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0

LMV794MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0

LMV794MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0

LMV794MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 20-Dec-2016

Pack Materials-Page 2

www.ti.com

PACKAGE OUTLINE

TYP

0.22

0.08

0.25

3.0

2.6

2X 0.95

1.9

1.45 MAX

TYP

0.15

0.00

5X 0.5

0.3

TYP

0.6

0.3

TYP

1.9

3.05

2.75

1.75

1.45

(1.1)

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

4214839/C 04/2017

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Refernce JEDEC MO-178.

0.2 C A B

INDEX AREA

PIN 1

GAGE PLANE

SEATING PLANE

0.1 C

SCALE 4.000

www.ti.com

EXAMPLE BOARD LAYOUT

0.07 MAX

ARROUND 0.07 MIN

ARROUND

5X (1.1)

5X (0.6)

(2.6)

(1.9)

2X (0.95)

(R0.05) TYP

4214839/C 04/2017

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

NOTES: (continued)

4. Publication IPC-7351 may have alternate designs.

5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

SYMM

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:15X

PKG

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

DEFINED

EXPOSED METAL

METAL

SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

EXPOSED METAL

www.ti.com

EXAMPLE STENCIL DESIGN

(2.6)

(1.9)

2X(0.95)

5X (1.1)

5X (0.6)

(R0.05) TYP

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

4214839/C 04/2017

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

7. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:15X

SYMM

PKG

www.ti.com

PACKAGE OUTLINE

TYP

0.22

0.08

0.25

3.0

2.6

2X 0.95

1.9

1.45 MAX

TYP

0.15

0.00

5X 0.5

0.3

TYP

0.6

0.3

TYP

1.9

3.05

2.75

1.75

1.45

(1.1)

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

4214839/C 04/2017

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Refernce JEDEC MO-178.

0.2 C A B

INDEX AREA

PIN 1

GAGE PLANE

SEATING PLANE

0.1 C

SCALE 4.000

www.ti.com

EXAMPLE BOARD LAYOUT

0.07 MAX

ARROUND 0.07 MIN

ARROUND

5X (1.1)

5X (0.6)

(2.6)

(1.9)

2X (0.95)

(R0.05) TYP

4214839/C 04/2017

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

NOTES: (continued)

4. Publication IPC-7351 may have alternate designs.

5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

SYMM

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:15X

PKG

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

DEFINED

EXPOSED METAL

METAL

SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

EXPOSED METAL

www.ti.com

EXAMPLE STENCIL DESIGN

(2.6)

(1.9)

2X(0.95)

5X (1.1)

5X (0.6)

(R0.05) TYP

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

4214839/C 04/2017

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

7. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:15X

SYMM

PKG

IMPORTANT NOTICE

Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its

semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers

should obtain the latest relevant information before placing orders and should verify that such information is current and complete.

TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated

circuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products and

services.

Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is

accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduced

documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements

different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the

associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.

Buyers and others who are developing systems that incorporate TI products (collectively, “Designers”) understand and agree that Designers

remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have

full and exclusive responsibility to assure the safety of Designers' applications and compliance of their applications (and of all TI products

used in or for Designers’ applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with

respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous

consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and

take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will

thoroughly test such applications and the functionality of such TI products as used in such applications.

TI’s provision of technical, application or other design advice, quality characterization, reliability data or other services or information,

including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to

assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any

way, Designer (individually or, if Designer is acting on behalf of a company, Designer’s company) agrees to use any particular TI Resource

solely for this purpose and subject to the terms of this Notice.

TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI

products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,

enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically

described in the published documentation for a particular TI Resource.

Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that

include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE

TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY

RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or

other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information

regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or

endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the

third party, or a license from TI under the patents or other intellectual property of TI.

TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR

REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO

ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF

MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL

PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNER AGAINST ANY CLAIM,

INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF

PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL,

DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN

CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN

ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949

and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements.

Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such

products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards

and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must

ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in

life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use.

Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life

support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all

medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S.

TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product).

Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications

and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory

requirements in connection with such selection.

Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s non-

compliance with the terms and provisions of this Notice.

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

Mouser Electronics

Authorized Distributor

Click to View Pricing, Inventory, Delivery & Lifecycle Information:

Texas Instruments:

LMV793MA/NOPB LMV793MAX/NOPB LMV793MF/NOPB LMV793MFX/NOPB