
SEMICONDUCTOR TECHNICAL DATA
4–334 REV 5
Motorola, Inc. 1996
3/93
  
The MC1650 and the MC1651 are very high speed comparators utilizing
differential amplifier inputs to sense analog signals above or below a reference
level. An output latch provides a unique sample-hold feature. The MC1650
provides high impedance Darlington inputs, while the MC1651 is a lower
impedance option, with higher input slew rate and higher speed capability.
The clock inputs (Ca and Cb) operate from MECL III or MECL 10,000 digital
levels. When Ca is at a logic high level, Q0 will be at a logic high level provided
that V1
u
V2 (V1 is more positive than V2). Q0 is the logic complement of Q0.
When the clock input goes to a low logic level, the outputs are latched in their
present state.
Assessment of the performance differences between the MC1650 and the
MC1651 may be based upon the relative behaviors shown in Figures 4 and 7.
•PD= 330 mW typ/pkg (No Load)
•tpd = 3.5 ns typ (MC1650)
= 3.0 ns typ (MC1651)
•Input Slew Rate = 350 V/µs (MC1650)
= 500 V/µs (MC1651)
•Differential Input Voltage: 5.0 V (–30°C to +85°C)
•Common Mode Range:
–3.0 V to +2.5 V (–30°C to +85°C) (MC1651)
–2.5 V to +3.0 V (–30°C to +85°C) (MC1650)
•Resolution:
p
20 mV (–30°C to +85°C)
•Drives 50 Ω lines
Number at end of terminal denotes pin number for L package (Case 620).
LOGIC DIAGRAM
+
–
+
–
V1A 6
V2A 5
CA 4
V1B 12
V2B 11
CB 13
2 Q0
3 Q0
14 Q1
15 Q1
VCC = +5.0 V = PIN 7, 10
VEE = –5.2 V = PIN 8
GND = PIN 1, 16
DQ
Q
DQ
Q
TRUTH TABLE
C V1 , V2Q0n + 1Q0n + 1
HV
1
u
V2HL
HV
1
t
V2LH
L X X Q0nQ0n


PIN ASSIGNMENT
GND
Q0
Q0
CA
V2A
V1A
VCC
VEE
GND
Q1
Q1
CB
V1B
V2B
VCC
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
MC1650 MC1651
4–335 MOTOROLAMECL Data
DL122 — Rev 6
ELECTRICAL CHARACTERISTICS
Test Limits
–30°C +25°C +85°C
Characteristic Symbol Min Max Min Max Min Max Unit
Power Supply Drain Current Positive
Negative ICC
IE25*
55* mAdc
Input Current MC1650
MC1651 Iin 10
40 µAdc
Input Leakage Current MC1650
MC1651 IR7.0
10.0 µAdc
Clock Input Current IinH 350
Output Voltage Logic 1 VOH –1.045 –0.875 –0.960 –0.810 –0.890 –0.700 Vdc
Output Voltage Logic 0 VOL –1.890 –1.650 –1.850 –1.620 –1.830 –1.575 Vdc
Threshold Voltage (Note 2.) Logic 1 VOHA –1.065 –0.980 –0.910 Vdc
Threshold Voltage (Note 2.) Logic 0 VOLA –1.630 –1.600 –1.555 Vdc
1. All data is for 1/2 MC1650 or MC1651, except data marked (*) which refers to the entire package.
2. These tests are done in order indicated. See Figure 5.
3. Maximum Power Supply Voltages (beyond which device life may be impaired): |VEE| + |VCC| ≥ 12 Vdc.
4. All Temperature VA3 VA4 VA5 VA6
MC1650 +3.0 +2.98 –2.5 –2.48
MC1651 +2.5 +2.48 –3.0 –2.98
MC1650 MC1651
MOTOROLA MECL Data
DL122 — Rev 6
4–336
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (V olts)
@ Test Temperature VIHmax VILmin VIHAmin VILAmax VA1 VA2 VA3 VA4 VA5 VA6 VCC3. VEE3.
–30°C–0.875 –1.890 –1.180 –1.515 +0.02 +0.02
SN 4
+5.0 –5.2
+25°C–0.810 –1.850 –1.095 –1.485 +0.02 +0.02 See Note 4. +5.0 –5.2
+85°C–0.700 –1.830 –1.025 –1.440 +0.02 +0.02 +5.0 –5.2
TEST VOLT AGE APPLIED T O PINS LISTED BELOW
(VCC)
Characteristic Symbol VIHmax VILmin VIHAmin VILAmax VA1 VA2 VA3 VA4 VA5 VA6 (VCC)
Gnd
Power Supply Pos
Drain Current Neg ICC
IE4,13 4,13 6,12
6,12 1,5,11,16
1,5,11,16
Input Current MC1650
MC1651 Iin 413 12 6 1,5,11,16
Input Leakage MC1650
Current MC1651 IR4 13 12 6 1,5,11,16
Clock Input Current IinH 413 6,12 1,5,11,16
Output Voltage Logic 1 VOH 4,13 6,12
5,11
5,11
6,12
6,12
5,11
5,11
6,12
5,11
6,12
6,12
5,11
1,5,11,16
1,6,12,16
1,16
1,16
1,5,11,16
1,6,12,16
1,16
1,16
Output Voltage Logic 0 VOL 4,13 5,11
6,12
6,12
5,11
5,11
6,12
6,12
5,11
6,12
5,11
5,11
6,12
1,5,11,16
1,6,12,16
1,16
1,16
1,5,11,16
1,6,12,16
1,16
1,16
Threshold Logic 1
Voltage
Note 2.
VOHA 13 4
44
4
6
6
6
6
1,5,16
Threshold Logic 0
Voltage
Note 2.
VOLA 13 4
44
4
6
6
6
6
1,5,16
1. All data is for 1/2 MC1650 or MC1651, except data marked (*) which refers to the entire package.
2. These tests are done in order indicated. See Figure 5.
3. Maximum Power Supply Voltages (beyond which device life may be impaired): |VEE| + |VCC| ≥ 12 Vdc.
4. All Temperature VA3 VA4 VA5 VA6
MC1650 +3.0 +2.98 –2.5 –2.48
MC1651 +2.5 +2.48 –3.0 –2.98
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner .
MC1650 MC1651
4–337 MOTOROLAMECL Data
DL122 — Rev 6
MC1651 Inputs
VCC
7, 10 Gnd
1Gnd
16
A
B
C2 Q
3 Q
4
Clock
RP
8 VEE
D
E
(Both Devices)
A
B
C
D
E
V1 6
V2 5
MC1650 Inputs
A
B
C
V1 6
V2 5
D
E
CIRCUIT SCHEMATIC
1/2 of Device Shown
SWITCHING TEST VOLTAGE VALUES
@Test (Volts)
@Test
Temperature VR1 VR2 VR3 VXVXX VCC1VEE1
–30°C +2.0
SN 4
+1.04 +2.0 +7.0 –3.2
+25°C +2.0 See Note 4 +1.11 +2.0 +7.0 –3.2
+85°C +2.0 +1.19 +2.0 +7.0 –3.2
Ch i i
Sbl
–30°C +25°C +85°C
Ui
Conditions
Characteristic Symbol Min Max Min Max Min Max Unit
Conditions
(See Figures 1–3)
Switching T imes
Propagation Delay
(50% to 50%) V-Input
tpd
2.0 5.0 2.0 5.0 2.0 5.7
ns VR1 to V2, VX to Clock, P1 to V1, or,
VR2 to V2, VX to Clock, P2 to V1, or,
VR3 to V2, VX to Clock, P3 to V1.
Clock22.0 4.7 2.0 4.7 2.0 5.2 VR1 to V2, P1 to V1 and P4 to Clock,
or, VR1 to V1, P1 to V2 and P4 to Clock.
Clock Enable3tsetup — — 2.5 — — — ns
VR1 to V2P1to V1P4to Clock
Clock Aperture3tap — — 1.5 — — — ns
V
R1
t
o
V
2,
P
1
t
o
V
1,
P
4
t
o
Cl
oc
k
Rise Time (10% to 90%) t+ 1.0 3.5 1.0 3.5 1.0 3.8 ns
VRto V2VXto Clock P1to V1
Fall T ime (10% to 90%) t–1.0 3.0 1.0 3.0 1.0 3.3 ns VR to V2, VX to Clock, P1 to V1.
NOTES:
1. Maximum Power Supply V oltages (beyond which device life
may be impaired:
VCC + VEE
q
12 Vdc.
2. Unused clock inputs may be tied to ground.
3. See Figure 3.
All Temperatures VR2
MC1650 +4.9
MC1651 +4.4
VR3
–0.4
–0.9
4.
MC1650 MC1651
MOTOROLA MECL Data
DL122 — Rev 6
4–338
FIGURE 1 — SWITCHING TIME TEST CIRCUIT @ 25°C
Vin to Channel A
VR1, VR2, VR3
P1
P2
P3
VX
P4
+
–
VCC =
+7.0 Vdc VXX =
+2.0 Vdc
Vout to
Channel B
0.1
µ
F0.1
µ
F
10 7116
VEE
0.1
µ
F
VEE =
–3.2 Vdc
VCC Gnd
DQ
Q
C
DQ
CQ
Note:All power supply and logic levels are shown shifted 2.0 volts positive.
50 ohm termination to ground located in each scope channel input.
All input and output cables to the scope are equal lengths of 50 ohm coaxial cable.
+
–
V — INPUT TO OUTPUT CLOCK TO OUTPUT
Vin
Q
50%
tpd
50%
tpd
90%
t+
10%
50%
t –
VIH
VR
VIL
Test pulses: t +, t– = 1.5 ± 0.2 ns (10% to 90%)
f = 5.0 MHz
50% Duty Cycle
P1
Vin
30 ns
P4
C
Q
50%
tpd
50%
40 ns
50%
30 ns
30 ns 40 ns 30 ns
tpd +0.31 V
+1.11 V
VIH + 2.1 V
VR + 2.0 V
VIL + 1.9 V
P4: t+, t– = 1.5
±
0.2 ns.
FIGURE 2 — SWITCHING AND PROPAGATION WAVEFORMS @ 25 °C
The pulse levels shown are used to check ac parameters
over the full common-mode range.
Coax
P1 P2 P3
TEST PULSE LEVELS
VIL
VR
VIH
MC1650 MC1651 MC1650 MC1651 MC1650 MC1651
+2.1 V +2.1 V +5.0 V +4.5 V –0.3 V –0.8 V
+2.0 V +2.0 V +4.9 V +4.4 V –0.4 V –0.9 V
+1.9 V +1.9 V +4.8 V +4.3 V –0.5 V –1.0 V
MC1650 MC1651
4–339 MOTOROLAMECL Data
DL122 — Rev 6
Vin to Channel A
VEE = –3.2 Vdc
8
0.1
µ
F
50
VEE
D
Vin
0.1
µ
F
D
10 7
–
+
Q
Q
C
–
VR
Q
Q
16
C
Gnd
+VCC 1
Vout to Channel B
0.1
µ
F
FIGURE 3 — CLOCK ENABLE AND APERTURE TIME TEST CIRCUIT AND WAVEFORMS @ 25°C
Vin Negative
Vin Positive
C
Q Positive
Q Negative
Clock Aperature
Time
50% V“1”
“0”
“1”
V
50%
VR + 100 mV = +2.1 V
Clock Enable
Time
VR = 2.0 V
VR – 100 mV = +1.9 V
VIH = +1.11 V
VIL = +0.31 V
“0”
Clock enable time = minimum time between analog and clock signal such that output switches, and tpd
(analog to Q) is not degraded by more than 200 ps.
Clock aperture time = time difference between clock enable time and time that output does not switch and
V is less than 150 mV.
Note: All power supply and logic levels are shown shifted 2.0 volts positive.
50%
ANALOG SIGNAL POSITIVE AND NEGATIVE SLEW CASE
50 ohm termination to ground located in each scope channel input.
All input and output cables to the scope are equal lengths of 50 ohms coaxial cable.
Vdc Vdc
VCC = +7.0 VXX = +2.0
tpd
tpd
MC1650 MC1651
MOTOROLA MECL Data
DL122 — Rev 6
4–340
TEST CIRCUIT
POSITIVE PULSE DIAGRAM NEGATIVE PULSE DIAGRAM
PROPAGATION DELAY versus PULSE AMPLITUDE
PROPAGATION DELAY versus OVERDRIVE
FIGURE 4 — PROPAGATION DELAY (tpd) versus
INPUT PULSE AMPLITUDE AND CONSTANT OVERDRIVE
Vin
Vref
VIH
50
Vref = Gnd
DQ
1/2 Device
CQ
Q
50
50 –2.0 V
Positive
Overdrive
Vref
Vin PA
tpd
50%
Q
Negative
Overdrive
PB
Vin
Vref tpd
Q
Input Switching time is constant
at 1.5 ns (10% to 90%).
+
–
MC1651
MC1650
OVERDRIVE (VOLTS)
0.3 0.5 0.7
1.0
0.04 102.50.07 1.00.20.1
2.0
0.02
0
0.01
MC1650
tpd referenced to PA, PB = 20 mV
102.51.00.50.20.10.050.020.01
4.0
PULSE AMPLITUDE PA, PB (VOLTS)
0
1.0
2.0
3.0
5.0
Negative Going Pulse
PROPAGATION DELAY INCREASE (ns)PROPAGATION DELAY INCREASE (ns)
Overdrive Constant @ 100 mV
Positive Going Pulse
tpd is referenced to 2.5 V overdrive.
PA, PB, Constant @ 100 mV
Positive Overdrive (PA)
Negative Overdrive (PB)
tpd is measured from V ref on the input
to 50% on the output.
MC1651
MC1650 MC1651
4–341 MOTOROLAMECL Data
DL122 — Rev 6
FIGURE 5 — LOGIC THRESHOLD TESTS (WAVEFORM SEQUENCE DIAGRAM)
+0.02 V
–0.02 V
Vin
VIHA
VILA
C
“1”
“0”
“1”
Q
“0”
Q
1234
Sequential
Test Number
(See Test Table)
Differential
Input
Vin
+
–
VIH
Vref
DQ
CQ
Q
50
–2.0 Vdc
1/2 Device
–2.5 Vdc
p
V ref
p
+2.5 Vdc
+
–
Q. OUTPUT VOLTAGE (VOLTS)
0
–1.0
–2.0–20 –15 –10 –5.0 Vref 5.0 10 15 20
Logic “1”
Logic “0”
Vin, DIFFERENTIAL INPUT VOLTAGE (mV)
TYPICAL TRANSFER CURVES
FIGURE 6 — TRANSFER CHARACTERISTICS (Q versus Vin)
TEST CONFIGURATION
Resolution
MC1650 MC1651
MOTOROLA MECL Data
DL122 — Rev 6
4–342
(A) TEST CIRCUIT
(B) TYPICAL OUTPUT LOGIC SWING versus FREQUENCY
FIGURE 7 — OUTPUT VOLTAGE SWING versus FREQUENCY
VIH
V1
V2DQ
CQ
1/2 Device
Q
50
50 –2.0 Vdc
+
–
50
FREQUENCY (MHz)
MC1650
FREQUENCY (MHz)
50 75 100
MC1651
200 1000
0.85
0.65
0.45
0.25
0.05
10 20 30 50 70 100 200 300
0.45
0.25
0.05
10 20 30 50 70 100 200 300
0.65
0.85
PEAK-TO-PEAK OUTPUT (VOLTS)
PEAK-TO-PEAK OUTPUT (VOLTS)
Input Voltage
mV Peak-to-Peak
20010075
Input Voltage
mV Peak-to-Peak
1000
MC1650 MC1651
4–343 MOTOROLAMECL Data
DL122 — Rev 6
TEST CIRCUIT
FIGURE 8 — INPUT CURRENT versus INPUT VOLTAGE
VCC+5.0 Vdc
0.1
µ
F710
+
–
+
–
DQ
CQ
DQ
CQ
V1
V2
VCC VCC 50
50 –2.0 Vdc
VIH
VEE Gnd Gnd
16
1
80.1
µ
F
VEE
–5.2 Vdc
Iin
Vin
+
–
I , INPUT CURRENT ( A)
in
µ
Vin, INPUT VOLTAGE (VOL TS)
Typical MC1651 (Complementary Input Grounded)
–30
°
C
+85
°
C
+25
°
C–30
°
C
+85
°
C
Typical MC1650 (Complementary Input Grounded)
0+1–1–2 +2
30
0
–5
–2.5
5
–5
25
20
Vin, INPUT VOLTAGE (VOL TS)
15
10
5
021–1–2–2.5
0
2.5
I , INPUT CURRENT ( A)
in
µ
+2.5
+25
°
C
MC1650 MC1651
MOTOROLA MECL Data
DL122 — Rev 6
4–344
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE V
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
–A–
–B–
–T–
FE
G
NK
C
SEATING
PLANE
16 PLD
S
A
M
0.25 (0.010) T
16 PLJ
S
B
M
0.25 (0.010) T
M
L
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.750 0.785 19.05 19.93
B0.240 0.295 6.10 7.49
C––– 0.200 ––– 5.08
D0.015 0.020 0.39 0.50
E0.050 BSC 1.27 BSC
F0.055 0.065 1.40 1.65
G0.100 BSC 2.54 BSC
H0.008 0.015 0.21 0.38
K0.125 0.170 3.18 4.31
L0.300 BSC 7.62 BSC
M0 15 0 15
N0.020 0.040 0.51 1.01
____
16 9
18
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
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applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
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Opportunity/Af firmative Action Employer.
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MC1650/D
*MC1650/D*
◊