HFD3020
TTL Output Receiver
APPLICATION
continued
Honeywell also offers companion transmitters designed
to operate in conjunction with the HFD3020.
OPERATION
Optical power (photons) from the fiber strikes the
photodiode and is converted to electrical current. This
current is then converted into a voltage in the
transimpedance preamplifier. The postamplifier is a
voltage gain stage with excellent temperature tracking.
The edge detection circuit includes an operational
amplifier configured as a differentiator, whose output is
proportional to the rate of change of the optical signal. A
latch retains the most recent edge transition and an
inverting buffer drives the TTL output. For example, a
light On to light Off transition of the input produces a
TTL high output logic level.
Bandwidth has been limited to minimize noise problems.
Reduced pulse width distortion (PWD) is a by-product of
the bandwidth limitation. The output of the differentiator
has a fixed settling time, assuring good PWD in most
applications. Another effect of fixed settling time is the
increase of PWD with increased optical power. Very
high input optical power may overdrive the differentiator,
causing high PWD due to the settling time. The
accompanying curves illustrate how PWD increases with
increased optical power, increased temperature, and
decreased duty cycle.
PWD manifests itself as an increase in the width of the
TTL low portion of an output waveform, with the TTL
high portion decreasing by a like amount. The amount of
PWD that a given system can tolerate without an error
due to a missing bit of information, is dependant upon
system considerations. The output of the HFD3020 will
typically connect to the input of some form of a Serial
Interface Adaptor IC. The specifications for that IC
govern the amount of PWD that can be tolerated in that
system.
The edge detection circuit monitors the output of the
differentiator, and triggers when its output exceeds
preset levels. These levels are established to be
sufficiently above the worst case RMS noise level to
allow excellent bit error rate and are low enough to give
high sensitivities which permit operation over long link
lengths. This circuitry recognizes the polarity of the
change of the optical signal, setting the latch to a "1"
when the optical input decreases.
Note: the final output stage inverts the polarity. When
initially powered up, the output state is set to a "1". After
setting of the device occurs, incoming edge transitions
are recognized and logic switching occurs.
Because the HFD3020 reacts to transitions in the optical
signal rather than DC levels, it shows excellent stability
versus temperature and other operating conditions.
Also, the device is much less sensitive to the absolute
level of the optical signal than DC coupled receivers,
allowing for a large range of optical source powers
and/or link distances to be directly interfaced.
Honeywell reserves the right to make
changes in order to improve design and
supply the best products possible. h263