Product Folder Sample & Buy Support & Community Tools & Software Technical Documents bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 bq2510x 250-mA Single Cell Li-Ion Battery Chargers, 1-mA Termination, 75-nA Battery Leakage 1 Features 3 Description * The bq2510x series of devices are highly integrated Li-Ion and Li-Pol linear chargers targeted at spacelimited portable applications. The high input voltage range with input overvoltage protection supports lowcost unregulated adapters. 1 * * Charging - 1% Charge Voltage Accuracy - 10% Charge Current Accuracy - Supports Applications for Very Low Charge Currents - 10 mA to 250 mA - Supports minimum 1-mA Charge Termination Current - Ultra Low Battery Output Leakage Current Maximum 75 nA - Adjustable Termination and Precharge Threshold - High voltage Chemistry Support: 4.35 V with bq25100H/01H, 4.30 V with bq25100A Protection - 30-V Input Rating; with 6.5-V Input Overvoltage Protection - Input Voltage Dynamic Power Management - 125C Thermal Regulation; 150C Thermal Shutdown Protection - OUT Short-Circuit Protection and ISET Short Detection - Operation over JEITA Range via Battery NTC - 1/2 Fast-Charge-Current at Cold, 4.06 V (bq25100/01) or 4.2 V (bq25100H/01H) at Hot - Fixed 10 Hour Safety Timer System - Automatic Termination and Timer Disable Mode (TTDM) for Absent Battery Pack - Available in Small 1.60 mm x 0.90 mm DSBGA Package 2 Applications * * * * Fitness Accessories Smart Watches Bluetooth(R) Headsets Low-Power Handheld Devices The bq2510x has a single power output that charges the battery. A system load can be placed in parallel with the battery as long as the average system load does not keep the battery from charging fully during the 10 hour safety timer. The battery is charged in three phases: conditioning, constant current and constant voltage. In all charge phases, an internal control loop monitors the IC junction temperature and reduces the charge current if an internal temperature threshold is exceeded. The charger power stage and charge current sense functions are fully integrated. The charger function has high accuracy current and voltage regulation loops and charge termination. The pre-charge current and termination current threshold are programmed via an external resistor on the bq2510x. The fast charge current value is also programmable via an external resistor. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) bq25100 DSBGA (6) 1.60 mm x 0.90 mm bq25101 DSBGA (6) 1.60 mm x 0.90 mm bq25100A DSBGA (6) 1.60 mm x 0.90 mm bq25100H DSBGA (6) 1.60 mm x 0.90 mm bq25101H DSBGA (6) 1.60 mm x 0.90 mm bq25100L(2) DSBGA (6) 1.60 mm x 0.90 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. (2) Product preview. Contact the local TI representative for device details. SYSTEM USB Port or Adapter VBUS IN D+ D- OUT 1UF 1UF VSS GND PACK+ TS ISET 1.35k TEMP HOST PRETERM PACK- 6k bq25100 CE 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA. bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Device Comparison Table..................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 3 4 7.1 Absolute Maximum Ratings .................................... 7.2 Handling Ratings....................................................... 7.3 Recommended Operating Conditions ..................... 7.4 Thermal Information .................................................. 7.5 Electrical Characteristics.......................................... 7.6 Typical Characteristics .............................................. 4 4 4 4 5 8 Detailed Description ............................................ 12 8.1 8.2 8.3 8.4 Overview ................................................................. Functional Block Diagram ....................................... Feature Description................................................. Device Functional Modes........................................ 12 14 15 18 9 Application and Implementation ........................ 22 9.1 Application Information............................................ 22 9.2 Typical Application - Charger Application Design Example ................................................................... 22 10 Power Supply Recommendations ..................... 24 10.1 Leakage Current Effects on Battery Capacity....... 24 11 Layout................................................................... 24 11.1 Layout Guidelines ................................................. 24 11.2 Layout Example .................................................... 25 11.3 Thermal Package .................................................. 25 12 Device and Documentation Support ................. 26 12.1 12.2 12.3 12.4 12.5 Device Support .................................................... Related Links ........................................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 26 26 26 26 26 13 Mechanical, Packaging, and Orderable Information ........................................................... 26 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (October 2014) to Revision C Page * Changed data sheet title ........................................................................................................................................................ 1 * Deleted product preview note from bq25101H in Device Information Table.......................................................................... 1 * Deleted product preview note from bq25101H in Device Comparison Table ....................................................................... 3 Changes from Revision A (September 2014) to Revision B Page * Deleted product preview note from bq25101 and bq25100H in Device Information Table.................................................... 1 * Deleted product preview note from bq25101 and bq25100H in Device Comparison Table ................................................. 3 Changes from Original (August 2014) to Revision A * 2 Page Release to Production ............................................................................................................................................................ 1 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L www.ti.com SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 5 Device Comparison Table (1) PART NUMBER VO(REG) VOVP PreTerm /CHG TS bq25100 4.20 V 6.5 V PreTerm TS (JEITA) bq25101 4.20 V 6.5 V CHG TS (JEITA) bq25100A 4.30 V 6.5 V PreTerm TS bq25100H 4.35 V 6.5 V PreTerm TS (JEITA) bq25101H 4.35 V 6.5 V CHG TS (JEITA) bq25100L (1) 4.06 V 6.5V PreTerm TS Product preview. Contact the local TI representative for device details. 6 Pin Configuration and Functions SPACING 6-Pin DSBGA YFP Package (Top View) 1 2 A OUT IN B TS ISET C PRETERM VSS 6-Pin DSBGA YFP Package (Top View) 1 2 A OUT IN B TS ISET C CHG VSS bq25100/100A/100H/100L bq25101/101H Pin Functions PIN NAME CHG NUMBER I/O C1 (1) DESCRIPTION Low (FET on) indicates charging and open drain (FET off) indicates no charging or the first charge cycle complete. IN A2 I Input power, connected to external DC supply (AC adapter or USB port). Expected range of bypass capacitors 1 F to 10 F, connect from IN to VSS. ISET B2 I Programs the fast-charge current setting. External resistor from ISET to VSS defines fast charge current value. Recommended range is 13.5 k (10 mA) to 0.54 k (250 mA). OUT A1 O Battery Connection. System Load may be connected. Expected range of bypass capacitors 1 F to 10 F. C1 (1) I Programs the current termination threshold ( 1% to 50% of Iout, 1mA minimum). The pre-charge current is twice the termination current level. PRE-TERM Expected range of programming resistor is 600 to 30 k (6k: Ichg/10 for term; Ichg/5 for precharge) TS B1 I Temperature sense pin connected to 10k at 25C NTC thermistor, in the battery pack. Floating TS pin or pulling high puts part in TTDM "Charger" mode and disables TS monitoring, Timers and Termination. Pulling pin low disables the IC. If NTC sensing is not needed, connect this pin to VSS through an external 10-k resistor. A 250-k resistor from TS to ground will prevent IC entering TTDM mode when battery with thermistor is removed. VSS C2 - Ground pin (1) Spins have different pin definitions Copyright (c) 2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L 3 bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 www.ti.com 7 Specifications Absolute Maximum Ratings (1) 7.1 over operating free-air temperature range (unless otherwise noted) Input voltage TJ (1) MIN MAX UNIT IN (with respect to VSS) -0.3 30 V OUT (with respect to VSS) -0.3 7 V PRE-TERM, ISET, TS, CHG (with respect to VSS) -0.3 7 V Input current IN 300 mA Output current (continuous) OUT 300 mA Output sink current CHG 15 mA 150 C Junction temperature -40 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to the network ground terminal unless otherwise noted. 7.2 Handling Ratings MIN ESD Electrostatic discharge (IEC61000-4-2) (1) TSTG Storage temperature (1) IN, OUT, TS 1 F between IN and GND, 1 F between TS and GND, 2 F between OUT and GND, x5R Ceramic or equivalent MAX UNIT 8 contact 15 Air kV 150 C -65 The test was performed on IC pins that may potentially be exposed to the customer at the product level. The bq2510x IC requires a minimum of the listed capacitance, external to the IC, to pass the ESD test. 7.3 Recommended Operating Conditions (1) MIN IN voltage range VIN IN operating voltage range, Restricted by VDPM and VOVP NOM UNIT 3.5 28 4.45 6.45 V V IIN Input current, IN pin 250 mA IOUT Current, OUT pin 250 mA TJ Junction temperature RPRE-TERM Programs precharge and termination current thresholds RISET RTS (1) 0 125 C 0.6 30 k Fast-charge current programming resistor 0.54 13.5 k 10k NTC thermistor range without entering BAT_EN or TTDM 1.66 258 k Operation with VIN less than 4.5V or in drop-out may result in reduced performance. 7.4 Thermal Information THERMAL METRIC (1) bq25100 YFP (6 PINS) RJA Junction-to-ambient thermal resistance RJCtop Junction-to-case (top) thermal resistance 1.3 RJB Junction-to-board thermal resistance 21.8 JT Junction-to-top characterization parameter 5.6 JB Junction-to-board characterization parameter 21.8 RJCbot Junction-to-case (bottom) thermal resistance n/a (1) 4 UNIT 132.9 C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L www.ti.com 7.5 SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 Electrical Characteristics Over junction temperature range 0C TJ 125C and recommended supply voltage (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 3.15 3.3 3.45 V INPUT Undervoltage lock-out exit VIN: 0 V 4 V VHYS_UVLO Hysteresis on VUVLO_RISE falling VIN: 4 V0 V; VUVLO_FALL = VUVLO_RISE - VHYS-UVLO VIN-DT Input power good detection threshold is VOUT + VIN-DT Input power good if VIN > VOUT + VIN-DT; VOUT = 3.6 V; VIN: 3.5 V 4 V VHYS-INDT Hysteresis on VIN-DT falling VOUT = 3.6 V; VIN: 4 V 3.5 V 31 mV tDGL(PG_PWR) Deglitch time on exiting sleep Time measured from VIN: 0 V 5 V 1-s risetime to charge enables; VOUT = 3.6 V 29 ms tDGL(PG_NO-PWR) Deglitch time on VHYS-INDT power down. Same as entering sleep. Time measured from VIN: 5 V 3.2 V 1-s falltime to charge disables; VOUT = 3.6 V 29 ms VOVP Input over-voltage protection threshold VIN: 5 V 12 V tDGL(OVP-SET) Input over-voltage blanking time VIN: 5 V 12 V 113 s VHYS-OVP Hysteresis on OVP VIN: 11 V 5 V 110 mV tDGL(OVP-REC) Deglitch time exiting OVP Time measured from VIN: 12 V 5 V 1-s falltime to charge enables 450 s VIN-DPM Low input voltage protection. Restricts lout at VIN-DPM Limit input source current to 50 mA; VOUT = 3.5 V; RISET = 1.35 k UVLO 250 15 6.52 4.25 60 6.67 mV 130 6.82 mV V 4.31 4.37 V 420 450 ISET SHORT CIRCUIT TEST RISET_SHORT Highest resistor value considered RISET: 540 250 , Iout latches off; a fault (short). Cycle power to reset tDGL_SHORT Deglitch time transition from ISET Clear fault by disconnecting IN or cycling (high / short to Iout disable low) TS/BAT_EN IOUT_CL Maximum OUT current limit regulation (Clamp) 1 ms VIN = 5 V; VOUT = 3.6 V; RISET: 540 250 ; IOUT latches off after tDGL-SHORT 550 600 650 mA 0.75 0.8 0.85 V BATTERY SHORT PROTECTION VOUT(SC) OUT pin short-circuit detection threshold/ precharge threshold VOUT:3 V 0.5 V; No deglitch VOUT(SC-HYS) OUT pin Short hysteresis Recovery VOUT(SC) + VOUT(SC-HYS); Rising; No deglitch IOUT(SC) Source current to OUT pin during short-circuit detection 77 9 11 mV 13 mA QUIESCENT CURRENT VIN = 0 V; 0C to 125C 75 VIN = 0 V; 0C to 85C 50 IOUT(PDWN) Battery current into OUT pin IOUT(DONE) OUT pin current, charging terminated VIN = 6 V; VOUT > VOUT(REG) IIN(STDBY) Standby current into IN pin TS = GND; VIN 6 V Active supply current, IN pin TS = open, VIN = 6 V; TTDM - no load on OUT pin; VOUT > VOUT(REG); IC enabled ICC nA 6 A 125 A 0.75 1 mA BATTERY CHARGER FAST-CHARGE VOUT(REG) Output voltage TJ = 0C to 125C; IOUT = 0 mA to 250 mA; VIN = 5.0 V; VTS-45C VTS VTS-0C (bq25100/101) 4.16 4.2 4.23 TJ = 0C to 125C; IOUT = 0 mA to 250 mA; VIN = 5.0 V; VTS-45C VTS VTS-0C (bq25100A) 4.26 4.3 4.33 TJ = 0C to 125C; IOUT = 0 mA to 250 mA; VIN = 5.0 V; VTS-45C VTS VTS-0C (bq25100H/101H) 4.31 4.35 4.38 4.275 4.3 4.325 VIN = 5.0 V; IOUT =10 mA to 250 mA; VTS-60C VTS VTS-45C (bq25100/101) 4.02 4.06 4.1 VIN = 5.0 V; IOUT =10 mA to 250 mA; VTS-60C VTS VTS-45C (bq25100H/101H) 4.16 4.2 4.24 TJ = -5C to 55C; IOUT = 10mA to 75 mA; VIN = 5.0 V; VTS-45C VTS VTS-0C (bq25100A) VO_HT(REG) IOUT(RANGE) Battery hot regulation voltage Programmed output "fast charge" current range Copyright (c) 2014, Texas Instruments Incorporated VOUT(REG) > VOUT > VLOWV; VIN = 5 V; RISET = 0.54 k to 13.5 k V V 10 250 Submit Documentation Feedback Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L mA 5 bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 www.ti.com Electrical Characteristics (continued) Over junction temperature range 0C TJ 125C and recommended supply voltage (unless otherwise noted) PARAMETER TEST CONDITIONS VDO(IN-OUT) Drop-Out, VIN - VOUT Adjust VIN down until IOUT = 0.2 A; VOUT = 4.15 V; RISET = 680 ; TJ 100C IOUT Output "fast charge" formula VOUT(REG) > VOUT > VLOWV; VIN = 5 V KISET Fast charge current factor MIN TYP MAX UNIT 220 400 mV KISET/RISET A RISET = KISET /IOUT; 20 < IOUT < 250 mA 129 135 145 RISET = KISET /IOUT; 5 < IOUT < 20 mA 125 135 145 2.4 2.5 2.6 A PRECHARGE - SET BY PRETERM PIN VLOWV Pre-charge to fast-charge transition threshold tDGL1(LOWV) Deglitch time on pre-charge to fast-charge transition 57 s tDGL2(LOWV) Deglitch time on fast-charge to pre-charge transition 32 ms IPRE-TERM Refer to the Termination Section %PRECHG Pre-charge current, default setting VOUT < VLOWV; RISET = 2.7 k; RPRE-TERM= High Z or for BQ25101/101H 18 Pre-charge current formula RPRE-TERM = KPRE-CHG (/%) x %PRE-CHG (%) RPRE-TERM/KPRE-CHG% KPRE-CHG % Pre-charge Factor 20 22 V %IOUTCC VOUT < VLOWV; VIN = 5 V; RPRE-TERM = 6 k to 30 k; RISET = 1.8 k; RPRE-TERM = KPRE-CHG x %IPRE-CHG, where %IPRE-CHG is 20 to 100% 280 300 320 /% VOUT < VLOWV; VIN = 5 V; RPRE-TERM = 3 k to 6 k; RISET = 1.8 k; RPRE-TERM = KPRE-CHG x %IPRE-CHG, where %IPRE-CHG is 10% to 20% 265 300 340 /% 9 10 11 %IOUT- TERMINATION - SET BY PRE-TERM PIN %TERM KTERM Termination threshold current, default setting VOUT > VRCH; RISET = 2.7 k; RPRE-TERM = High Z or for BQ25101/101H Termination current threshold formula RPRE-TERM = KTERM (/%) x %TERM (%) % Term factor CC RPRE-TERM/ KTERM VOUT > VRCH; VIN = 5 V; RPRE-TERM = 6 k to 30 k; RISET = 1.8 k, RPRE-TERM=KTERM x %ITERM, where %ITERM is 10 to 50% 575 600 640 VOUT > VRCH; VIN = 5 V; RPRE-TERM = 3 k to 6 k ; RISET = 1.8 k, RPRE-TERM= KTERM x %ITERM, where %ITERM is 5 to 10% 555 620 685 VOUT > VRCH; VIN = 5 V; RPRE-TERM = 750 to 3 k; RISET = 1.8 k, RPRE-TERM= KTERM x %ITERM, where %ITERM is 1.25% to 5% 352 680 1001 23 25 27 IPRE-TERM Current for programming the term. and pre-chg with resistor, ITerm-Start is the initial PRE-TERM current RPRE-TERM = 6 k; VOUT = 4.15 V ITERM Termination current range Minimum absolute termination current %TERM Termination current formula tDGL(TERM) Deglitch time, termination detected 1 /% A mA RTERM/ KTERM % 29 ms RECHARGE OR REFRESH Recharge detection threshold - normal temp VIN = 5 V; VTS = 0.5 V; VOUT: 4.25 V VRCH (bq25100); VOUT: 4.35 V VRCH (bq25100A); VOUT: 4.40 V VRCH (bq25100H) VO(REG) -0.125 VO(REG)-0.0 95 VO(REG)-0.0 75 V Recharge detection threshold - hot temp VIN = 5 V; VTS = 0.2 V; VOUT: 4.15 V VRCH (bq25100); VOUT: 4.25 V VRCH (bq25100H) VO_HT(REG) -0.130 VO_HT(REG) -0.105 VO_HT(REG) -0.080 V Deglitch time, recharge threshold detected VIN = 5 V; VTS = 0.5 V; VOUT: 4.25 V 3.5V in 1 s; tDGL(RCH) is time to ISET ramp VRCH tDGL1(RCH) 6 Submit Documentation Feedback 29 ms Copyright (c) 2014, Texas Instruments Incorporated Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L www.ti.com SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 Electrical Characteristics (continued) Over junction temperature range 0C TJ 125C and recommended supply voltage (unless otherwise noted) PARAMETER tDGL2(RCH) Deglitch time, recharge threshold detected in OUT-Detect Mode TEST CONDITIONS MIN TYP VIN = 5 V; VTS = 0.5 V; VOUT = 3.5 V inserted; tDGL(RCH) is time to ISET ramp MAX 29 UNIT ms BATTERY DETECT ROUTINE - (NOTE: In Hot mode VO(REG) becomes VO_HT(REG)) VREG-BD VOUT reduced regulation during battery detect IBD-SINK Sink current during VREG-BD tDGL(HI/LOW REG) Regulation time at VREG or VREGBD bq25100/101/bq25100H/101H; VIN = 5 V; VTS = 0.5 V, Battery absent VO(REG)0.450 VO(REG)0.400 VO(REG)0.350 bq25100A; VIN = 5 V; VTS = 0.5 V; Battery absent VO(REG)0.550 VO(REG)0.500 VO(REG)0.450 V VIN = 5 V; VTS = 0.5 V; Battery absent 2 mA VIN = 5 V; VTS = 0.5 V; Battery absent 25 ms VBD-HI High battery detection threshold VIN = 5 V; VTS = 0.5 V; Battery absent VO(REG) 0.150 VO(REG)0.100 VO(REG)0.050 V VBD-LO Low battery detection threshold VIN = 5 V; VTS = 0.5 V; Battery absent VREG-BD +0.05 VREG-BD +0.1 VREG-BD +0.15 V 1700 1940 2250 s 34000 38800 45000 s 48.5 50.5 52.5 A 27 30 33 A 4 5 6.5 A 1550 1600 1650 mV 1900 1950 BATTERY CHARGING TIMERS AND FAULT TIMERS tPRECHG Pre-charge safety timer value Restarts when entering pre-charge; Always enabled when in pre-charge. tMAXCH Charge safety timer value Clears fault or resets at UVLO, TS disable, OUT Short, exiting LOWV and Refresh BATTERY-PACK NTC MONITOR (see Note 1); TS pin: 10k NTC INTC-10k NTC bias current VTS = 0.3 V INTC-DIS-10k 10k NTC bias current when charging is disabled VTS = 0 V INTC-FLDBK-10k INTC is reduced prior to entering TTDM to keep cold thermistor from entering TTDM VTS: Set to 1.525 V VTTDM(TS) Termination and timer disable mode Threshold - Enter VTS: 0.5 V 1.7 V; Timer held in reset VHYS-TTDM(TS) Hysteresis exiting TTDM VTS: 1.7 V 0.5 V; Timer enabled VCLAMP(TS) TS maximum voltage clamp VTS = Open (float) tDGL(TTDM) 100 Deglitch exit TTDM between states Deglitch enter TTDM between states VTS_I-FLDBK TS voltage where INTC is reduce to keep thermistor from entering TTDM CTS Optional capacitance - ESD INTC adjustment (90 to 10%; 45 to 6.6 uA) takes place near this spec threshold; VTS: 1.425 V 1.525 V VTS-0C Low temperature CHG pending Low temp charging to pending; VTS: 1 V 1.5 V VHYS-0C Hysteresis At 0C; Charge pending to low temp charging; VTS: 1.5 V 1 V VTS-10C Low temperature, half charge Normal charging to low temp charging; VTS: 0.5 V 1 V VHYS-10C Hysteresis At 10C; Low temp charging to normal CHG; VTS: 1 V 0.5 V VTS-45C High temperature At 4.1V (bq25100/101) or 4.2V (bq25100H/101H); Normal charging to high temp CHG; VTS: 0.5 V 0.2 V VHYS-45C Hysteresis At 45C; High temp charging to normal CHG; VTS: 0.2 V 0.5 V VTS-60C High temperature disable bq25100/01/100H/101H/100L; High temp charge to pending; VTS: 0.2 V 0.1 V VHYS-60C Hysteresis At 60C (bq25100/01/100H/101H/100L); Charge pending to high temp CHG; VTS: 0.1 V 0.2 V Copyright (c) 2014, Texas Instruments Incorporated 1230 mV 2000 57 ms 8 s 1475 mV 0.22 F 1255 1280 100 775 800 268 830 170 283 mV mV 180 20 Submit Documentation Feedback Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L mV mV 20 160 mV mV 55 253 mV mV mV 7 bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 www.ti.com Electrical Characteristics (continued) Over junction temperature range 0C TJ 125C and recommended supply voltage (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP Normal to cold operation; VTS: 0.6 V 1 V 50 Cold to normal operation; VTS: 1 V 0.6 V 12 30 tDGL(TS_10C) Deglitch for TS thresholds: 10C tDGL(TS) Deglitch for TS thresholds: 0/45/60C Battery charging VTS-EN-10k Charge enable threshold, (10k NTC) VTS: 0 V 0.175 V VTS-DIS_HYS-10k HYS below VTS-EN-10k to disable, (10k NTC) VTS: 0.125 V 0 V 84 92 MAX UNIT ms ms 100 mV 12 mV THERMAL REGULATION TJ(REG) Temperature regulation limit 125 C TJ(OFF) Thermal shutdown temperature 155 C TJ(OFF-HYS) Thermal shutdown hysteresis 20 C LOGIC LEVELS ON /CHG VOL Output low voltage ISINK = 5 mA ILEAK Leakage current into IC V CHG = 5 V 0.4 V 1 A 7.6 Typical Characteristics Setup: Typical Applications Schematic; VIN = 5 V, VBAT = 3.6 V (unless otherwise noted) VIN VIN 2 V/div 2 V/div VOUT 2 V/div VOUT 2 V/div IOUT 60 mA/div IOUT 60 mA/div VISET 1 V/div t-time - 20 ms/div t-time - 10 ms/div No Battery, No Load Hot Plug Figure 3. Power Up Timing 8 Submit Documentation Feedback Figure 4. OVP 7-V Adaptor Copyright (c) 2014, Texas Instruments Incorporated Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L www.ti.com SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 Typical Characteristics (continued) Setup: Typical Applications Schematic; VIN = 5 V, VBAT = 3.6 V (unless otherwise noted) VIN 2 V/div VIN 2 V/div VTS 500 mV/div VOUT 2 V/div IOUT 60 mA/div IOUT 60 mA/div VISET 1 V/div VISET 1 V/div t-time - 50 ms/div t-time - 50 ms/div VIN 0 V -5 V-7 V-5 V Figure 5. OVP from Normal Power-Up Operation Figure 6. TS Enable and Disable VIN 1 V/div VIN 5 V/div IOUT 60 mA/div VOUT 2 V/div VOUT 2 V/div IOUT 100 mA/div VISET 1 V/div VISET 1 V/div t-time - 5 ms/div t-time - 20 ms/div VIN Regulated Figure 7. DPM-Adaptor Current Limits Figure 8. Hot Plug Source with No Battery - Battery Detection VIN 5 V/div VIN 5 V/div IOUT 100 mA/div VOUT 2 V/div VOUT 2 V/div VISET 1 V/div VISET 1 V/div IOUT 100 mA/div t-time - 20 ms/div t-time - 200 s/div No Load Figure 9. Battery Removal Copyright (c) 2014, Texas Instruments Incorporated Figure 10. ISET Shorted During Normal Operation Submit Documentation Feedback Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L 9 bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 www.ti.com Typical Characteristics (continued) Setup: Typical Applications Schematic; VIN = 5 V, VBAT = 3.6 V (unless otherwise noted) VIN 5 V/div VIN 5 V/div VOUT 5 V/div VOUT 5 V/div IOUT 100 mA/div IOUT 100 mA/div VISET 1 V/div VISET 1 V/div t-time - 10 ms/div t-time - 10 ms/div 20- resistor at OUT, No input, VBAT = 3.7 V 20- resistor at OUT, No input, VBAT = 3.7 V Figure 12. Battery Removal Figure 11. Battery Plug In VIN 2 V/div VIN 2 V/div VISET 2 V/div VOUT 2 V/div ILOAD 70 mA/div IOUT 400 mA/div VISET 1 V/div IOUT 70 mA/div t-time - 10 ms/div t-time - 10 ms/div 90-mA Load, 120-mA ICHG Figure 13. ISET Short Prior to Power Up Figure 14. Power Up 4.21 4.202 VREG = 0qC VREG = 25qC VREG = 85qC VREG = 125qC Regulation Voltage (V) 4.206 4.201 Regulation Voltage (V) 4.208 4.204 4.202 4.2 4.198 4.196 4.2 4.199 VREG = 0qC VREG = 25qC VREG = 85qC VREG = 125qC 4.198 4.197 4.196 4.194 4.195 4.192 4.19 4.194 1 mA 10 mA 50 mA 100 mA 150 mA 200 mA 250 mA Load Current (mA) Figure 15. Load Regulation Over Temperature 10 Submit Documentation Feedback D001 4.5 V 5V 5.5 V 6V 6.5 V Input Voltage (V) D002 Figure 16. Line Regulation Over Temperature Copyright (c) 2014, Texas Instruments Incorporated Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L www.ti.com SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 Typical Characteristics (continued) Setup: Typical Applications Schematic; VIN = 5 V, VBAT = 3.6 V (unless otherwise noted) 80 112 70 6.4 IOUT (mA) VOUT (V) 5.6 60 4.8 50 4 40 3.2 30 2.4 20 1.6 10 0.8 110 109 108 IO = 0qC IO = 25qC IO = 85qC IO = 125qC 107 0 106 2.5 V 3V 3.5 V 4V 0 4.1 V Output Voltage (V) Figure 17. Current Regulation Over Temperature Copyright (c) 2014, Texas Instruments Incorporated Output Voltage (V) Output Current (mA) Output Current (mA) 111 D003 D004 bq25100 charge cycle, ICHG = 75 mA, VBAT_REG = 4.2 V Figure 18. Battery Voltage vs Charge Current Submit Documentation Feedback Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L 11 bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 www.ti.com 8 Detailed Description 8.1 Overview The bq2510x is a highly integrated family of single cell Li-Ion and Li-Pol chargers. The charger can be used to charge a battery, power a system or both. The charger has three phases of charging: pre-charge to recover a fully discharged battery, fast-charge constant current to supply the charge safely and voltage regulation to safely reach full capacity. The charger is very flexible, allowing programming of the fast-charge current and Precharge/Termination Current. This charger is designed to work with a USB connection (100-mA limit) or Adaptor (DC output). The charger also checks to see if a battery is present. The charger also comes with a full set of safety features: JEITA Temperature Standard (bq25100/01/100H/101H), Over-Voltage Protection, DPM-IN, Safety Timers, and ISET short protection. All of these features and more are described in detail below. The charger is designed for a single power path from the input to the output to charge a single cell Li-Ion or Li-Pol battery pack. Upon application of a 5-V DC power source the ISET and OUT short checks are performed to assure a proper charge cycle. If the battery voltage is below the LOWV threshold, the battery is considered discharged and a preconditioning cycle begins. The amount of precharge current can be programmed using the PRE-TERM pin which programs a percent of fast charge current (10 to 100%) as the precharge current. This feature is useful when the system load is connected across the battery "stealing" the battery current. The precharge current can be set higher to account for the system loading while allowing the battery to be properly conditioned. The PRE-TERM pin is a dual function pin which sets the precharge current level and the termination threshold level. The termination "current threshold" is always half of the precharge programmed current level. Once the battery voltage has charged to the VLOWV threshold, fast charge is initiated and the fast charge current is applied. The fast charge constant current is programmed using the ISET pin. The constant current provides the bulk of the charge. Power dissipation in the IC is greatest in fast charge with a lower battery voltage. If the IC reaches 125C, the IC enters thermal regulation, slows the timer clock by half, and reduces the charge current as needed to keep the temperature from rising any further. Figure 19 shows the charging profile with thermal regulation. Typically under normal operating conditions, the IC's junction temperature is less than 125C and thermal regulation is not entered. Once the cell has charged to the regulation voltage the voltage loop takes control and holds the battery at the regulation voltage until the current tapers to the termination threshold. The termination can be disabled if desired. Further details are described in the Operating Modes section. 12 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L www.ti.com SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 Overview (continued) PreConditioning Phase VO(REG) Thermal Regulation Phase Current Regulation Phase Voltage Regulation and Charge Termination Phase DONE IO(OUT) FAST-CHARGE CURRENT PRE-CHARGE CURRENT AND TERMINATION THRESHOLD Battery Voltage, V(OUT) Battery Current, I(OUT) Charge Complete Status, Charger Off VO(LOWV) I(TERM) IO(PRECHG) T(THREG) 0A Temperature, Tj T(PRECHG) T(CHG) DONE Figure 19. Charging Profile With Thermal Regulation Copyright (c) 2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L 13 bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 www.ti.com 8.2 Functional Block Diagram Internal Charge Current Sense w/ Multiple Outputs IN OUT 80 mV Input Power Detect IN + _ OUT OUT + _ + _ + - IN-DPMREF OUTREGREF Charge Pump TJ + _ FAST CHARGE 125UCREF PRE-CHARGE ISET IN + _ 1.5V PRE-CHG Reference Term Reference TJ + _ + _ 150UCREF Thermal Shutdown PA + _ 22mA Startup Current Limit Internal Current Sensing Resistor Charge Pump PRE-TERM + _ OUT VTERM_EN + _ IN OVPREF + _ CHARGE CONTROL VCOOL-10UC + _ + _ VWARM-45UC VCOLD-0UC + _ + _ VHOT-60UC LO=LDO MODE TS VLDO VDISABLE 5PA 14 + _ + _ HI=CHIP DISABLE Cold Temperature Sink Disable Sink Current Current = 20PA = 45PA VCLAMP=1.4V + + _ _ 45PA Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L www.ti.com SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 8.3 Feature Description 8.3.1 Overvoltage-Protection (OVP) - Continuously Monitored If the input source applies an overvoltage, the pass FET, if previously on, turns off after a deglitch, tBLK(OVP). The timer stops counting. Once the overvoltage returns to a normal voltage, the timer and charge continues. 8.3.2 CHG Pin Indication (bq25101, bq25101H) The charge pin has an internal open drain FET which is on (pulls down to VSS) during the first charge only (independent of TTDM) and is turned off once the battery reaches voltage regulation and the charge current tapers to the termination threshold set by the PRE-TERM resistor. The bq25101/01H terminates at 10% of the programmed charge current. The charge pin is high impedance in sleep mode and OVP and returns to its previous state once the condition is removed. Cycling input power, removing and replacing the battery, pulling the TS pin low and releasing or entering pre-charge mode causes the CHG pin to go reset (go low if power is good and a discharged battery is attached) and is considered the start of a first charge. 8.3.3 CHG Pin LED Pull-up Source (bq25101, bq25101H) For host monitoring, a pull-up resistor is used between the CHG pin and the VCC of the host and for a visual indication a resistor in series with an LED is connected between the /CHG pin and a power source. If the CHG source is capable of exceeding 7 V, a 6.2-V zener should be used to clamp the voltage. If the source is the OUT pin, note that as the battery changes voltage, and the brightness of the LEDs vary. 8.3.4 IN-DPM (VIN-DPM or IN-DPM) The IN-DPM feature is used to detect an input source voltage that is folding back (voltage dropping), reaching its current limit due to excessive load. When the input voltage drops to the VIN-DPM threshold the internal pass FET starts to reduce the current until there is no further drop in voltage at the input. This would prevent a source with voltage less than VIN-DPM to power the out pin. This is an added safety feature that helps protect the source from excessive loads. This feature is not applicable for bq25100A. 8.3.5 OUT The Charger's OUT pin provides current to the battery and to the system, if present. This IC can be used to charge the battery plus power the system, charge just the battery or just power the system (TTDM) assuming the loads do not exceed the available current. The OUT pin is a current limited source and is inherently protected against shorts. If the system load ever exceeds the output programmed current threshold, the output will be discharged unless there is sufficient capacitance or a charged battery present to supplement the excessive load. 8.3.6 ISET An external resistor is used to Program the Output Current (10 to 250 mA) and can be used as a current monitor. RISET = KISET / IOUT (1) Where: IOUT is the desired fast charge current; KISET is a gain factor found in the electrical specification For greater accuracy at lower currents, part of the sense FET is disabled to give better resolution. Going from higher currents to low currents, there is hysteresis and the transition occurs around 50 mA. The ISET resistor is short protected and will detect a resistance lower than 420 . The detection requires at least 50 mA of output current. If a "short" is detected, then the IC will latch off and can be reset by cycling the power or cycling TS pin. The OUT current is internally clamped to a maximum current of 600 mA typical and is independent of the ISET short detection circuitry. For charge current that is below 50 mA, an extra RC circuit is recommended on ISET to acheive more stable current signal. More detail is available in 9.1 Application Information. Copyright (c) 2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L 15 bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 www.ti.com Feature Description (continued) 60C 45C 10C Programmed VBAT_REG 0C No Operation During Cold Fault Reduced VBAT_REG Programmed ICHG (100%) 50% Cold Fault 0 0.2 0.4 VHOT VWARM 0.6 0.8 1.0 VCOOL 1.2 VCOLD 1.4 1.6 Termination Disable 1.8 TS Voltage-V Figure 20. Operation Over TS Bias Voltage - bq25100, bq25100H, bq25101, bq25101H 16 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L www.ti.com SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 Feature Description (continued) 45C 10C Programmed VBAT_REG 0C No Operation During Cold Fault Hot Fault Charge Disable Programmed ICHG (100%) 50% Cold Fault 0 0.2 0.4 VHOT VWARM 0.6 0.8 1.0 VCOOL 1.2 VCOLD 1.4 1.6 Termination Disable 1.8 TS Voltage-V Figure 21. Operation Over TS Bias Voltage - bq25100A 8.3.7 PRE_TERM - Pre-Charge and Termination Programmable Threshold Pre-Term is used to program both the pre-charge current and the termination current threshold. The pre-charge current level is a factor of two higher than the termination current level. The termination can be set between 5 and 50% (recommended range) of the programmed output current level set by ISET. If left floating the termination and pre-charge are set internally at 10/20% respectively. The RPRE-TERM is ranged from 600 to 30 k and the minimum termination current can be programmed to 1 mA. The pre-charge-to-fast-charge, Vlowv threshold is set to 2.5 V. RPRE-TERM = %Term x KTERM = %Pre-CHG x KPRE-CHG (2) Where: %Term is the percent of fast charge current where termination occurs; %Pre-CHG is the percent of fast charge current that is desired during precharge; KTERM and KPRE-CHG are gain factors found in the electrical specifications. 8.3.8 TS The TS function for the bq2510x family is designed to follow the new JEITA temperature standard (bq25100/bq25100H/bq25101/bq25101H) for Li-Ion and Li-Pol batteries. There are now four thresholds, 60C, 45C, 10C, and 0C. Normal operation occurs between 10C and 45C. If between 0C and 10C the charge current level is cut in half and if between 45C and 60C the regulation voltage is reduced to 4.1 V max for bq25100 and 4.2 V max for bq25100H, see Figure 20. The TS function for the bq25100A cut the charge current level in half between 0C and 10C and disables charging when the NTC temperature is above 45C. Copyright (c) 2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L 17 bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 www.ti.com Feature Description (continued) The TS feature is implemented using an internal 50A current source to bias the thermistor (designed for use with a 10-k NTC = 3370 (SEMITEC 103AT-2 or Mitsubishi TH05-3H103F) connected from the TS pin to VSS. If this feature is not needed, a fixed 10-k can be placed between TS and VSS to allow normal operation. This may be done if the host is monitoring the thermistor and then the host would determine when to pull the TS pin low to disable charge. The TS pin has two additional features, when the TS pin is pulled low or floated/driven high. A low disables charge and a high puts the charger in TTDM. Above 60C (45C for bq25100A) or below 0C the charge is disabled. Once the thermistor reaches -10C the TS current folds back to keep a cold thermistor (between -10C and -50C) from placing the IC in the TTDM mode. If the TS pin is pulled low into disable mode, the current is reduce to 30 A. Since the ITS curent is fixed along with the temperature thresholds, it is not possible to use thermistor values other than the 10-k NTC (at 25C). 8.3.9 Timers The pre-charge timer is set to 30 minutes. The pre-charge current, can be programmed to off-set any system load, making sure that the 30 minutes is adequate. The fast charge timer is fixed at 10 hours and can be increased real time by going into thermal regulation or INDPM. The timer clock slows by a factor of 2, resulting in a clock than counts half as fast when in these modes. If either the 30 minute or ten hour timer times out, the charging is terminated and for bq25101/1H the CHG pin goes high impedance if not already in that state. The timer is reset by disabling the IC, cycling power or going into and out of TTDM. 8.3.10 Termination Once the OUT pin goes above VRCH, (reaches voltage regulation) and the current tapers down to the termination threshold, a battery detect route is run to determine if the battery was removed or the battery is full. If the battery is present, the charge current will terminate. If the battery was removed along with the thermistor, then the TS pin is driven high and the charge enters TTDM. If the battery was removed and the TS pin is held in the active region, then the battery detect routine will continue until a battery is inserted. The termination current can be programmed down to 625 uA, however, the accuracy will reduce acoordingly when the termination current is below 1 mA. 8.4 Device Functional Modes 8.4.1 Power-Down or Undervoltage Lockout (UVLO) The bq2510x family is in power down mode if the IN pin voltage is less than UVLO. The part is considered "dead" and all the pins are high impedance. Once the IN voltage rises above the UVLO threshold the IC will enter Sleep Mode or Active mode depending on the OUT pin (battery) voltage. 8.4.2 Power-up The IC is alive after the IN voltage ramps above UVLO (see sleep mode), resets all logic and timers, and starts to perform many of the continuous monitoring routines. Typically the input voltage quickly rises through the UVLO and sleep states where the IC declares power good, starts the qualification charge at 22 mA, sets the charge current base on the ISET pin, and starts the safety timer. 8.4.3 Sleep Mode If the IN pin voltage is between VOUT+VDT and UVLO, the charge current is disabled, the safety timer counting stops (not reset). As the input voltage rises and the charger exits sleep mode, the safety timer continues to count and the charge is enabled. See Figure 22. 8.4.4 New Charge Cycle A new charge cycle is started when a good power source is applied, performing a chip disable/enable (TS pin), exiting Termination and Timer Disable Mode (TTDM), detecting a battery insertion or the OUT voltage dropping below the VRCH threshold. 18 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L www.ti.com SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 Device Functional Modes (continued) Apply Input Power Is power good? VBAT+VDT<VIN<VOVP &VUVLO<VIN No Yes Is chip enabled? VTS>VEN No Yes Set Input Current Limit to 22mA And Start Charge Perform ISET & OUT short tests Set charge current based on ISET setting Return to Charge Figure 22. bq2510x Power-Up Flow Diagram Copyright (c) 2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L 19 bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 www.ti.com Device Functional Modes (continued) 8.4.5 Termination and Timer Disable Mode (TTDM) - TS Pin High The battery charger is in TTDM when the TS pin goes high from removing the thermistor (removing battery pack/floating the TS pin) or by pulling the TS pin up to the TTDM threshold. When entering TTDM, the 10 hour safety timer is held in reset and termination is disabled. A battery detect routine is run to see if the battery was removed or not. For bq25101/1H, if the battery was removed then the CHG pin will go to its high impedance state if not already there. If a battery is detected the CHG pin does not change states until the current tapers to the termination threshold, where the CHG pin goes to its high impedance state if not already there (the regulated output will remain on). The charging profile does not change (still has pre-charge, fast-charge constant current and constant voltage modes). This implies the battery is still charged safely and the current is allowed to taper to zero. When coming out of TTDM, the battery detect routine is run and if a battery is detected, then a new charge cycle begins. If TTDM is not desired upon removing the battery with the thermistor, one can add a 237-k resistor between TS and VSS to disable TTDM. This keeps the current source from driving the TS pin into TTDM. This creates 0.1C error at hot and a 3C error at cold. 8.4.6 Battery Detect Routine The battery detect routine should check for a missing battery while keeping the OUT pin at a useable voltage. The battery detect routine is run when entering and exiting TTDM to verify if battery is present, or run all the time if battery is missing and not in TTDM. On power-up, if battery voltage is greater than VRCH thereshold, a battery detect routine is run to determine if a battery is present. The battery detect routine is disabled while the IC is in TTDM, or has a TS fault. See Figure 23 for the Battery Detect Flow Diagram. 8.4.7 Refresh Threshold After termination, if the OUT pin voltage drops to VRCH (100mV below regulation) then a new charge is initiated. 8.4.8 Starting a Charge on a Full Battery The termination threshold is raised by 14% for the first minute of a charge cycle so if a full battery is removed and reinserted or a new charge cycle is initiated, that the new charge terminates (less than 1 minute). Batteries that have relaxed many hours may take several minutes to taper to the termination threshold and terminate charge. 20 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L www.ti.com SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 Device Functional Modes (continued) Start BATT_DETECT Start 25ms timer Timer Expired? No Yes Is VOUT<VREG-100mV? Yes Battery Present Turn off Sink Current Return to flow No Set OUT REG to VREG-400mV Enable sink current Reset & Start 25ms timer Timer Expired? No Yes Yes Is VOUT>VREG-300mV? Battery Present Turn off Sink Current Return to flow No Battery Absent Don't Signal Charge Turn off Sink Current Return to Flow Figure 23. Battery Detect Routine Copyright (c) 2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L 21 bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The bq2510x series of devices are highly integrated Li-Ion and Li-Pol linear chargers targeted at space-limited portable applications. The fast charge current can be programmed from 10 mA to 250 mA through an external resistor on ISET pin. The pre_charge and termination current can also be programmed through the resistor connected on PRETERM pin. The device has complete system-level protection such as input under-voltage lockout (UVLO), input over-voltage protection (OVP), sleep mode, thermal regulation, safety timers, and NTC monitoring input. 9.2 Typical Application - Charger Application Design Example SYSTEM USB Port or Adapter VBUS IN D+ D- OUT 1UF 1UF VSS GND PACK+ TS TEMP HOST ISET Optional 2.7k RC 10 nF 3.4k PRETERM PACK- 6k bq25100 CE 9.2.1 Design Requirements * Supply voltage = 5 V * Fast charge current: IOUT-FC = 40 mA; * Termination Current Threshold: %IOUT-FC = 10% of Fast Charge or ~4 mA * Pre-Charge Current by default is twice the termination Current or ~8 mA * TS - Battery Temperature Sense = 10-k NTC (103AT) * /CE is an open drain control pin 9.2.2 Detailed Design Procedures * The regulation voltage is set to 4.2 V, the input voltage is 5 V and the charge current is programmed to 40 mA. * For charge current that is below 50 mA, an extra RC circuit is recommended on ISET to acheive more stable current signal. For applications that need higher charge current, the RC circuit is not needed. * For applications that use more than 200-mA current, there could be a very low level ~1% of charge current ringing in the output. The ringing can be removed by increasing the input capacitance. 22 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L www.ti.com SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 Typical Application - Charger Application Design Example (continued) 9.2.2.1 Calculations 9.2.2.1.1 Program the Fast Charge Current, ISET: RISET = [K(ISET) / I(OUT)] from electrical characteristics table. . . K(SET) = 135 A RISET = [135 A/0.04 A] = 3.4 k Selecting the closest standard value, use a 3.4-k resistor between ISET and Vss. 9.2.2.1.2 Program the Termination Current Threshold, ITERM: RPRE-TERM = K(TERM) x %IOUT-FC RPRE-TERM = 600 /% x 10% = 6 k Selecting the closest standard value, use a 6-k resistor between PRETERM and Vss. One can arrive at the same value by using 20% for a pre-charge value (factor of 2 difference). RPRE-TERM = K(PRE-CHG) x %IOUT-FC RPRE-TERM = 300 /% x 20%= 6 k 9.2.2.1.3 TS Function Use a 10-k NTC thermistor in the battery pack (103AT). To Disable the temp sense function, use a fixed 10-k resistor between the TS and VSS. 9.2.2.1.4 Selecting IN and OUT Pin Capacitors In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power pin, input and output pins. Using the values shown on the application diagram is recommended. After evaluation of these voltage signals with real system operational conditions, one can determine if capacitance values can be adjusted toward the minimum recommended values (DC load application) or higher values for fast, high amplitude, pulsed load applications. Note if designed for high input voltage sources (bad adaptors or wrong adaptors), the capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated values so a 16-V capacitor may be adequate for a 30-V transient (verify tested rating with capacitor manufacturer). 9.2.3 bq25100 Application Performance Plots VIN VIN 2 V/div 2 V/div VOUT 2 V/div VOUT 2 V/div IOUT 60 mA/div IOUT 60 mA/div VISET 1 V/div VISET 1 V/div t-time - 20 ms/div Hot Plug t-time - 50 ms/div VIN 0 V -5 V-7 V-5 V Figure 24. OVP 7-V Adaptor Copyright (c) 2014, Texas Instruments Incorporated Figure 25. OVP from Normal Power-Up Operation Submit Documentation Feedback Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L 23 bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 www.ti.com Typical Application - Charger Application Design Example (continued) VIN 2 V/div VIN 2 V/div VTS 500 mV/div VISET 2 V/div ILOAD 70 mA/div IOUT 60 mA/div VISET 1 V/div IOUT 70 mA/div t-time - 10 ms/div t-time - 50 ms/div 90-mA Load, 120-mA IOUT Figure 26. TS Enable and Disable Figure 27. Power Up 10 Power Supply Recommendations 10.1 Leakage Current Effects on Battery Capacity To determine how fast a leakage current on the battery will discharge the battery is an easy calculation. The time from full to discharge can be calculated by dividing the Amp-Hour Capacity of the battery by the leakage current. For a 0.1-AHr battery and a 75-nA leakage current (100mAHr/75nA = 250000 Hours), it would take 1333k hours or 152 years to discharge. In reality the self discharge of the cell would be much faster so the 75-nA leakage would be considered negligible. 11 Layout 11.1 Layout Guidelines To obtain optimal performance, the decoupling capacitor from IN to GND and the output filter capacitors from OUT to GND should be placed as close as possible to the bq2510x, with short trace runs to both IN, OUT and GND. * All low-current GND connections should be kept separate from the high-current charge or discharge paths from the battery. Use a single-point ground technique incorporating both the small signal ground path and the power ground path. * The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the maximum charge current in order to avoid voltage drops in these traces 24 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L www.ti.com SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 11.2 Layout Example Figure 28. Board Layout 11.3 Thermal Package The most common measure of package thermal performance is thermal impedance (JA ) measured (or modeled) from the chip junction to the air surrounding the package surface (ambient). The mathematical expression for JA is: JA = (TJ - T) / P (3) Where: TJ = chip junction temperature T = ambient temperature P = device power dissipation Factors that can influence the measurement and calculation of JA include: 1. Whether or not the device is board mounted 2. Trace size, composition, thickness, and geometry 3. Orientation of the device (horizontal or vertical) 4. Volume of the ambient air surrounding the device under test and airflow 5. Whether other surfaces are in close proximity to the device being tested Due to the charge profile of Li-Ion and Li-Pol batteries the maximum power dissipation is typically seen at the beginning of the charge cycle when the battery voltage is at its lowest. Typically after fast charge begins the pack voltage increases to 3.4 V within the first 2 minutes. The thermal time constant of the assembly typically takes a few minutes to heat up so when doing maximum power dissipation calculations, 3.4 V is a good minimum voltage to use. The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal PowerFET. It can be calculated from the following equation when a battery pack is being charged : P = [V(IN) - V(OUT)] x I(OUT) Copyright (c) 2014, Texas Instruments Incorporated (4) Submit Documentation Feedback Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L 25 bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L SLUSBV8C - AUGUST 2014 - REVISED NOVEMBER 2014 www.ti.com Thermal Package (continued) The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage and nominal ambient temperatures) and use the feature for non typical situations such as hot environments or higher than normal input source voltage. With that said, the IC will still perform as described, if the thermal loop is always active. 12 Device and Documentation Support 12.1 Device Support 12.1.1 Third-Party Products Disclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE. 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 1. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY bq25100 Click here Click here Click here Click here Click here bq25101 Click here Click here Click here Click here Click here bq25100A Click here Click here Click here Click here Click here bq25100H Click here Click here Click here Click here Click here bq25101H Click here Click here Click here Click here Click here bq25100L Click here Click here Click here Click here Click here 12.3 Trademarks Bluetooth is a registered trademark of Bluetooth SIG, Inc.. 12.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.5 Glossary SLYZ022 -- TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 26 Submit Documentation Feedback Copyright (c) 2014, Texas Instruments Incorporated Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L PACKAGE OPTION ADDENDUM www.ti.com 15-Jun-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) BQ25100AYFPR ACTIVE DSBGA YFP 6 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 25100A BQ25100AYFPT ACTIVE DSBGA YFP 6 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 25100A BQ25100HYFPR ACTIVE DSBGA YFP 6 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM 0 to 125 25100H BQ25100HYFPT ACTIVE DSBGA YFP 6 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM 0 to 125 25100H BQ25100YFPR ACTIVE DSBGA YFP 6 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM 0 to 125 25100 BQ25100YFPT ACTIVE DSBGA YFP 6 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM 0 to 125 25100 BQ25101HYFPR ACTIVE DSBGA YFP 6 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM 0 to 125 25101H BQ25101HYFPT ACTIVE DSBGA YFP 6 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM 0 to 125 25101H BQ25101YFPR ACTIVE DSBGA YFP 6 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM 0 to 125 25101 BQ25101YFPT ACTIVE DSBGA YFP 6 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM 0 to 125 25101 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 15-Jun-2015 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) BQ25100AYFPR DSBGA YFP 6 3000 180.0 8.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 0.98 1.68 0.59 4.0 8.0 Q1 BQ25100AYFPT DSBGA YFP 6 250 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1 BQ25100HYFPR DSBGA YFP 6 3000 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1 BQ25100HYFPT DSBGA YFP 6 250 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1 BQ25100YFPR DSBGA YFP 6 3000 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1 BQ25100YFPT DSBGA YFP 6 250 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1 BQ25101HYFPR DSBGA YFP 6 3000 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1 BQ25101HYFPT DSBGA YFP 6 250 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1 BQ25101YFPR DSBGA YFP 6 3000 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1 BQ25101YFPT DSBGA YFP 6 250 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) BQ25100AYFPR DSBGA YFP 6 3000 182.0 182.0 20.0 BQ25100AYFPT DSBGA YFP 6 250 182.0 182.0 20.0 BQ25100HYFPR DSBGA YFP 6 3000 182.0 182.0 20.0 BQ25100HYFPT DSBGA YFP 6 250 182.0 182.0 20.0 BQ25100YFPR DSBGA YFP 6 3000 210.0 185.0 35.0 BQ25100YFPT DSBGA YFP 6 250 210.0 185.0 35.0 BQ25101HYFPR DSBGA YFP 6 3000 182.0 182.0 20.0 BQ25101HYFPT DSBGA YFP 6 250 182.0 182.0 20.0 BQ25101YFPR DSBGA YFP 6 3000 182.0 182.0 20.0 BQ25101YFPT DSBGA YFP 6 250 182.0 182.0 20.0 Pack Materials-Page 2 PACKAGE OUTLINE YFP0006 DSBGA - 0.5 mm max height SCALE 10.000 DIE SIZE BALL GRID ARRAY B E A BALL A1 CORNER D C 0.5 MAX SEATING PLANE 0.19 0.13 BALL TYP 0.05 C 0.4 TYP SYMM C D: Max = 1.608 mm, Min =1.547 mm 0.8 TYP SYMM B E: Max = 0.91 mm, Min = 0.85 mm 0.4 TYP A 6X 0.015 0.25 0.21 C A B 1 2 4223410/A 11/2016 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com EXAMPLE BOARD LAYOUT YFP0006 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.4) TYP 6X ( 0.23) 2 1 A (0.4) TYP SYMM B C SYMM LAND PATTERN EXAMPLE SCALE:50X ( 0.23) METAL 0.05 MAX METAL UNDER SOLDER MASK 0.05 MIN ( 0.23) SOLDER MASK OPENING SOLDER MASK OPENING NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS NOT TO SCALE 4223410/A 11/2016 NOTES: (continued) 3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009). www.ti.com EXAMPLE STENCIL DESIGN YFP0006 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.4) TYP (R0.05) TYP 6X ( 0.25) 1 2 A (0.4) TYP SYMM B METAL TYP C SYMM SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:50X 4223410/A 11/2016 NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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