MTK-20140 "DynaMiTeTM" Rate Adaptive Asymmetrical Digital Subscriber Line (ADSL) Modem Chipset Product Brief Rev. 1 - January 1999 Applications * Central office and end-user equipment *DSL Access Multiplexers (DSLAM) * ADSL PC NICs * ADSL access for routers * DLC upgrade * ADSL line cards for ATM switches and multiplexers Features * 4th generation Alcatel ADSL * Compatible with MTK-20131 * Highest integration on the market - 2 chips plus line driver - Direct ATM interface * Complete modem package - No dependency on external processor - Easy to use command interface Fig. 1: General Block Diagram - Full reference design - Full embedded ADSL control * Combining the power of dedicated DSP blocks with the flexibility of an embedded controller * Highest performance - Fully rate-adaptive - Operation up to 26 kft (24 AWG), 18 kft (26 AWG) - More than 8 Mbps/820kbps up to 5 kft (26 AWG, 6dBmargin) - More than 3 Mbps/720kbps up to 12 kft (26 AWG,6dB margin) or 15.5 kft (24 AWG, 6 dB margin) *Support for multiple standards - ANSI T1.413 Issue 2 - ITU G.dmt - UAWG and G.lite - ADSL over ISDN General Description The MTK-20140 is a complete ADSL modem solution consisting of an integrated Analog Front-End (MTC-20144) and a digital chip (MTC-20146) integrating the DMT/ATM digital modem (MTC20135) and a dedicated ADSL Transceiver Controller with associated FW. The MTK-20140 therefore provides all the active functions required to implement a complete ATM-based, rate adaptive DMT ADSL modem. As shown in figure 1, the chipset interfaces have been defined to allow direct integration into systems design, reducing both time-to-market and implementation risks. The data interface is implemented as an ATM Utopia interface. A HW /FW command and control interface (CTRLE), to communicate with external management entities, is directly provided, without need for glue logic. MTK-20140 The chipset employs Discrete Multitone modulation as specified in ANSI T1.413. It also complies with ITU G-dmt and G-Lite standards through SW upgrades. Additional Reed Solomon forward error correction with or without interleaving provides maximum noise immunity. The chipset can operate at either end of the loop (in ATU-C and ATU-R modes) with only changes in the controller code. The MTK-20140 elements are further detailed in the following documents: MTC-20144 - Analog Front-End MTC-20146 - DMT Modem and ATM Framer with embedded ADSL Tranceiver Controller CTRLE - Modem Control Interface The Alcatel ADSL Modem Chipset MTK-20140 DynaMiTe TM is a 2 chip ADSL Modem Transceiver with embedded transceiver controller. The kit also includes the necessary modem FW running on the Transceiver Controller. The chipset directly interfaces with ATM systems to allow ATM traffic to be transported at high speed on copper pairs with minimum overhead. The bitrate can be varied in steps of 32 kbits/s. The Chipset Functions The chip functions are depicted in the block diagram of the ADSL modem presented in Fig. 2. The functions included in each IC are as follows: The Modem Environment Although the required capabilities of the transceiver at the network termination and the local exchange points are not the same (ADSL is an asymmetrical transmission mode), the same chipset is used at both sides of the link. An external ADSL-compatible line driver is used to drive the telephone twisted pair. Finally, an analog POTS splitter is needed to split the baseband analog telephone signal from the modulated ADSL signal. In G-Lite mode, the splitter can be removed and replaced by distributed POTS filters. Brief characteristics of the system are given in table 1. Table 2 shows speed versus distance in upstream and downstream directions. * An Analog Front-end Circuit (MTK-20140) This CMOS IC contains the analog functions required in the transceiver. In order to cope with the high attenuation of the line and in order to keep acceptable noise level of the signal, automatic gain control amplifiers have been implemented at the analog front of the transmission and reception paths. Then, the signal is passed through low pass filters to eliminate the echo signal and out-ofband interferences. Depending on the configuration, ATU-C or ATU-R, upstream and downstream channel filter may be exchanged between the transmission and the reception channel. Interleaver IFFT Tx Filter FFT SIPO DEMAPPER De-Interleaver MONITOR RS-decoder DMT Symbol Buffer ATM RS-decoder Analog Front End MTC-20144 Line Driver Interpolator + DAC AGC & Tx Filter Echo Filter MUX RS-coder ATM UTOPIA . . . PISO RS-coder MAPPER Bitstream DMT Symbol Buffer ADSL Modem /ATM Framer/Embedded Controller MTC-20146 TEQ + Decimator + Hybrid ADC AGC & Rx Filter POTS Line Splitter Control Interface CTRLE Control RAM CTRLE I/F Controller core ROM optional Fig. 2: ADSL Chipset Block Diagram 2 MTK-20140 The AD and DA converters provide 12 bit resolution at 8.8 MHz sampling rate. Finally, for the transmission part, the control of the external hybrid drivers is done by an integrated highly linear line pre-driver. 3. Interface to ATMF Standard UTOPIA Bus The IC contains the ATM-related functions to interface with the ATM UTOPIA bus and supports level 1 and level 2 modes. 4. Control of Transceiver Chip Operations: The device implements the necessary Inverse- and Fast Fourier Transform (IFFT, FFT), the Time- and Frequency-Domain Equalizer (TEQ, FEQ) plus timing units and voltage controlled Xtal oscillator (VCXO). These last blocks implement efficient synchronization algorithms to improve the efficiency of the recovery of data. The MTC-20146 runs the FW controlling the operations of the ADSL transceiver (AFE, DMT modem, Framer). During modem initialization, the controller computes and sets up parameters for all programmable DMT functions, filters and equalizers. The controller is able to run in different rate-adaptive modes as defined by the operator and can run programs for the ATU-C (master mode) or for the ATU-R (slave-mode) sides. The controller also implements the EOC and AOC protocols. ITU G-hs and G-PLOAM will also be implemented through SW upgrades. During operation, the MTC-20146 performs continuous line monitoring and initiates consecutive actions as specified by the operator (e.g. bit-swapping, dynamic bit-rate adaptation, fast retrain...) and collects performance and error information for use by management entities. 2. Framing Functions 5. Interface to Management Entities The MTC-20146 implements framing functions for the generic and ATM Transmission Convergence (TC) layers. The generic TC consists of data scrambling and Reed-Solomon error correction with and without interleaving. The MTC-20146 also runs the communication protocol to interface with external management entities. A specific ADSL modem control interface has been defined to ease the integration with both systems HW and FW. This so-called CTRLE communication channel is used to transfer information and commands between modem and management entities. These commands/ responses are fully described in the "CTRLE specification" document and can be categorized as follows : * Configuration of a modem line * De-allocation of a modem line * Operational Data Retrieval * Performance Data Retrieval * Defect Retrieval * Modem/Framer/Controller (MTC-20146) This CMOS IC contains all the digital functional blocks required for the following functions. 1. Discrete Multi Tone (DMT) Modulation and Demodulation The MTC-20146 implements digitally the Quadrature-Amplitude Modulation (QAM) mapper/ demapper which allows up to 14 bits coding per tone (a constellation of 16383 points). The ATM TC includes cell level functions (such as cell delineation, insertion/ extraction of idle cells, payload scrambling, HEC check) and data frame generation. Several framing variants are implemented (such as interleaved and noninterleaved modes, full and reduced overhead) to ensure compliance with ANSI T1.413 Issue 2 and ITU G-dmt and GLite. 3 The MTC-20146 provides direct HW connection to external components (processors, SARs, Muxes,...) through an 8bit parallel or bus. MTK-20140 Table 1 : Summary of Characteristics ADSL Chips MTC-20144 4.3 kHz tone spacing ADC 12 bit resolution, 8.832 MHz sampling rate DAC 12 bit resolution, 8.832 MHz sampling rate Analog/tunable low-pass filters Upstream channel fc 138 kHz, <1dB ripple Downstream channel fc 1100 kHz, <1dB ripple AGC range: 0..31 dB in steps of 1 dB (Rx) -15..0 dB in steps of 1 dB (Tx predriver) Package: 64 TQFP MTC-20146 DMT modulation max. number of bit per tone: 14 bits (16383 constellation points) max. number of tones: 256 tones Max. clock speed: 36 MHz Max. tone spacing: 4.325 kHz RS encoder: max codeword 256 bytes ATM Processor: ATM cell buffering Cell counting Insert/Extract, Idle/Unassigned ATM cells (rate adaptation) ATM HEC generation module (CCITT I.432) ATM payload scrambler: payload width: 48 bytes UTOPIA Level 2 Interface Embedded ARM microcore Modem Command interface parallel 8bit bus serial bus (SPI) dual port RAM Mailbox Packages: TQFP 176 or PQFP 208 Table 2: Performance Measurements Distances Data rate at 6 dB margin 0.5 mm 24 AWG Upstream Downstream 0.9 km - 3 kft 820 kbit/s 8 Mbit/s 2.7 km - 9 kft 820 kbit/s 7 Mbit/s 3.6 km - 12 kft 820 kbit/s 5.2 Mbit/s 4.5 km - 15 kft 768 kbit/s 3.2 Mbit/s 6.3 km - 21 kft 640 kbit/s 800 kbit/s 4 MTK-20140 Building Systems with MTK-20140 Great care has been taken in defining the MTK-20140 to ease its integration into system designs. In particular, this is achieved : * at HW level : by using standard interfaces both for data transfer (ATM Utopia) and for control (8-bit parallel) * at FW level: by clearly separating the modem FW, run on the embedded Transceiver Controller from other systems related and application-specific functions. The boundary between the two domains is provided by means of a simple modem control protocol (CTRLE). This "packaged modem" approach provides a self-contained ADSL modem solution, allowing system manufacturers to concentrate on system issues. Line signal Designs using the MTK-20131 can be readily adapted to support the MTK20140. External interfaces remain the same so that there is no impact on external system HW and SW elements. The MTK-20140 comes in a full package with full FW, schematics, Bill of Material and layout information for the ADSL modem part. It is further supported by a full development environment comprising: * Evaluation boards for ATU-C and ATU-R sides * Interface card for easy connection of CTRLE to a PC (e.g. through RS232) * PC FW driver for CTRLE * ADSL test and control FW running on PC with GUI MTK-20140 reference design Discr ete Analog MTC-20144 MTC-20146 Utopia Data RAM CTRLE SW Fig. 3: MTK-20140 Modem Package 5 ATM function Manag. entity MTK-20140 Alcatel Microelectronics acknowledges the trademarks of all companies referred to in this document. This document contains information on a new product. Alcatel Microelectronics reserves the right to make changes in specifications at any time and without notice. The information furnished by Alcatel Microelectronics in this document is believed to be accurate and reliable. However, no responsibility is assumed by Alcatel Microelectronics for its use, nor for any infringements of patents or other rights of third parties resulting from its use. No licence is granted under any patents or patent rights of Alcatel Microelectronics. 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