MTC-20146 - AMI Semiconductor, Inc.

Applications

•Central office and end-user

equipment

•DSL Access Multiplexers

(DSLAM)

•ADSL PC NICs

•ADSL access for routers

•DLC upgrade

•ADSL line cards for ATM

switches and multiplexers

Features

• 4th generation Alcatel ADSL

• Compatible with MTK-20131

• Highest integration on the

market

- 2 chips plus line driver

- Direct ATM interface

• Complete modem package

- No dependency on external

processor

- Easy to use command inter-

face

- Full reference design

- Full embedded ADSL control

• Combining the power of dedi-

cated DSP blocks with the

flexibility of an embedded

controller

• Highest performance

- Fully rate-adaptive

- Operation up to 26 kft (24

AWG), 18 kft (26 AWG)

- More than 8 Mbps/820kbps

up to 5 kft (26 AWG,

6dBmargin)

- More than 3 Mbps/720kbps

up to 12 kft (26 AWG,6dB

margin) or 15.5 kft (24

AWG, 6 dB margin)

•Support for multiple standards

- ANSI T1.413 Issue 2

- ITU G.dmt

- UAWG and G.lite

- ADSL over ISDN

General Description

The MTK-20140 is a complete ADSL

modem solution consisting of an integra-

ted Analog Front-End (MTC-20144) and

a digital chip (MTC-20146) integrating

the DMT/ATM digital modem (MTC-

20135) and a dedicated ADSL Trans-

ceiver Controller with associated FW.

The MTK-20140 therefore provides all

the active functions required to imple-

ment a complete ATM-based, rate

adaptive DMT ADSL modem.

As shown in figure 1, the chipset inter-

faces have been defined to allow direct

integration into systems design, redu-

cing both time-to-market and implemen-

tation risks.

The data interface is implemented as an

ATM Utopia interface. A HW /FW

command and control interface (CTRLE),

to communicate with external manage-

ment entities, is directly provided,

without need for glue logic.

MTK-20140

“DynaMiTe™” Rate Adaptive

Asymmetrical Digital Subscriber

Line (ADSL) Modem Chipset

Rev. 1 - January 1999

Fig. 1: General Block Diagram

Product Brief

Analog Front End

MTC-20144

RS-coder

RS-decoder

ATM

UTOPIA

Interleaver

De-Interleaver

MONITOR

MAPPER

DEMAPPER

ROM

RAM

IFFT

FFT

ADSL Modem /ATM Framer/Embedded Controller

MTC-20146

PISO

SIPO

Tx Filter

TEQ

Echo

Filter

Interpolator

Decimator

ADC

DAC

AGC &

Tx Filter

AGC &

Rx Filter

Line Driver

POTS

Splitter

Line

Hybrid

DMT Symbol

Buffer

DMT Symbol

Buffer

MUX

ATM

Bitstream

Controller

core

CTRLE

I/F

CTRLE

Control

Control Interface

Fig. 2: ADSL Chipset Block Diagram

The chipset employs Discrete Multitone

modulation as specified in ANSI

T1.413. It also complies with ITU G-dmt

and G-Lite standards through SW

upgrades. Additional Reed Solomon for-

ward error correction with or without

interleaving provides maximum noise

immunity.

The chipset can operate at either end of

the loop (in ATU-C and ATU-R modes)

with only changes in the controller code.

The MTK-20140 elements are further

detailed in the following documents:

MTC-20144 - Analog Front-End

MTC-20146 - DMT Modem and ATM

Framer with embedded

ADSL Tranceiver Controll-

CTRLE - Modem Control Interface

The Alcatel ADSL

Modem Chipset

MTK-20140 DynaMiTe ™ is a 2 chip

ADSL Modem Transceiver with embed-

ded transceiver controller.

The kit also includes the necessary

modem FW running on the Transceiver

Controller.

The chipset directly interfaces with ATM

systems to allow ATM traffic to be trans-

ported at high speed on copper pairs

with minimum overhead.

The Modem Environ-

ment

Although the required capabilities of the

transceiver at the network termination

and the local exchange points are not

the same (ADSL is an asymmetrical

transmission mode), the same chipset is

used at both sides of the link.

An external ADSL-compatible line driver

is used to drive the telephone twisted

pair. Finally, an analog POTS splitter is

needed to split the baseband analog

telephone signal from the modulated

ADSL signal. In G-Lite mode, the splitter

can be removed and replaced by distri-

buted POTS filters.

Brief characteristics of the system are

given in table 1. Table 2 shows speed

versus distance in upstream and downs-

tream directions.

The bitrate can be varied in steps of 32

kbits/s.

The Chipset Functions

The chip functions are depicted in the

block diagram of the ADSL modem pre-

sented in Fig. 2.

The functions included in each IC are as

follows:

•An Analog Front-end Circuit

(MTK-20140)

This CMOS IC contains the analog

functions required in the transceiver. In

order to cope with the high attenuation

of the line and in order to keep accep-

table noise level of the signal, automatic

gain control amplifiers have been imple-

mented at the analog front of the trans-

mission and reception paths. Then, the

signal is passed through low pass filters

to eliminate the echo signal and out-of-

band interferences. Depending on the

configuration, ATU-C or ATU-R, ups-

tream and downstream channel filter

may be exchanged between the trans-

mission and the reception channel.

MTK-20140

optional

MTK-20140

The AD and DA converters provide 12

bit resolution at 8.8 MHz sampling

rate.

Finally, for the transmission part, the

control of the external hybrid drivers is

done by an integrated highly linear line

pre-driver.

• Modem/Framer/Controller

(MTC-20146)

This CMOS IC contains all the digital

functional blocks required for the follo-

wing functions.

1. Discrete Multi Tone (DMT)

Modulation and Demodulation

The MTC-20146 implements digitally

the Quadrature-Amplitude Modulation

(QAM) mapper/ demapper which

allows up to 14 bits coding per tone (a

constellation of 16383 points).

The device implements the necessary

Inverse- and Fast Fourier Transform (IFFT,

FFT), the Time- and Frequency-Domain

Equalizer (TEQ, FEQ) plus timing units

and voltage controlled Xtal oscillator

(VCXO).

These last blocks implement efficient syn-

chronization algorithms to improve the

efficiency of the recovery of data.

2. Framing Functions

The MTC-20146 implements framing

functions for the generic and ATM Trans-

mission Convergence (TC) layers.

The generic TC consists of data scram-

bling and Reed-Solomon error correction

with and without interleaving.

The ATM TC includes cell level functions

(such as cell delineation, insertion/

extraction of idle cells, payload scram-

bling, HEC check) and data frame gene-

ration.

Several framing variants are imple-

mented (such as interleaved and non-

interleaved modes, full and reduced ove-

rhead) to ensure compliance with ANSI

T1.413 Issue 2 and ITU G-dmt and G-

Lite.

3. Interface to ATMF Standard

UTOPIA Bus

The IC contains the ATM-related func-

tions to interface with the ATM UTOPIA

bus and supports level 1 and level 2

modes.

4. Control of Transceiver Chip

Operations:

The MTC-20146 runs the FW controlling

the operations of the ADSL transceiver

(AFE, DMT modem, Framer). During

modem initialization, the controller com-

putes and sets up parameters for all pro-

grammable DMT functions, filters and

equalizers. The controller is able to run

in different rate-adaptive modes as defi-

ned by the operator and can run pro-

grams for the ATU-C (master mode) or

for the ATU-R (slave-mode) sides. The

controller also implements the EOC and

AOC protocols. ITU G-hs and G-PLOAM

will also be implemented through SW

upgrades.

During operation, the MTC-20146 per-

forms continuous line monitoring and ini-

tiates consecutive actions as specified

by the operator (e.g. bit-swapping,

dynamic bit-rate adaptation, fast

retrain...) and collects performance and

error information for use by manage-

ment entities.

5. Interface to Management Entities

The MTC-20146 also runs the communi-

cation protocol to interface with external

management entities.

A specific ADSL modem control inter-

face has been defined to ease the inte-

gration with both systems HW and FW.

This so-called CTRLE communication

channel is used to transfer information

and commands between modem and

management entities. These commands/

responses are fully described in the

“CTRLE specification” document and

can be categorized as follows :

•Configuration of a modem line

•De-allocation of a modem line

•Operational Data Retrieval

•Performance Data Retrieval

•Defect Retrieval

The MTC-20146 provides direct HW

connection to external components (pro-

cessors, SARs, Muxes,...) through an 8-

bit parallel or bus.

MTK-20140

Table 2: Performance Measurements

MTC-20144

4.3 kHz tone spacing

ADC 12 bit resolution, 8.832 MHz sampling rate

DAC 12 bit resolution, 8.832 MHz sampling rate

Analog/tunable low-pass filters

Upstream channel fc 138 kHz, <1dB ripple

Downstream channel fc 1100 kHz, <1dB ripple

AGC range: 0..31 dB in steps of 1 dB (Rx)

-15..0 dB in steps of 1 dB (Tx predriver)

Package: 64 TQFP

MTC-20146

DMT modulation

max. number of bit per tone: 14 bits (16383 constellation points)

max. number of tones: 256 tones

Max. clock speed: 36 MHz

Max. tone spacing: 4.325 kHz

RS encoder: max codeword 256 bytes

ATM Processor:

ATM cell buffering

Cell counting

Insert/Extract, Idle/Unassigned ATM cells (rate adaptation)

ATM HEC generation module (CCITT I.432)

ATM payload scrambler: payload width: 48 bytes

UTOPIA Level 2 Interface

Embedded ARM microcore

Modem Command interface

parallel 8bit bus

serial bus (SPI)

dual port RAM Mailbox

Packages: TQFP 176 or PQFP 208

Table 1 : Summary of Characteristics ADSL Chips

Distances Data rate at 6 dB margin

0.5 mm Upstream Downstream

24 AWG

0.9 km - 3 kft 820 kbit/s 8 Mbit/s

2.7 km - 9 kft 820 kbit/s 7 Mbit/s

3.6 km - 12 kft 820 kbit/s 5.2 Mbit/s

4.5 km - 15 kft 768 kbit/s 3.2 Mbit/s

6.3 km - 21 kft 640 kbit/s 800 kbit/s

Building Systems with

MTK-20140

Great care has been taken in defining

the MTK-20140 to ease its integration

into system designs. In particular, this is

achieved :

•at HW level : by using standard inter-

faces both for data transfer (ATM Uto-

pia) and for control (8-bit parallel)

•at FW level: by clearly separating the

modem FW, run on the embedded

Transceiver Controller from other sys-

tems related and application-specific

functions. The boundary between the

two domains is provided by means of a

simple modem control protocol (CTRLE).

This “packaged modem” approach pro-

vides a self-contained ADSL modem

solution, allowing system manufacturers

to concentrate on system issues.

Designs using the MTK-20131 can be

readily adapted to support the MTK-

20140. External interfaces remain the

same so that there is no impact on exter-

nal system HW and SW elements.

The MTK-20140 comes in a full packa-

ge with full FW, schematics, Bill of

Material and layout information for the

ADSL modem part.

It is further supported by a full develop-

ment environment comprising:

•Evaluation boards for ATU-C and

ATU-R sides

•Interface card for easy connection of

CTRLE to a PC (e.g. through RS232)

•PC FW driver for CTRLE

•ADSL test and control FW running on

PC with GUI

MTK-20140

Fig. 3: MTK-20140 Modem Package

Utopia

CTRLE

Discr

Discrete

ete

Analog

RAM

MTC-20144

MTC-20144 MTC-20146

MTC-20146

Line

signal

MTK-20140 reference design

Data

ATM

function

Manag.

entity

MTK-20140

01/99 PB0271b

Alcatel Microelectronics acknowledges the trademarks of all companies referred to in this document.

This document contains information on a new product.

Alcatel Microelectronics

reserves the right to make

changes in specifications at any time and without notice.

The information furnished by

Alcatel Microelectronics

in this

document is believed to be accurate and reliable.

However, no responsibility is assumed by

Alcatel

Microelectronics

for its use, nor for any infringements of

patents or other rights of third parties resulting from its use.

No licence is granted under any patents or patent rights

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