2.5 kV Isolated RS-485 Transceivers with
Integrated Transformer Driver
ADM2482E/ADM2487E
Rev. 0
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FEATURES
Isolated RS-485/RS-422 transceivers, configurable as half
duplex or full duplex
Integrated oscillator driver for external transformer
±15 kV ESD protection on RS-485 input/output pins
Complies with TIA/EIA-485-A-98 and ISO 8482:1987(E)
Data rate: 500 kbps/16 Mbps
5 V or 3.3 V operation (VDD1)
256 nodes on bus
True fail-safe receiver inputs
2500 V rms isolation for 1 minute
Reinforced insulation 560 V peak
High common-mode transient immunity: >25 kV/μs
Thermal shutdown protection
Operating temperature range: −40°C to +85°C
Wide-body, 16-lead SOIC package
APPLICATIONS
Isolated RS-485/RS-422 interfaces
Industrial field networks
Multipoint data transmission systems
FUNCTIONAL BLOCK DIAGRAM
VDD1 VDD2
D1 D2
DE
TxD
RxD
RE
GND1GND2
Y
Z
A
B
OSC
GALVANIC ISOLATION
07379-001
Figure 1.
GENERAL DESCRIPTION
The ADM2482E/ADM2487E are isolated data transceivers with
±15 kV ESD protection and are suitable for high speed, half-
duplex or full-duplex communication on multipoint transmission
lines. For half-duplex operation, the transmitter outputs and
receiver inputs share the same transmission line. Transmitter
Output Pin Y is linked externally to Receiver Input Pin A, and
Transmitter Output Pin Z to Receiver Input Pin B. The parts
are designed for balanced transmission lines and comply with
TIA/EIA- 485-A-98 and ISO 8482:1987(E).
The devices employ the Analog Devices, Inc., iCoupler®
technology to combine a 3-channel isolator, a three-state
differential line driver, and a differential input receiver into a
single package. An on-chip oscillator outputs a pair of square
waveforms that drive an external transformer to provide isolated
power. The logic side of the device can be powered with either
a 5 V or a 3.3 V supply, and the bus side is powered with an
isolated 3.3 V supply.
The ADM2482E/ADM2487E driver has an active high enable,
and the receiver has an active low enable. The driver output
enters a high impedance state when the driver enable signal
is low. The receiver output enters a high impedance state when
the receiver enable signal is high.
The device has current-limiting and thermal shutdown features
to protect against output short circuits and situations where bus
contention might cause excessive power dissipation. The part is
fully specified over the industrial temperature range of −40°C to
+85°C and is available in a 16-lead, wide-body SOIC package.
ADM2482E/ADM2487E
Rev. 0 | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Timing Specifications .................................................................. 4
Package Characteristics ............................................................... 5
Insulation and Safety-Related Specifications ............................ 5
Test Circuits ................................................................................... 6
Switching Characteristics ............................................................ 7
Absolute Maximum Ratings ............................................................ 8
ESD Caution .................................................................................. 8
Pin Configuration and Function Descriptions ............................. 9
Typical Performance Characteristics ........................................... 10
Circuit Description......................................................................... 13
Electrical Isolation ...................................................................... 13
Truth Tables................................................................................. 13
Thermal Shutdown .................................................................... 14
True Fail-Safe Receiver Inputs .................................................. 14
Magnetic Field Immunity .......................................................... 14
Applications Information .............................................................. 15
Printed Circuit Board Layout ................................................... 15
Isolated Power Supply Circuit .................................................. 15
Typical Applications ................................................................... 16
Outline Dimensions ....................................................................... 17
Ordering Guide .......................................................................... 17
REVISION HISTORY
5/08—Revision 0: Initial Version
ADM2482E/ADM2487E
Rev. 0 | Page 3 of 20
SPECIFICATIONS
All voltages are relative to their respective ground; 3.0 V ≤ VDD1 ≤ 5.5 V, 3.0 V ≤ VDD2 ≤ 3.6 V. All minimum/maximum specifications
apply over the entire recommended operation range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = 5 V,
VDD2 = 3.3 V, unless otherwise noted.
Table 1.
Parameter Symbol Min Typ Max Unit Test Conditions
SUPPLY CURRENT
Power-Supply Current, Logic Side
TxD/RxD Data Rate < 500 kbps IDD1 3.5 mA Unloaded output
ADM2487E TxD/RxD Data Rate = 500 kbps IDD1 4 mA Half-duplex configuration,
RTERMINATION = 120 Ω, see Figure 8
ADM2482E TxD/RxD Data Rate = 16 Mbps IDD1 6.0 mA Half-duplex configuration,
RTERMINATION = 120 Ω, see Figure 8
Power-Supply Current, Bus Side
TxD/RxD Data Rate < 500 kbps IDD2 17 mA Unloaded output
ADM2487E TxD/RxD Data Rate = 500 kbps IDD2 40 mA VDD2 = 3.6 V, half-duplex
configuration, RTERMINATION = 120 Ω,
see Figure 8
ADM2482E TxD/RxD Data Rate = 16 Mbps IDD2 50 mA VDD2 = 3.6 V, half-duplex
configuration, RTERMINATION = 120 Ω,
see Figure 8
DRIVER
Differential Outputs
Differential Output Voltage, Loaded |VOD2| 2.0 5.0 V RL = 100 Ω (RS-422), see Figure 2
1.5 5.0 V RL = 54 Ω (RS-485), see Figure 2
|VOD3| 1.5 5.0 V −7 V ≤ VTEST ≤ +12 V, see Figure 3
∆|VOD| for Complementary Output States ∆|VOD| 0.2 V RL = 54 Ω or 100 Ω, see Figure 2
Common-Mode Output Voltage VOC 3.0 V RL = 54 Ω or 100 Ω, see Figure 2
∆|VOC| for Complementary Output States ∆|VOC| 0.2 V RL = 54 Ω or 100 Ω, see Figure 2
Short-Circuit Output Current IOS 250 mA
Output Leakage Current (Y, Z) IO 125 μA
DE = 0 V, RE = 0 V, VCC = 0 V or
3.6 V, VIN = 12 V
−100 μA
DE = 0 V, RE = 0 V, VCC = 0 V or
3.6 V, VIN = −7 V
Logic Inputs
Input Threshold Low VIL 0.25 × VDD1 V DE, RE, TxD
Input Threshold High VIH 0.7 × VDD1 V DE, RE, TxD
Input Current II −10 +0.01 +10 μA
DE, RE, TxD
RECEIVER
Differential Inputs
Differential Input Threshold Voltage VTH −200 −125 −30 mV −7 V < VCM < +12 V
Input Voltage Hysteresis VHYS 15 mV VOC = 0 V
Input Current (A, B) II 125 μA DE = 0 V, VDD = 0 V or 3.6 V,
VIN = 12 V
−125 μA DE = 0 V, VDD = 0 V or 3.6 V,
VIN = −7 V
Line Input Resistance RIN 96 kΩ −7 V < VCM < +12 V
Logic Outputs
Output Voltage Low VOLRxD 0.2 0.4 V IORxD = 1.5 mA, VA − VB = −0.2 V
Output Voltage High VOHRxD V
DD1 − 0.3 VDD1 − 0.2 V IORxD = −1.5 mA, VA − VB = 0.2 V
Short Circuit Current IOS 100 mA
Tristate Output Leakage Current IOZR ±1 μA VDD1 = 5.0 V, 0 V < VO < VDD1
ADM2482E/ADM2487E
Rev. 0 | Page 4 of 20
Parameter Symbol Min Typ Max Unit Test Conditions
TRANSFORMER DRIVER
Oscillator Frequency fOSC 400 500 600 kHz VDD1 = 5.0 V
230 330 430 kHz VDD1 = 3.3 V
Switch-On Resistance RON 0.5 1.5 Ω
Start-Up Voltage VSTART 2.2 2.5 V
COMMON-MODE TRANSIENT IMMUNITY1 25 kV/μs VCM = 1 kV, transient
magnitude = 800 V
1 CM is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential
difference between the logic and bus sides. The transient magnitude is the range over which the common-mode is slewed. The common-mode voltage slew rates
apply to both rising and falling common-mode voltage edges.
TIMING SPECIFICATIONS
TA = −40°C to +85°C
Table 2. ADM2482E
Parameter Symbol Min Typ Max Unit Test Conditions
DRIVER
Propagation Delay tDPLH, tDPHL 100 ns RDIFF = 54 Ω, CL = 100 pF, see Figure 4 and Figure 9
Output Skew tDSKEW 8 ns RDIFF = 54 Ω, CL = 100 pF, see Figure 4 and Figure 9
Rise Time/Fall Time tDR, tDF 15 ns RDIFF = 54 Ω, CL = 100 pF, see Figure 4 and Figure 9
Enable Time tZL, tZH 120 ns RL = 110 Ω, CL = 50 pF, see Figure 5 and Figure 11
Disable Time tLZ, tHZ 150 ns RL = 110 Ω, CL = 50 pF, see Figure 5 and Figure 11
RECEIVER
Propagation Delay tPLH, tPHL 110 ns CL = 15 pF, see Figure 6 and Figure 10
Output Skew tSKEW 8 ns CL = 15 pF, see Figure 6 and Figure 10
Enable Time tZL, tZH 13 ns RL = 1 kΩ, CL = 15 pF, see Figure 7 and Figure 12
Disable Time tLZ, tHZ 13 ns RL = 1 kΩ, CL = 15 pF, see Figure 7 and Figure 12
Table 3. ADM2487E
Parameter Symbol Min Typ Max Unit Test Conditions
DRIVER
Propagation Delay tDPLH, tDPHL 250 700 ns RDIFF = 54 Ω, CL = 100 pF, see Figure 4 and Figure 9
Output Skew tDSKEW 100 ns RDIFF = 54 Ω, CL = 100 pF, see Figure 4 and Figure 9
Rise Time/Fall Time tDR, tDF 200 1100 ns RDIFF = 54 Ω, CL = 100 pF, see Figure 4 and Figure 9
Enable Time tZL, tZH 2.5 μs RL = 110 Ω, CL = 50 pF, see Figure 5 and Figure 11
Disable Time tLZ, tHZ 200 ns RL = 110 Ω, CL = 50 pF, see Figure 5 and Figure 11
RECEIVER
Propagation Delay tPLH, tPHL 200 ns CL = 15 pF, see Figure 6 and Figure 10
Output Skew tSKEW 30 ns CL = 15 pF, see Figure 6 and Figure 10
Enable Time tZL, tZH 13 ns RL = 1 kΩ, CL = 15 pF, see Figure 7 and Figure 12
Disable Time tLZ, tHZ 13 ns RL = 1 kΩ, CL = 15 pF, see Figure 7 and Figure 12
ADM2482E/ADM2487E
Rev. 0 | Page 5 of 20
PACKAGE CHARACTERISTICS
Table 4.
Parameter Symbol Min Typ Max Unit Test Conditions
Resistance (Input-Output)1RI-O 1012 Ω
Capacitance (Input-Output)1
CI-O 3 pF f = 1 MHz
Input Capacitance2CI 4 pF
Input IC Junction-to-Case Thermal Resistance θJCI 33 °C/W
Thermocouple located at center of
package underside
Output IC Junction-to-Case Thermal Resistance θJCO 28 °C/W
Thermocouple located at center of
package underside
1 This device is considered a 2-terminal device: Pin 1 to Pin 8 are shorted together and Pin 9 to Pin 16 are shorted together.
2 Input capacitance is from any input data pin to ground.
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 5.
Parameter Symbol Value Unit Conditions
Rated Dielectric Insulation Voltage 2500 V rms 1-minute duration
Maximum Working Insulation Voltage 560 V peak
Minimum External Air Gap (Clearance) L(I01) 5.7 min mm Measured from input terminals to output terminals,
shortest distance through air
Minimum External Tracking (Creepage) L(I02) 6.1 min mm Measured from input terminals to output terminals,
shortest distance along body
Minimum Internal Gap (Internal Clearance) 0.017 min mm Distance through insulation
Tracking Resistance (Comparative Tracking Index) CTI >175 V DIN IEC 112/VDE 0303-1
ADM2482E/ADM2487E
Rev. 0 | Page 6 of 20
TEST CIRCUITS
Y
Z
T
xD V
OD2
V
OC
R
L
2
R
L
2
07379-003
Figure 2. Driver Voltage Measurement
Y
Z
T
xD V
OD3
0
7379-004
V
TEST
375Ω
375Ω
60Ω
Figure 3. Driver Voltage Measurement
Y
Z
T
xD
07379-006
RDIFF
CL
CL
Figure 4. Driver Propagation Delay
Y
Z
TxD
DE
S1 S2
V
OUT
V
CC
R
L
110Ω
C
L
50pF
07379-007
Figure 5. Driver Enable/Disable
C
L
V
OUT
RE
A
B
07379-008
Figure 6. Receiver Propagation Delay
V
CC
S2
+1.5
V
–
1.5V
S1
RE
RE IN
07379-009
C
L
R
L
V
OUT
Figure 7. Receiver Enable/Disable
GALVANIC ISOLATION
V
DD1
GND
1
V
DD2
V
DD2
GND
2
Y
Z
TxD
DE
A
B
RxD
RE
120Ω
07379-005
Figure 8. Supply-Current Measurement Test Circuit
ADM2482E/ADM2487E
Rev. 0 | Page 7 of 20
SWITCHING CHARACTERISTICS
07379-010
Z
Y
V
DD1
/2V
DD1
/2
t
DPHL
t
DPLH
1/2V
O
V
O
90% POINT
10% POINT 10% POINT
90% POINT
V
DIFF
= V
(Y)
– V
(Z)
t
DR
t
DF
–V
O
V
DIFF
+V
O
0V
V
DD1
Figure 9. Driver Propagation Delay, Rise/Fall Timing
A
–B
RxD
0V 0V
1.5V 1.5V
07379-011
V
OH
V
OL
tPLH tPHL
tSKEW
= |
tPLH
–
tPHL
|
Figure 10. Receiver Propagation Delay
DE
Y
, Z
Y
, Z
V
DD1
0V
0V
V
OL
V
OH
0.5V
DD1
0.5V
DD1
t
ZL
t
LZ
t
ZH
t
HZ
V
OL
+ 0.5V
V
OH
– 0.5V
2.3V
2.3V
07379-012
Figure 11. Driver Enable/Disable Timing
OUTPUT LOW
OUTPUT HIGH
1.5V
1.5V
RxD
RxD
RE
0V
07379-013
0.7V
DD1
0.3V
DD1
V
OL
V
OH
0.5V
DD1
0.5V
DD1
t
ZL
t
LZ
t
ZH
t
HZ
V
OL
+ 0.5V
V
OH
– 0.5V
Figure 12. Receiver Enable/Disable Timing
ADM2482E/ADM2487E
Rev. 0 | Page 8 of 20
ABSOLUTE MAXIMUM RATINGS
All voltages are relative to their respective ground; TA = 25°C,
unless otherwise noted.
Table 6.
Parameter Rating
VDD1 −0.5 V to +6 V
VDD2 −0.5 V to +6 V
Digital Input Voltages (DE, RE, TxD) −0.5 V to VDD1 + 0.5 V
Digital Output Voltages
RxD −0.5 V to VDD1 + 0.5 V
D1, D2 13 V
Driver Output/Receiver Input Voltage −9 V to +14 V
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −55°C to +150°C
Average Output Current per Pin −35 mA to +35 mA
ESD (Human Body Model) on A, B, Y
and Z pins
±15 kV
Lead Temperature
Soldering (10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ADM2482E/ADM2487E
Rev. 0 | Page 9 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC = NO CONNECT
ADM2482E/
ADM2487E
TOP VIEW
(Not to Scale)
D1
1
D2
2
G
ND
13
V
DD1 4
V
DD2
16
GND
2
15
A
14
B
13
RxD
5
Z
12
RE
6
Y
11
DE
7
NC
10
TxD
8
GND
2
9
07379-002
Figure 13. Pin Configuration
Table 7. Pin Function Descriptions
Pin No. Mnemonic Description
1 D1 Transformer Driver Terminal 1.
2 D2 Transformer Driver Terminal 2.
3 GND1 Ground, Logic Side.
4 VDD1 Power Supply, Logic Side (3.3 V or 5 V). Decoupling capacitor to GND1 required; capacitor value should be
between 0.01 μF and 0.1 μF.
5 RxD
Receiver Output Data. This output is high when (A – B) > +200 mV and low when (A – B) < –200 mV. The
output is tristated when the receiver is disabled, that is, when RE is driven high.
6 RE Receiver Enable Input. This is an active-low input. Driving this input low enables the receiver; driving it high
disables the receiver.
7 DE Driver Enable Input. Driving this input high enables the driver; driving it low disables the driver.
8 TxD Transmit Data.
9 GND2 Ground, Bus Side.
10 NC No Connect. This pin must be left floating.
11 Y Driver Noninverting Output.
12 Z Driver Inverting Output.
13 B Receiver Inverting Input.
14 A Receiver Noninverting Input.
15 GND2 Ground, Bus Side.
16 VDD2 Power Supply, Bus Side (Isolated 3.3 V Supply). Decoupling capacitor to GND2 required; capacitor value should b
between 0.01 μF and 0.1 μF.
ADM2482E/ADM2487E
Rev. 0 | Page 10 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
2.30
2.25
2.20
2.15
2.10
2.05
2.00
1.95
–40 –15 10 35 60 85
TEMPERATURE (°C)
SUPPLY CURRENT I
DD1
(mA)
07379-029
NO LOAD
54Ω LOAD
120Ω LOAD
Figure 14. ADM2487E IDD1 Supply Current vs. Temperature
(Data Rate = 500 kbps, VDD1 = 5 V, VDD2 = 3.3 V, DE = 1 V, RE = 0 V)
40
35
30
25
20
15
10
5
0
–40 –15 10 35 60 85
TEMPERATURE (°C)
SUPPLY CURRENT I
DD2
(mA)
07379-030
NO LOAD
54Ω LOAD
120Ω LOAD
Figure 15. ADM2487E IDD2 Supply Current vs. Temperature (See Figure 8)
(Data Rate = 500 kbps, VDD1 = 5 V, VDD2 = 3.3 V, DE = 1 V, RE = 0 V)
4.0
3.9
3.8
3.7
3.6
3.5
3.4
3.3
3.2
3.1
–40 –15 10 35 60 85
TEMPERATURE (°C)
SUPPLY CURRENT I
DD1
(mA)
07379-031
NO LOAD
54Ω LOAD
120Ω LOAD
Figure 16. ADM2482E IDD1 Supply Current vs. Temperature (Data Rate =
16 Mbps, VDD1 = 5 V, VDD2 = 3.3 V, DE = 1 V, RE = 0 V)
60
50
40
30
20
10
0
–40 –15 10 35 60 85
TEMPERATURE (°C)
SUPPLY CURRENT I
DD1
(mA)
07379-032
NO LOAD
54Ω LOAD
120Ω LOAD
Figure 17. ADM2482E Supply Current vs. Temperature (See Figure 8) (Data
Rate = 16 Mbps, VDD1 = 5 V, VDD2 = 3.3 V, DE = 1, RE =0 V)
600
0
–40 –20 0 20 40 60 80
07379-033
TEMPERATURE (°C)
DRIVER PROPAGATION DELAY (ns)
500
400
300
200
100
t
DPLH
t
DPHL
Figure 18. ADM2487E Driver Propagation Delay vs. Temperature
70
65
60
55
50
45
40
35
30
25
20
–40 –15 10 35 60 85
TEMPERATURE (°C)
DRIVER PROPAGATION DELAY (ns)
07379-034
t
DPLH
t
DPHL
Figure 19. ADM2482E Driver Propagation Delay vs. Temperature
ADM2482E/ADM2487E
Rev. 0 | Page 11 of 20
0
–10
–20
–30
–40
–50
–60
–70
012345
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
07379-016
Figure 20. Output Current vs. Receiver Output High Voltage
60
50
40
30
20
10
0
012345
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
07379-017
Figure 21. Output Current vs. Receiver Output Low Voltage
4.75
4.74
4.73
4.72
4.71
4.70
4.69
4.68
4.67
–40 –20 0 20 40 60 80
OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
07379-018
Figure 22. Receiver Output High Voltage vs. Temperature
(IDD2 = –4 mA)
0.32
0.30
0.28
0.26
0.24
0.22
0.20
–40 –20 0 20 40 60 80
OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
07379-019
Figure 23. Receiver Output Low Voltage vs. Temperature
(IDD2 = 4 mA)
CH1 2.0V ΩCH2 2.0V ΩM400ns 125MS/s
8.0ns/pt
A CH2 1.52V
2
1
D1
D2
07379-020
Figure 24. Switching Waveforms
(50 Ω Pull-Up to VDD1 on D1 and D2)
CH1 2.0V ΩCH2 2.0V ΩM80ns 625MS/s
1.6ns/pt
A CH2 1.52V
1
D1
D2
07379-021
Figure 25. Switching Waveforms
(Break-Before-Make, 50 Ω Pull-Up to VDD1 on D1 and D2)
ADM2482E/ADM2487E
Rev. 0 | Page 12 of 20
07379-035
CH1 2.00V CH2 2.00V
CH3 2.00V CH4 2.00V
M 200ns A CH2 1.72V
2
4
1
T 47.80%
TxD
Z, B
T
Y, A
RxD
07379-037
CH1 2.0V Ω CH2 2.0V Ω
CH3 2.0V Ω CH4 2.0V Ω
M 40.0ns 1.25GS/s
A CH2 1.68V
2
4
1
IT 16.0ps/pt
TxD
Z, B
Y, A
RxD
Figure 26. ADM2487E Driver/Receiver Propagation Delay, Low to High
(RDIFF = 54 Ω, CL1 = CL2 = 100 pF)
Figure 28. ADM2482E Driver/Receiver Propagation Delay, High to Low
(RDIFF = 54 Ω, CL1 = CL2 = 100 pF)
07379-036
CH1 2.00V CH2 2.00V
CH3 2.00V CH4 2.00V
M 200ns A CH2 1.72V
2
4
1
T 48.60%
TxD
Y, A
RxD
Z, B
T
07379-038
CH1 2.0V Ω CH2 2.0V Ω
CH3 2.0V Ω CH4 2.0V Ω
M 40.0ns 1.25GS/s
A CH2 1.68V
2
4
1
IT 16.0ps/pt
TxD
Z, B
Y, A
RxD
Figure 27. ADM2487E Driver/Receiver Propagation Delay, High to Low
(RDIFF = 54 Ω, CL1 = CL2 = 100 pF)
Figure 29. ADM2482E Driver/Receiver Propagation Delay, Low to High
(RDIFF = 54 Ω, CL1 = CL2 = 100 pF)
ADM2482E/ADM2487E
Rev. 0 | Page 13 of 20
CIRCUIT DESCRIPTION
ELECTRICAL ISOLATION
In the ADM2482E/ADM2487E, electrical isolation is imple-
mented on the logic side of the interface. Therefore, the part has
two main sections: a digital isolation section and a transceiver
section (see Figure 30). Driver input and data enable applied
to the TxD and DE pins, respectively, and referenced to logic
ground (GND1) are coupled across an isolation barrier to
appear at the transceiver section referenced to isolated ground
(GND2). Similarly, the receiver output, referenced to isolated
ground in the transceiver section, is coupled across the isolation
barrier to appear at the RxD pin referenced to logic ground.
iCoupler Technology
The digital signals transmit across the isolation barrier using
iCoupler technology. This technique uses chip scale transformer
windings to couple the digital signals magnetically from one
side of the barrier to the other. Digital inputs are encoded into
waveforms that are capable of exciting the primary transformer
winding. At the secondary winding, the induced waveforms are
decoded into the binary value that was originally transmitted.
Positive and negative logic transitions at the input cause narrow
pulses (~1 ns) to be sent to the decoder, via the transformer.
The decoder is bistable and is, therefore, either set or reset by
the pulses, indicating input logic transitions. In the absence of
logic transitions at the input for more than ~1 μs, a periodic set
of refresh pulses indicative of the correct input state are sent to
ensure dc correctness at the output. If the decoder receives no
internal pulses for more than about 5 μs, then the input side is
assumed to be unpowered or nonfunctional, in which case the
output is forced to a default state (see Table 8).
V
DD1
GND
1
GND
2
V
DD2
D1 D2
OSC
ENCODE DECODE
ENCODE DECODE
ENCODE DECODE
DIGITAL ISOLATION TRANSCEIVER
D
R
DE
TxD
RxD
RE
ISOLATION
BARRIER
Y
Z
A
B
07379-022
Figure 30. ADM2482E/ADM2487E Digital Isolation and Transceiver Sections
TRUTH TABLES
The truth tables in this section use the abbreviations found in
Table 8.
Table 8. Truth Table Abbreviations
Letter Description
H High level
I Indeterminate
L Low level
X Irrelevant
Z High impedance (off)
NC Disconnected
Table 9. Transmitting
Supply Status Inputs Outputs
VDD1 V
DD2 DE TxD Y Z
On On H H H L
On On H L L H
On On L X Z Z
On Off X X Z Z
Off On L X Z Z
Off Off X X Z Z
Table 10. Receiving
Supply Status Inputs Outputs
VDD1 V
DD2 A − B RE RxD
On On >−0.03 V L or NC H
On On <−0.2 V L or NC L
On On −0.2 V < A − B < −0.03 V L or NC I
On On Inputs open L or NC H
On On X H Z
On Off X L or NC H
Off Off X L or NC L
ADM2482E/ADM2487E
Rev. 0 | Page 14 of 20
THERMAL SHUTDOWN
The ADM2482E/ADM2487E contain thermal shutdown
circuitry that protects the part from excessive power dissipa-
tion during fault conditions. Shorting the driver outputs to a
low impedance source can result in high driver currents. The
thermal sensing circuitry detects the increase in die temperature
under this condition and disables the driver outputs. This
circuitry is designed to disable the driver outputs when a die
temperature of 150°C is reached. As the device cools, the drivers
are re-enabled at a temperature of 140°C.
TRUE FAIL-SAFE RECEIVER INPUTS
The receiver inputs have a true fail-safe feature that ensures
that the receiver output is high when the inputs are open or
shorted. During line-idle conditions, when no driver on the
bus is enabled, the voltage across a terminating resistance at
the receiver input decays to 0 V. With traditional transceivers,
receiver input thresholds specified between −200 mV and
+200 mV mean that external bias resistors are required on the
A and B pins to ensure that the receiver outputs are in a known
state. The true fail-safe receiver input feature eliminates the
need for bias resistors by specifying the receiver input threshold
between −30 mV and −200 mV. The guaranteed negative thre-
shold means that when the voltage between A and B decays to
0 V, the receiver output is guaranteed to be high.
MAGNETIC FIELD IMMUNITY
The limitation on the magnetic field immunity of the iCoupler
is set by the condition in which an induced voltage in the
receiving coil of the transformer is large enough to either
falsely set or reset the decoder. The following analysis defines
the conditions under which this may occur. The 3 V operating
condition of the ADM2482E/ADM2487E is examined because
it represents the most susceptible mode of operation.
The pulses at the transformer output have an amplitude greater
than 1 V. The decoder has a sensing threshold of about 0.5 V,
thus establishing a 0.5 V margin in which induced voltages can
be tolerated.
The voltage induced across the receiving coil is given by
Nnr
dt
dβ
Vn,,2,1;
2K=π
⎟
⎠
⎞
⎜
⎝
⎛−
=∑
where:
β is the magnetic flux density (gauss).
N is the number of turns in the receiving coil.
rn is the radius of the nth turn in the receiving coil (cm).
Given the geometry of the receiving coil and an imposed
requirement that the induced voltage is, at most, 50% of the
0.5 V margin at the decoder, a maximum allowable magnetic
field can be determined using Figure 31.
MAGNETIC FIELD FREQUENCY (Hz)
1k 10k 100k 100M1M 10M
100
10
1
0.1
0.01
0.001
MAXIMUM ALLOW ABLE MAG NETIC
FL UX DE NSIT Y ( kGAUSS)
07379-023
Figure 31. Maximum Allowable External Magnetic Flux Density
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 kgauss induces a
voltage of 0.25 V at the receiving coil. This is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event occurs during a transmitted pulse and
is the worst-case polarity, it reduces the received pulse from
>1.0 V to 0.75 V, still well above the 0.5 V sensing threshold
of the decoder.
Figure 32 shows the magnetic flux density values in terms of
more familiar quantities, such as maximum allowable current
flow at given distances away from the ADM2482E/ADM2487E
transformers.
MAGNETI C F I ELD FREQ UENCY (Hz)
1k 10k 100k 100M1M 10M
DISTANCE = 1m
DISTANCE = 100mm
DISTANCE = 5mm
1000
100
0.1
1
10
0.01
MAXIMUM ALLO WABLE CURRE NT (kA)
07379-024
Figure 32. Maximum Allowable Current for
Various Current-to-ADM2482E/ADM2487E Spacings
With combinations of strong magnetic field and high frequency,
any loops formed by PCB traces could induce error voltages
large enough to trigger the thresholds of succeeding circuitry.
Care should be taken in the layout of such traces to avoid this
possibility.
ADM2482E/ADM2487E
Rev. 0 | Page 15 of 20
APPLICATIONS INFORMATION
PRINTED CIRCUIT BOARD LAYOUT
The isolated RS-485 transceiver of the ADM2482E/ADM2487E
requires no external interface circuitry for the logic interfaces.
Power supply bypassing is required at the input and output supply
pins (see Figure 33).
Bypass capacitors are most conveniently connected between
Pin 3 and Pin 4 for VDD1 and between Pin 15 and Pin 16 for
VDD2. The capacitor value must be between 0.01 μF and 0.1 μF.
The total lead length between both ends of the capacitor and
the input power supply pin must not exceed 20 mm.
Bypassing Pin 9 and Pin 16 is also recommended unless the
ground pair on each package side is connected close to the
package.
D1
D2
GND
1
V
DD1
V
DD2
GND
2
A
B
RxD
RE
DE
Z
Y
NC
TxD GND
2
NC = NO CONNECT
07379-025
ADM2482E
OR
ADM2487E
TOP VIEW
(Not to Scale)
Figure 33. Recommended Printed Circuit Board Layout
In applications involving high common-mode transients, care
must be taken to ensure that board coupling across the isolation
barrier is minimized. Furthermore, the board layout must be
designed such that any coupling that does occur equally affects
all pins on a given component side.
Failure to ensure this can cause voltage differentials between
pins exceeding the absolute maximum ratings of the device,
thereby leading to latch-up or permanent damage.
ISOLATED POWER SUPPLY CIRCUIT
The ADM2482E/ADM2487E integrate a transformer driver
that, when used with an external transformer and linear voltage
regulator (LDO), generates an isolated 3.3 V power supply to be
supplied between VDD2 and GND2, as shown in Figure 34.
Pin D1 and Pin D2 of the ADM2482E/ADM2487E drive a
center-tapped Transformer T1. A pair of Schottky diodes and a
smoothing capacitor are used to create a rectified signal from the
secondary winding. The ADP1710 LDO provides a regulated
3.3 V power supply to the ADM2482E/ ADM2487E bus-side
circuitry (VDD2).
When the ADM2482E/ADM2487E are powered by 3.3 V on the
logic side, a step-up transformer is required to compensate for
the forward voltage drop of the Schottky diodes and the voltage
drop across the regulator. The transformer turns ratio should be
chosen to ensure just enough headroom for the ADP1710 LDO
to output a regulated 3.3 V output under all operating
conditions.
If the ADM2482E/ADM2487E are powered by 5 V on the
logic side, then a step-down transformer should be used.
For optimum efficiency, the transformer turns ratio should
be chosen to ensure just enough headroom for the ADP1710
LDO to output a regulated 3.3 V output under all operating
conditions.
07379-026
ADM2482E/
ADM2487E
ISO
L
A
TION
BARRIER
1N5817
1N5817
T1
22µF
V
CC
V
CC
10µF
MLC
V
DD1
V
DD2
D1 D2
GND
1
GND
2
100n
F
ISOLATED 3.3V
100nF
10µF
GND
3.3V
IN OUT
EN
LDO
ADP1710
Figure 34. Applications Diagram
ADM2482E/ADM2487E
Rev. 0 | Page 16 of 20
TYPICAL APPLICATIONS
Figure 35 and Figure 36 show typical applications of the
ADM2482E/ADM2487E in half-duplex and full-duplex
RS-485 network configurations. Up to 256 transceivers can
be connected to the RS-485 bus. To minimize reflections, the
line must be terminated at the receiving end in its characteristic
impedance, and stub lengths off the main line must be kept as
short as possible. For half-duplex operation, this means that both
ends of the line must be terminated, because either end can be
the receiving end.
07379-027
NOTES
1. R
T
IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE.
2. ISOLATION NOT SHOWN.
ABZYABZY
A
B
Z
Y
A
B
Z
Y
R
D
R
D
R
D
R
D
ADM2482E/
ADM2487E
ADM2482E/
ADM2487E
ADM2482E/
ADM2487E
RxD RE DE TxDRxD RE DE TxD
R
T
R
T
RxD
RE
DE
TxD
RxD
RE
DE
TxD
ADM2482E/
ADM2487E
MAXIMUM NUMBER OF TRANSCEIVERS ON BUS = 256
Figure 35. ADM2482E/ADM2487E Typical Half-Duplex RS-485 Network
NOTES
1. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE.
R
D
A
B
Z
Y
R
D
A B Z Y
R
D
A
B
Z
Y
R
D
A B Z Y
R
T
TxD
DE
RxD
RE
ADM2482E/
ADM2487E
ADM2482E/
ADM2487E
ADM2482E/
ADM2487E
SLAVE
RxD
RE
DE
TxD
ADM2482E/
ADM2487E
MASTER
SLAVESLAVE
RxD RE DE TxD
RxD RE DE TxD
R
T
07379-028
MAXIMUM NUMBER OF NODES = 256
Figure 36. ADM2482E/ADM2487E Typical Full-Duplex RS-485 Network
ADM2482E/ADM2487E
Rev. 0 | Page 17 of 20
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-013- AA
032707-B
10.50 (0.4134)
10.10 (0.3976)
0.30 (0.0118)
0.10 (0.0039)
2.65 (0.1043)
2.35 (0.0925)
10.65 (0.4193)
10.00 (0.3937)
7.60 (0.2992)
7.40 (0.2913)
0.75 (0.0295)
0.25 (0.0098)
45°
1.27 (0.0500)
0.40 (0.0157)
C
OPLANARITY
0.10 0.33 (0.0130)
0.20 (0.0079)
0.51 (0.0201)
0.31 (0.0122)
SEATING
PLANE
8°
0°
16 9
8
1
1.27 (0.0500)
BSC
Figure 37. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body
(RW-16)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model Data Rate (Mbps) Temperature Range Package Description Package Option
ADM2482EBRWZ116 −40°C to +85°C 16-Lead SOIC_W RW-16
ADM2482EBRWZ-REEL71
16 −40°C to +85°C 16-Lead SOIC_W RW-16
ADM2487EBRWZ1
0.5 −40°C to +85°C 16-Lead SOIC_W RW-16
ADM2487EBRWZ-REEL71
0.5 −40°C to +85°C 16-Lead SOIC_W RW-16
1 Z = RoHS Compliant Part.
ADM2482E/ADM2487E
Rev. 0 | Page 18 of 20
NOTES
ADM2482E/ADM2487E
Rev. 0 | Page 19 of 20
NOTES
ADM2482E/ADM2487E
Rev. 0 | Page 20 of 20
NOTES
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07379-0-5/08(0)