AUGUST 1999 - REVISED JANUARY 2007
TISP40xxL1AJ/BJ VLV Overvoltage Protectors
TISP4015L1AJ, TISP4030L1AJ, TISP4040L1AJ
TISP4015L1BJ, TISP4030L1BJ, TISP4040L1BJ
VERY LOW VOLTAGE
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
Device Symbol
Low Capacitance
‘4015 ...................................................................................28 pF
‘4030 ...................................................................................27 pF
‘4040 ...................................................................................23 pF
Digital Line Signal Level Protection
- ISDN
- xDSL
Safety Extra Low Voltage, SELV, values
SMA Package (Top View)
Description
These devices are designed to limit overvoltages on digital telecommunication lines. Overvoltages are normally caused by a.c. power system
or lightning flash disturbances which are induced or conducted on to the telephone line. A single device provides 2-point protection and is
typically used for the protection of transformer windings and low voltage electronics.
The protector consists of a symmetrical voltage-triggered bidirectional thyristor. Overvoltages are initially clipped by breakdown clamping until
the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on-state condition. This low-voltage on state
causes the current resulting from the overvoltage to be safely diverted through the device. The device switches off when the diverted current
falls below the holding current value.
How To Order
Device
VDRM
V
V(BO)
V
‘4015 ±8±15
‘4030 ±15 ±30
‘4040 ±25 ±40
30 A “L” Series specified for:
- ITU-T recommendations K.20, K.45, K.21
- FCC Part 68 and GR-1089-CORE
Wave Shape Standard
ITSP
A
2/10 μs GR-1089-CORE 150
8/20 μs IEC 61000-4-5 120
10/160 μs FCC Part 68 65
10/700 μsITU-T K.20/45/21
FCC Part 68 45
10/560 μs FCC Part 68 35
10/1000 μs GR-1089-CORE 30
Available in SMA and SMB Packages
SMA Saves 25 % Placement Area Over SMB
MDXXCCE
12)A( T)B( R
SMB Package (Top View)
T(A)R(B)
MDXXBGF
21
T
R
SD4XAA
Terminals T and R correspond to the
alternative line designators of A and B
............................................ UL Recognized Components
Device Package Carrier
TI SP40xxL1 SMA / DO -214AC J - B e nd (A J ) E m bo sse d T a pe R e e l e d
(R)
SMB / DO-214AA J - B e nd (B J )
TISP40xxL1AJR-S
TISP40xxL1BJR-S
I n sert x x val u e cor r e s p o nd i n g to p r otecti o n v o l t a g e s of 15 V , 30 V and 40 V.
Order As
*RoHS COMPLIANT
*RoHS Directive 2002/95/EC Jan. 27, 2003 including Annex.
Specifications are subject to change without notice. Users should verify actual device performance in their specific
applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the
last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
WARNING Cancer and Reproductive Harm
www.P65Warnings.ca.gov
TISP40xxL1AJ/BJ VLV Overvoltage Protectors
Absolute Maximum Ratings, TA = 25 °C (Unless Otherwise Noted)
tinUeulaVlobmySgnitaR
Repetitive peak off-state voltage
‘4015
‘4030
‘4040
VDRM
±8
±15
± 25
V
Non-repetitive peak on-state pulse current (see Notes 1 and 2)
ITSP A
2/10 μs (Telcordia GR-1089-CORE, 2/10 μs voltage wave shape)
8/20 μs (IEC 61000-4-5, combination wave generator, 1.2/50 voltage, 8/20 current)
10/160 μs (FCC Part 68, 10/160 μs voltage wave shape)
5/310 μs (ITU-T K.20/45/21, 10/700 μs voltage wave shape)
5/320 μs(FCC Part 68, 9/720μs voltage wave shape)
10/560 μs (FCC Part 68, 10/560 μs voltage wave shape)
10/1000 μs (Telcordia GR-1089-CORE, 10/1000 μs voltage wave shape)
±150
±120
±65
±45
±45
±35
±30
Non-repetitive peak on-state current (see Notes 1 and 2)
ITSM A
20 ms (50 Hz) full sine wave
16.7 ms (60 Hz) full sine wave
0.2 s 50 Hz/60 Hz a.c.
2 s 50 Hz/60 Hz a.c.
1000 s 50 Hz/60 Hz a.c.
20
22
13
5
1.8
/A031td/id)epahsevaw 01/2( tnerruc fo esir fo etar laitinI μs
Maximum junction temperature TJM 150 °C
Storage temperature range T
stg -65 to +150 °C
NOTES: 1. Initially, the device must be in thermal equilibrium with TJ=25°C.
2. The surge may be repeated after the device returns to its initial conditions.
Electrical Characteristics, TA = 25 °C (Unless Otherwise Noted)
tinUxaMpyTniMsnoitidnoC tseTretemaraP
IDRM
Repetitive peak off-
state current VD=V
DRM ±5μA
V(BO) Breakover voltage di/dt = ±0.8 A/ms
‘4015
‘4030
‘4040
±15
±30
±40
V
V(BO)
Impulse breakover
voltage
dv/dt =±1000 V/μs, Linear voltage ramp,
Maximum ramp value = ±500 V
di/dt = ±5A/μs, Linear current ramp,
Maximum ramp value = ±10 A
‘4015
‘4030
‘4040
±34
±50
±63
V
I(BO) Breakover current di/dt = ±0.8 A/ms ±0.8 A
IDOff-state current
VD=±6V
VD=±13 V
VD=±22 V
‘4015
‘4030
‘4040
±2μA
IHHolding current IT=±5A, di/dt=+/-30mA/ms ±50 mA
AUGUST 1999 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP40xxL1AJ/BJ VLV Overvoltage Protectors
Electrical Characteristics, TA = 25 °C (Unless Otherwise Noted) (Continued)
Coff Off-state capacitance
f=1MHz, V
d=1V rms, V
D=0
f=1MHz, V
d=1V rms, V
D=1V
f=1MHz, V
d=1V rms, V
D=2V
‘4015
‘4030
‘4040
‘4015
‘4030
‘4040
‘4015
‘4030
‘4040
28
27
23
25
24
20
23
22
18
36
35
29
33
31
26
30
29
24
pF
tinUxaMpyTniMsnoitidnoC tseTretemaraP
Thermal Characteristics
Min Typ Max Unit
RθJA Junction to free air thermal resistance
EIA/JESD51-3 PCB, IT = ITSM(1000), SMA
TA = 25 °C, (see Note 3) SMB
125
120 °C/W
265 mm x 210 mm populated line card, SMA
4-layer PCB, IT = ITSM(1000), TA = 25 °CSMB
60
55
NOTE 3: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
snoitidnoC tseTretemaraP
AUGUST 1999 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP40xxL1AJ/BJ VLV Overvoltage Protectors
Parameter Measurement Information
All Measurements are Referenced to the R Terminal
-v
VDRM
IDRM
VD
IH
ITSM
ITSP
V(BO)
I(BO)
ID
Quadrant I
I
Switching
Characteristic
+v
+i
V(BO)
I(BO)
VDRM
IDRM
VD
ID
IH
ITSM
ITSP
-i
Quadrant III
Switching
Characteristic PM4AC
AUGUST 1999 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP40xxL1AJ/BJ VLV Overvoltage Protectors
Typical Characteristics
Figure 2.
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
TA – Ambient Temperature – °C
050100150
ID – Off-State Current - nA
0.1
1
10
100
1000
10000 TC4LVC
'4015L1
'4030L1
'4040L1
Figure 3.
NORMALIZED BREAKOVER VOLTAGE
vs
JUNCTION TEMPERATURE
TJ - Junction Temperature - °C
-25 0 25 50 75 100 125 150
Normalized Breakover Voltage
0.95
1.00
1.05
1.10 TC4LVE
'4015L1
'4040L1
'4030L1
Figure 4.
ON-STATE CURRENT
vs
ON-STA TE VO LT AGE
VT – On-State Voltage – V
234561
IT – On-State Current – A
0.2
0.3
0.5
0.7
2
3
5
7
20
30
50
70
0.1
1
10
TC4LVB
Figure 5.
NORMALIZED HOLDING CURRENT
vs
JUNCTION TEMPERATURE
TJ - Junction Temperature - °C
-25 0 25 50 75 100 125 150
Normalized Holding Current
0.4
0.5
0.6
0.7
0.8
0.9
1.5
2.0
1.0
TC4LVD
AUGUST 1999 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP40xxL1AJ/BJ VLV Overvoltage Protectors
Typical Characteristics
Figure 6.
CAPACITANCE
vs
OFF-STATE VOLTAGE
V Off-state Voltage - V
D -
0.01 0.02 0.05 0.1 0.2 0.5 1 2 3 5 10 20 30
C Capacitance – pF
off –
15
20
30
10
TC4L1AA
'4040
'4030
TJ = 25 °C
Vd = 1 V
'4015
AUGUST 1999 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP40xxL1AJ/BJ VLV Overvoltage Protectors
Rating and Thermal Information
Figure 7.
NON-REPETITIVE PEAK ON-STATE CURRENT
vs
CURRENT DURATION
t - Current Duration - s
0.01 0.1 1 10 100 1000
ITSM(t) - Non-Repetitive Peak On-State Current - A
1.5
2
3
4
5
6
7
8
9
15
20
30
10
TI4MAI
VGEN = 600 Vrms, 50/60 Hz
RGEN = 1.4*VGEN/ITSM(t)
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA = 25 °C
Figure 8.
VDRM DERATING FACTOR
vs
MINIMUM AMBIENT TEMPERATURE
TAMIN - Minimum Ambient Temperature - °C
-35 -25 -15 -5 5 15 25-40 -30 -20 -10 0 10 20
Derating Factor
0.95
0.96
0.97
0.98
0.99
1.00 TI4LVA
'4015L1
'4030L1
'4040L1
AUGUST 1999 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
APPLICATIONS INFORMATION
TISP40xxL1AJ/BJ VLV Overvoltage Protectors
Transformer Protection
TISP® Device Voltage Selection
Normally, the working voltage value of the protector, VDRM, would be chosen to be just greater than the peak signal amplitude over the
equipment temperature range. This would give the lowest possible protection voltage, V(BO). This would minimize the peak voltage applied to
the transformer winding and increase the time to core saturation.
In high frequency circuits, there are two further considerations. Low voltage protectors have a higher capacitance than high voltage protectors.
The inductance of a transformer winding reduces considerably when the magnetic core material saturates. Saturation occurs when the
magnetizing current through the winding inductance exceeds a certain value. It should be noted that this is a different current to the
transformed current component from primary to secondary. The standard inductance-current relationship is:
where:
L
= unsaturated inductance value in H
di
= current change in A
dt
= time period in s for current change di
E
= winding voltage in V
Rearranging this equation and working large Δ changes to saturation gives the useful circuit relationship of:
A transformer winding volt-second value for saturation gives the designer an idea of circuit operation under overvoltage conditions. The
volt-second value is not normally quoted, but most manufacturers should provide it on request. A 50 Vμs winding will support rectangular
voltage pulses of 50 V for 1 μs, 25 V for 2 μs, 1 V for 50 μs and so on. Once the transformer saturates, primary to secondary coupling will be
lost and the winding resistance, RW, shunts the overvoltage protector, Th1 - see Figure 9. This saturated condition is a concern for long
duration impulses and a.c. fault conditions because the current capability of the winding wire may be exceeded. For example, if the on-state
voltage of the protector is 1 V and the winding resistance is 0.2 Ω, the winding would bypass a current of 1/0.2 = 5 A, even though the
protector was in the low voltage condition.
EL
di
dt
-----
–=
Ex xΔtLΔi=
(
(
Figure 9. Transformer Saturation
AI4XAO
Th1
T1
UNSATURATED L RW
Th1
T1
SATURATED
Figure 10 shows a generic protection arrangement. Resistors R1 and R2, together with the overcurrent protection, prevent excessive winding
current flow under a.c. conditions. Normally these resistors would only be needed for special cases, e.g. some T1/E1 designs. Alternatively, a
split winding could be used with a single resistor connecting the windings. This resistor could be by-passed by a small capacitor to reduce
signal attenuation.
Figure 10. Transformer Winding Protection
Th1 SIGNAL
T1
OVER-
CURRENT
PROTECT ION
LINE
R1
R2
AI4XAN
Overcurrent protection upstream from the overvoltage protector can be fuse, PTC or thick film resistor based. For very high frequency circuits,
fuse inductance due to spiral wound elements may need to be evaluated.
AUGUST 1999 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP40xxL1AJ/BJ VLV Overvoltage Protectors
TISP® Device Voltage Selection (Continued)
So a higher voltage protector might be chosen specifically to reduce the protector capacitive effects on the signal.
Low energy short duration spikes will be clipped by the protector. This will extend the spike duration and the data loss time. A higher protector
voltage will reduce the data loss time. Generally, this will not be a significant factor for inter-conductor protection.
However, clipping is significant for protection to ground, where there is continuous low-level a.c. common mode induction. In some cases the
induced a.c. voltage can be over 10 V. Repetitive clipping at the induced a.c. peaks by the protector would cause severe data corruption. The
expected a.c. voltage induced should be added to the maximum signal level for setting the protector VDRM value.
2-Wire Digital Systems
Typical systems using a single twisted pair connection are: Integrated Services Digital Network (ISDN) and Pair Gain.
Signal level protection at the transformer winding is given by protectors Th3 and Th5. Typically these could be TISP4015L1 type devices with a
15 V voltage protection level.
Two line protection circuits are given; one referenced to ground using Th1 and Th2 (left) and the other inter-wire using protector Th4 (right) - see
Figure 11. For ISDN circuits compliant to ETSI ETR 080:1993, ranges 1 and 2 can be protected by the following device types: TISP4095M3,
TISP4095H3, TISP3095H3 (combines Th1 and Th2) and TISP7095H3 (combines Th1, Th2 and Th4). Ranges 4 through 5 can be protected by:
TISP4145M3, TISP4145H3, TISP3145H3 (combines Th1 and Th2) and TISP7145H3 (combines Th1, Th2 and Th4). Device surge requirement, H
or M, will be set by the overcurrent protection components and the standards complied with. Protection of just the d.c. feed to ETSI ranges is
covered in the TISP5xxxH3 data sheet.
When loop test voltages exceed the normal d.c. feed levels, higher voltage protectors need to be selected. For two terminal protectors, for
levels up to 190 V (135 V rms) the TISP4250, H3 or M3, can be used and for 210 V (150 V rms) the TISP4290, H3 or M3, can be used.
In Pair Gain systems, the protector VDRM is normally set by the d.c. feed value. The following series of devices have a 160 V working voltage at
25 °C: TISP4220M3, TISP4220H3, TISP3210H3 (combines Th1 and Th2) and TISP7210H3 (combines Th1, Th2 and Th4). These devices can be
used on 150 V d.c. feed voltages down to an ambient temperature of -25 °C. Where the subscriber equipment may be exposed to POTS (Plain
Old Telephone Service) voltage levels, protector Th4 needs a higher working voltage of about 275 V. Suitable device types are: TISP4350M3,
TISP4350H3, TISP3350H3 (combines Th1 and Th2) and TISP7350H3 (combines Th1, Th2 and Th4).
The overcurrent protection for the overvoltage protector can be fuse, PTC or thick film resistor based. Its a.c. limiting capability should be less
than the ratings of the intended overvoltage protector. Equipment complying with the year 2000 international K.20, K.21 and K.45
recommendations from the ITU-T, may be required to demonstrate protection coordination with the intended primary protector. Without adding
series resistance, a simple series fuse overcurrent protection is likely to fail the equipment for this part of the recommendation.
If the d.c. feed consists of equal magnitude positive and negative voltage supplies, appropriately connected TISP5xxxH3 unidirectional
protectors could replace Th1 and Th2.
4-Wire Digital Systems
Figure 11. 2-Wire System
AI4XAL
SIGNAL
TRANSFORMER COUPLED TWO-WIRE INTERFACE DC SUPPLY
Th5
Th4 C2
T2
OVER-
CURRENT
PROTECTION
LINE
Th1
Th2
Th3
OVER-
CURRENT
PROTECTION
DC FEED
SIGNAL
C1
T1
A typical system using a two twisted pair connection is the High-bit-rate Digital Subscriber Line (HDSL) and the “S” interface of ISDN.
Figure 12 shows a generic two line system. HDSL tends to have ground referenced protection at both ends of the lines (Th1, Th2, Th3 and Th4).
The ISDN “S” interface is often inside the premises and simple inter-wire protection is used at the terminating adaptor (Th7 and Th8). In all
cases, signal protection, Th5, Th6, Th9 and Th10, can be TISP4015L1 type devices with a 15 V voltage protection level.
AUGUST 1999 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP40xxL1AJ/BJ VLV Overvoltage Protectors
4-Wire Digital Systems (Continued)
Figure 12. 4-Wire System
AI4XAM
DC FEED
Th9
SIGNAL
Th10
SIGNAL
TRANSFORMER COUPLED FOUR-WIRE INTERFACE
Th7
Th8
T3
T4
OVER-
CURRENT
PROTECTION
OVER-
CURRENT
PROTECTION
LINE 1
LINE 2
OVER-
CURRENT
PROTECTION
OVER-
CURRENT
PROTECTION
Th5
Th6
Th1
Th2
Th3
Th4
DC SUPPLY
SIGNAL
SIGNAL
T1
T2
For an HDSL d.c. feed voltage of 180 V or less and operation down to an ambient of -25 °C, the following Th1, Th2, Th3 and Th4 protectors
are suitable: TISP4250M3 or TISP4250H3, TISP3250H3 (combines Th1 and Th2 or Th3 and Th4) and TISP7250H3 (combines Th1, Th2 and
Th7 or Th3, Th4 and Th8). Possible overcurrent protection components are covered in the 2-wire digital systems clause.
For ISDN interfaces powered with ±40 V (ETSI, ETS 300 012 1992) the following Th1, Th2, Th3 and Th4 protectors are suitable: TISP4070M3
or TISP4070H3 or TISP4070L3, TISP3070F3 or TISP3070H3 (combines Th1 and Th2 or Th3 and Th4) and TISP7070F3 or TISP7070H3
(combines Th1, Th2 and Th7 or Th3, Th4 and Th8). At the terminating adaptor, the Th7 and Th8 protectors do not “see” the d.c. feed voltage
and should be selected to not clip the maximum signal level. Generally, the TISP40xxL1 series will be suitable.
Internal ISDN lines are not exposed to high stress levels and the chances of a.c. power intrusion are low (ETSI EN 300 386-2 1997).
Accordingly, the equipment port protection needs are at a lower level than ports connected to outside lines.
Home Phone Networking
Using the existing house telephone wiring, home phone networking systems place the local network traffic in a high band above the POTS and
ADSL (Asymmetrical Digital Subscriber Line) spectrum. Local network rates are 1 Mbps or more. To reject noise and harmonics, an in-line
protection and 5 MHz to 10 MHz bandpass filter module is used for the equipment. These modules are available from magnetic component
manufacturers (e.g. Bel Fuse Inc.) A typical circuit for the telephone line magnetics module is shown in Figure 13. Transformer T1 isolates the
equipment from the house wiring. The isolated winding output is voltage limited by a very low-voltage protector, Th1. With a differential voltage
of about 12 V peak to peak, the TISP4015L1 could be used for Th1. After filtering, connection is made to the differential transceiver of the
processing IC.
Figure 13. Home Phone Networking Isolation/filter/protection Circuit
AI4XAP
Th1
FILTER
C1
T1 TIP
RING
PROTECTION
HRTRX+
HRTRX-
AUGUST 1999 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
MECHANICAL DATA
TISP40xxL1AJ/BJ VLV Overvoltage Protectors
Recommended Printed Wiring Land Pattern Dimensions
Device Symbolization Code
Devices will be coded as below. As the device parameters are symmetrical, terminal 1 is not identified.
Carrier Information
For production quantities, the carrier will be embossed tape reel pack. Evaluation quantities may be shipped in bulk pack or embossed tape.
SMA Land Pattern
MDXX BIC
2.34
(.092)
1.90
(.075)
2.16
(.085)
DIMENSIONS ARE: MILLIMETERS
(INCHES)
SMB Land Pattern
MDXX BIB
2.54
(.100)
2.40
(.095)
2.16
(.085)
DIMENSIONS ARE: MILLIMETERS
(INCHES)
Device Symbolization
Code Device Symbolization
Code
TISP4015L1AJ 4015L TISP4015L1BJ 4015L1
TISP4030L1AJ 4030L TISP4030L1BJ 4030L1
TISP4040L1AJ 4040L TISP4040L1BJ 4040L1
Package Carrier Standard Quantity
SMA Embossed Tape Reel Pack 5 000
3BMS 000
“TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office.
“Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries.
AUGUST 1999 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
Legal Disclaimer Notice
This legal disclaimer applies to purchasers and users of Bourns® products manufactured by or on behalf of Bourns, Inc. and
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Unless otherwise expressly indicated in writing, Bourns® products and data sheets relating thereto are subject to change
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and complete before placing orders for Bourns® products.
The characteristics and parameters of a Bourns® product set forth in its data sheet are based on laboratory conditions, and
statements regarding the suitability of products for certain types of applications are based on Bourns’ knowledge of typical
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the user’s sole risk.
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Users shall not sell, transfer, export or re-export any Bourns®WYVK\J[ZVY[LJOUVSVN`MVY\ZLPUHJ[P]P[PLZ^OPJOPU]VS]L[OL
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