NAPC/PHILIPS SEMICOND BLE D MM 66535924 0073487 OTT MHSIC3 Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD303 T-49-(F-63 J 1M bit of UV EPROM Contigurable as 128K x 8 or as 64K x 16 Divides into 8 equal mappable blocks Key Features Q Single Chip Programmable Peripheral for Microcontroller-based Applications May, 1993 19 Individually Configurable 1/O pins that can be used as: Microcontroller /O port expansion Programmable Address Decoder (PAD) /O Latched address output Open drain or CMOS (J Two Programmable Arrays (PAD A & PAD B) Total of 40 Product Terms and up to 16 Inputs and 24 Outputs Direct Address Decoding up to 1 Meg address space and up to 16 Meg with paging Logic replacement QQ No Glue Microcontroller Chip-Set Built-in address latches for multiplexed address/data bus Non-multiplexed address/data bus mode Selectable 8 or 16 bit data bus width ALE and Reset polarity programmable Selectable modes for read_and write control bus as RD/WR, R/W/E, or R/W/DS BHE pin for byte select in 16-bit mode PSEN pin for 8051 users QO Built-In Page Logic To Expand the Address Space of Microcontrollers with Limited Address Space Capabilities Up to 16 pages 113 for optimized mapping Block resolution is 16K x 8 or 8K x 16 120 ns EPROM access time, including input latches and PAD address decoding. 16 Kbit Static RAM Configurable as 2K x 8 or as 1K x 16 120 ns SRAM access time, including input latches and PAD address decoding Address/Data Track Mode Enables easy Interface to Shared Resources (e.g., Mail Box SRAM) with other Microcontrollers or a Host Processor Built-In Security Locks the PSD303 and PAD Decoding Configuration Available in a Choice of Packages 44 Pin PLCC and CLCC Simple Menu-Driven Software: Configure the PSD303 on an IBM PC Pin and Function Compatible with the PSD301 and PSD302NAPC/PHILIPS SEMICOND Philips Semiconductors Microcontroller Peripherals Field-programmable microcontroller peripheral BLE D MM 6653924 0071444 T3b MBSIC3 Preliminary specification PSD303 Security Security Mode in the PSD3XxX locks the software. In window packages, the mode is Mode contents of the PAD A , PAD B and all the erasable through UV full part erasure. in configuration bits. The EPROM, SRAM, the security mode, the PSD3XX contents and !/O contents can be accessed only cannot be copied on a programmer. through the PAD. The Security Mode can be set by the MAPLE or Programming CMiser-Bit The CMiser-Bit provides a programmable in the default mode, or if the PSD3XxX is option for power-sensitive applications that configured without programming the require further reduction in power CMiser-Bit (CMiser = 0), the device consumption. The CMiser-Bit (CMiser = 1) operates at specified speed and power in the Maple portion of the PSD3XX sytem rating as specified in the A.C. and D.C. development software can be used to Characteristics. fone of tne eoroM on. inthe PSnoeN However, if the CMiser-Bit is programmed whenever the EPROM is not accessed, (CMiser = 1), the device consumes even . : lower current, and is reflected in the data thereby reducing the active current heet. Thi h dder i consumed by the PSD3XX. sheet. This mode has an adder in propagation delay in T5, T6, and T7 parameters in the A.C. Characteristics, and should be added to compute worst-case timing requirements in the application. Absolute Symbol! Parameter Condition Min | Max | Unit Maximum = rs Ratings T. Storage Temperature CERDIP 6 + 150 C gs sta 9 temp PLASTIC 65 | +125] Voltage on any Pin With Respect to GND | -0.6 +7 Vv Programming - Vpp Supply Voltage With Respect to GND | -0.6 +14 V Voc Supply Voltage With Respect to GND {| -0.6 +7 Vv ESD Protection >2000 Vv NOTE: 1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at theses or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods of time may affect device reliability. Operating Vec Tolerance Range Range Temperature Vec oe -12 15 -20 Commercial 0 C to +70C +5V + 10% +10% +10% Industrial ~40 C to +80C +5V +10% | +10% Military ~55 C to +125C +5V +10% Recommended Symbol Parameter Conditions | Min | Typ | Max | Unit Conditions Voc Supply Voltage All Speeds 45 5 55 Vv Vin High-level Input Voltage | Veo =4.5Vto5.5V 2 Vv Vin Low-level Input Voltage | Vcc =4.5Vto5.5V 0 0.8 Vv May, 1993 114NAPC/PHILIPS SEMICOND Philips Semiconductors Microcontroller Peripherals b1E D MM 6653924 00714669 9?2 MBSIC3 Preliminary specification Field-programmable microcontroller peripheral PSD303 DEC CMiser =1 Characteristics | symboi| Parameter _| Conditions Subtract: Min | Typ | Max| Min| Typ | Max | Unit lo, = 20 pA 0.01} 0.1 V Voi Output Low Veco =45V Voltage lo. = 8 MA Veo =4.5V 0.15 | 0.45 Vv lon = -20 HA 4.4 | 4.49 V Vou Output High Veco =4.5V Voltage lou = -2 mA Veo=45V 2.4 | 3.9 Vv Voc Standby Comm'l 50 | 100 pA Isp Current (CMOS) - (Notes 2 and 4) Ind/Mil 75 | 150 nA Comm! (Note 6) 16 | 35 7 10 | mA Active Current Comm' (CMOS) (No | (Note 7) 28 | 90 7 | 10 | mA Ice internal Memory indi Block Selected) (Note 6) 16 | 45 7 | 10 | ma (Notes 2 and 5) Ind/Mil (Note 7) 28 |} 60 7 10 | mA Comm' (Note 6) 16 | 35 0 0 | mA Active Current Comm 28 | 50 0 0 |mA loco | (CMOS) (EPROM (Note 7) Block Selected) Ind/Mil (Notes 2 and 5) | (Note 6) 16 | 45 o | 0 {mA ind/Mil (Note 7) 28 | 60 0 0 | mA Comm (Note 6) 47 | 80 7 10 | mA Active Current Comm'l 59 95 7 10 mA loos (CMOS) (SRAM _ | (Note 7) Block Selected Ind/Mil (Notes 2 and 5) (Note 6) 47 | 100 7 10 | mA Ind/Mil (Note 7) 59 | 115 7 10 } mA | Input Leakage Vin=5.5V _ ul Current or GND 1 74+0.14] 1 pA | Output Leakage Vout =5.5V] _ Re) Current or GND 10} +5 | 10 pA NOTES: 2. CMOS inputs: GND + 0.3 V or Voc + 0.3V. 3. TTL inputs: Vy < 0.8 V, Vin > 2.0 V. 4. CSI/A19 is high and the part is in a pawer-down configuration mode. 5. Add 3.0 mA/MHz for AC power component (power = AC + DC). 6. Ten (10) PAD product terms active. (Add 380 1A per product term, typical, or 480 pA per product term maximum 7. Forty-one (41) PAD product terms active. May, 1993 115NAPC/PHILIPS SEMICOND bLE D MM 66535924 0071890 694 MESIC3 Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD303 AC Characteristics -90 12 15 -20 . Symbol Parameter - - - - CMiser=1) ynie Min | Max | Min | Max | Min | Max | Min | Max| Add: T1 ALE or AS Pulse Width 20 30 40 50 0 ns T2 Address Set-up Time 5 9 12 15 0 ns T3 Address Hold Time 8 9 12 15 0 ns Leading Edge of Read 4 to Data Active 9 0 0 0 0 ns T5 ALE Valid to Data Valid 100 130 160 200 10 ns T6 Address Valid to Data Valid 90 120 150 200 10 ns T7 | CSI Active to Data Valid 100 130 160 200 15 ns Leading Edge of Read T8 to Data Valid 32 38 55 60 0 ns T9 Read Data Hold Time 0 0 0 0 0 ns T10 Trailing Edge of Read to Data High-2Z 32 32 35 40 0 ns T11 Trailing Edge of ALE or AS to Leading Edge of Write 0 0 0 0 0 ns RD, E, PSEN, or DS T12 Pulse Width 40 45 60 75 0 ns T12A | WR Pulse Width 20 25 35 45 0 ns Trailing Edge of Write or T13 Read to Leading Edge 0 0 0 0 0 ns of ALE or AS Address Valid to Trailing 114 Edge of Write 90 120 150 200 0 ns CSI Active to Trailing Edge T15 of Write 100 130 160 200 0 ns T16 Write Data Set-up Time 20 25 30 40 0 ns T17 Write Data Hold Time 5 5 10 15 0 ns Port to Data Out Valid T18 Propagation Delay 30 30 35 45 0 ns T19 Port Input Hold Time 0 0 0 0 0 ns Trailing Edge of Write T20 | to Port Output Valid 40 40 50 60 0 ns T21_ | ADior Control to CSOi 6 | 25] 61]30]/ 6]a5] 5 | 45 0 ns Valid ADi or Control to CSOi T22 Invalid 5 25 5 30 4 35 4 45 0 ns May, 1993 116NAPC/PHILIPS SEMICOND bLE D MM 6653924 0071891 520 MBSICS Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD303 A Characteristics (ont.) -90 12 15 20 . Symbol Parameter - - - - CMiser=1) ynit Min | Max | Min | Max| Min | Max| Min | Max| Add: Track Mode Address T23 Propagation Delay: 22 22 28 28 0 ns CSADOUT1 Already True Track Mode Address Propagation Delay: T23A CSADOUT1 Becomes 33 33 50 50 0 ns True During ALE or AS Track Mode Trailing Edge T24 of ALE or AS to Address 32 32 35 40 0 ns High-Z Track Mode Read T25 Propagation Delay 29 29 35 35 0 ns Track Mode Read T26 Hold Time 11 29 11 29 10 29 10 35 0 ns Track Mode Write Cycle, 127 Data Propagation Delay 20 20 30 30 0 ns Track Mode Write T28 Cycle, Write to Data 8 30 8 30 7 40 7 55 0 ns Propagation Delay Hold Time of Port A T29 Valid During Write 2 2 2 2 0 ns CSOi Trailing Edge 130 | CSiActiveto CSOi Active | 9 | 40 | 9 | 45 | 9 | 50] 8 | 60 0 ns CSI Inactive to CSOi T31 Inactive 9 40 9 45 9 50 8 60 0 ns Direct PAD Input as T32 Hold Time 10 10 12 15 0 ns T33 | R/W Active to Eor DS Start | 20 20 30 40 0 ns 134 | EorDS Endto RW 20 20 30 40 0 ns T35 AS Inactive to E high 0 0 0 0 0 ns Address to Leading T36 Edge of Write 20 20 25 30 0 ns NOTES: 8. ADi = any address line. 9. CSOi = any of the chip-select output signals coming through Port B (CS0-CS7) or through Port C (CS8-CS10). 10. Direct PAD input = any of the following direct PAD input lines: GSV/A19 as transparent A19, RDVE/DS, WR or P/ RW, transparent PCO-PC2, ALE (or AS). 11. Control signals RD/E/DS or WR or RW. May, 1993 117NAPC/PHILIPS SEMICOND BLE D MM 6653924 007389e 4b? MBSICS Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD303 Figure 1. Timing of 8-Bit Multiplexed Address/DataBus, CRRWR = 0 READ CYCLE WRITE CYCLE _ 32 CSI/A19 as CSI 15 32 STABLE INPUT STABLE INPUT 6 14 Direct (12) PAD Input Multiplexed (13) Inputs 10 14 A0/ADO- A7/AD7 ADDRESS A DATA VALID ADDRESS B 2 3 9 3 Active High ALE Active Low ALE RD/E/DS as RD BHE/PSEN as PSEN WAWpp or RW as WR Any of PAO-PA7 as /O Pin Any of PBO-PB7 OUTPUT as 0 Pin Any of PAO-PA7 Pins as Address Outputs ADDRESS A ADORESS B See referenced notes on page 128. May, 1993 118NAPC/PHILIPS SEMICOND BIE D MM 6653924 0071893 373 M@BSICI Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD303 Figure 2. Timing of 8-Bit Multiplexed Address/DataBus, CRAWR = 1 READ CYCLE WRITE CYCLE = 32 CSVA19 as CSI 15 32 Direct (12) PAD Input STABLE INPUT STABLE INPUT 6 14 Multiplexed (13) Inputs 10 14 AO/ADO- A7/AD7 ADDRESS A DATA VALID ADDRESS B 2 3 9 3 Active High AS Active Low AS RD/E/DS as E RO/E/DS as DS WR/Vpp or RW as R/W Any of PAO-PA7 OUTPUT as VO Pin Any of PBO-PB7 OUTPUT as VO Pin Any of PAO-PA7 Pins as Address Outputs ADDRESS A ADDRESS 8B See referenced notes on page 128. May, 1993 119NAPC/PHILIPS SEMICOND Philips Semiconductors Microcontroller Peripherals bLE D MM 6653924 0071894 237 MESICS Preliminary specification Field-programmable microcontroller peripheral PSD303 Figure 3. Timing of 16-Bit Multiplexed Address/DataBus, CRRWR = 0 CSVAI9 as CSI Direct (12) PAD Input Multiplexed (13) Inputs BHE/PSEN as BHE AO/ADO- A1S/AD15 ADDRESS A 2 3 Active High ALE Active Low ALE RD/E/DS as RD WR pp_or RW as WR Any of PAO-PA7 as VO Pin Any of PBO-PB7 as I/O Pin Any of PAO-PA? Pins as Address Outputs See referenced notes on page 128. May, 1993 6 READ CYCLE STABLE INPUT ADDRESS A DATA VALID 9 120 WRITE CYCLE 32 1 32 STABLE INPUT 14 ADDRESS B 3 OUTPUT OUTPUT ADDRESS BNAPC/PHILIPS SEMICOND b1E D MM 6653924 0071895 176 MBSIC3 Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD303 Figure 4. Timing of 16-Bit Multiplexed Address/DataBus, CRRWR = 1 READ CYCLE WRITE CYCLE 32 CSIAI9 as CSI 15 32 i 12 PAD Input ) STABLE INPUT STABLE INPUT 6 14 Multiplexed (13) Inputs BHE/PSEN as BHE AQADO- AIS/AD15 ADDRESS A DATA VALID ADDRESS B 2 3 9 3 Active High AS Active Low AS RAD/E/DS as E RD/E/DS as DS WRN pp or RW as B/W Any of PAQ-PA7 as VO Pin Any of PBO-PB7 as VO Pin Any of PAO-PA7 Pins ADDRESS A ADDRESS B as Address Outputs See referenced notes on page 128. May, 1993 121NAPC/PHILIPS SEMICOND BLE D MM 6653524 0071896 O02 MSIC3 Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD303 Figure 5. Timing of 8-Bit Data, Non-Multiplexed Address/DataBus, CRRWR = 0 READ CYCLE WRITE CYCLE 32 CSi/AI9 as CSI Direct (12) PAD Input STABLE INPUT STABLE INPUT 6 14 A0/ADO- A15/AD15 STABLE INPUT STABLE INPUT as AO-A15 32 Muitiplexed (+3) Inputs 10 PAO-PA7 DATA VALID 9 Active High ALE Active Low ALE RD/E/DS as RD WRVpp_or R/W as WR Any of PBO-PB7 as VO Pin See referenced notes on page 128. May, 1993 122NAPC/PHILIPS SEMICOND b1E D MW 66535924 007189? T4H9 MESIC3 Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD303 Figure 6. Timing of 8-Bit Data, Non-Multiplexed Address/DataBus, CRRWR =1 READ CYCLE WRITE CYCLE 32 CSVVAI9 as CSI i 12) PAD West 2) STABLE INPUT STABLE INPUT 6 14 A0/ADO- A15/AD15 STABLE INPUT STABLE INPUT as AO-A15 32 Multiplexed (15) Inputs 10 PAO-PA7 DATA VALID 9 Active High ALE Active Low ALE RO/E/DS as E RD/E/DS as DS WAMpp or RAW as RAW Any of PBO-PB7 as I/O Pin See referenced notes on page 128. May, 1993 123NAPC/PHILIPS SEMICOND bbE D MM 6653924 0071898 985 MBSIC3 Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD303 Figure 7. Timing of 16-Bit Non-Multiplexed Address/DataBus, CRAWR = 0 READ CYCLE WRITE CYCLE 32 CSVA19 as CSI Direct (12) PAD Input STABLE INPUT STABLE INPUT 6 14 AO/ADO- A1S/AD15 STABLE INPUT STABLE INPUT as AQ-A15 32 Multiplexed (13) Inputs BHE/PSEN as BHE PAO-PA7 DATA VALID (Low Byte) PBO-PB7 DATA VALID High Byte (High Byte) 9 10 Active High ALE Active Low ALE RD/E/DS as RD WRN pp or_ RW as WR See referenced notes on page 128. May, 1993 124NAPC/PHILIPS SEMICOND bLE D MM 6653924 0071899 811 MBSIC3 Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD303 Figure 8. Timing of 16-Bit Non-Multiplexed Address/DataBus, CRRWR=1 READ CYCLE WRITE CYCLE 32 CSVA19 as CSI Direct (12) PAD Input STABLE INPUT STABLE INPUT 6 14 AO/ADO- A15/AD15 STABLE INPUT STABLE INPUT as A0-A15 32 Multiplexed (13) Inputs BHE/PSEN as BHE PAO-PA7 (Low Byte) DATA VALID 9 PBO-PB7 (High Byte) DATA VALID 10 Active High AS Active Low RD/E/DS as E RDVE/DS as DS WAWVpp oF RW as R/W See referenced notes on page 128. May, 1993 125NAPC/PHILIPS SEMICOND bLE D MM 6653524 0071900 363 MESIC3 rnuips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD303 Figure 9. Chip-Select Output Timing 30 31 csiarg ~\ / as CS| \. Direct PAD '2) x Input , INPUT STABLE = Multiplexed (18 PAD Inputs xX RXXXX 2 3 _ ALE | - (Multiplexed AT,\ Mode Only) <-1$_ orALE \ y (Multiplexed NIA Mode Only} 21 22 at > +P GSOr (14.19) ~\ fy AY See referenced notes on page 128. May, 1993 126NAPC/PHILIPS SEMICOND L1E DD @ Philips Semiconductors Microcontroller Peripherals Field-programmable microcontroller peripheral 6653924 0071901 2TT MBSICS Preliminary specification PSD303 Figure 10. Port A as ADO-AD7 Timing (Track Mode), CRRWR = 0 READ CYCLE Direct PAD Input (12,15) STABLE INPUT 2 Multiplexed PAD Inputs (16,18) STABLE INPUT 2 3 26 Ao/ADO- ATIAD7 ADDRESS DATA VALID ALE or ALE RD/E/DS as RD WAVep oF RW as WR PAO-PA7 ADR OUT DATA IN csoi (14,17) See referenced notes on page 128. May, 1993 127 WRITE CYCLE STABLE INPUT STABLE INPUT 3 ADDRESS WRITTEN 32 24 ADR OUTNAPC/PHILIPS SEMICOND Phitips Semiconductors Microcontroller Peripherals Field-programmable microcontroller peripheral bLE BD MM 66539924 0071902 136 MESIC3 Preliminary specification PSD303 Figure 11. Port A as ADO-AD7 Timing (Track Mode), CRRWR = 1 Direct PAD Input (12,15) Multiplexed PAD Inputs (16,18) AO/ADO- A7/AD7 AS or AS READ CYCLE WRITE CYCLE STABLE INPUT STABLE INPUT STABLE INPUT STABLE INPUT 2 3 26 3 ADDRESS DATA VALID ADDRESS RD/E/DS as E ROvE/DS as BS WRWpp or RW as R/W 24 PAO-PA7 DATA IN ADR OUT CSOi (14,17) Notes for 12. Direct PAD input = any of the following direct PAD input lines: CSI/A19 as transparent A19, Timing RD/e, WR or RAW, transparent PCO-PC2, ALE in non-multiplexed modes. 13, Multiplexed inputs: any of the following inputs that are latched by the ALE (or AS): Diagrams AQ/ADO-A15/AD15, GSI/A19 as ALE dependent A19, ALE dependent PCO-PC2. May, 1993 14, CSOi = any of the chip-select output signals coming through Port B (GS0-CS7) or through Port C (CS8-CS10). 15. GSADOUT1, which internally enables the address transfer to Port A, should be derived only from direct PAD input signals, otherwise the address propagation delay is slowed down. 16. CSADIN and CSADOUT2, which internally enable the data-in or data-out transfers, respectively, can be derived from any combination of direct PAD inputs and multiplexed PAD inputs. 17. The write operation signals are included in the CSOi expression. 18, Multiplexed PAD inputs: any of the following PAD inputs that are latched by the ALE (or AS) in the multiplexed modes: A11/AD11-A15/AD15, GSVA19 as ALE dependent A19, ALE dependent PCO-PC2. 19. CSOi product terms can include any of the PAD input signals except for reset and CSI. 128NAPC/PHILIPS SEMICOND Philips Semiconductors Microcontroller Peripherals blE D M@ 6653924 0071903 O?e MASICS Preliminary specification Field-programmable microcontroller peripheral PSD303 Pin 29 ~| Symbol Parameter Conditions | Typical*' | Max | Unit Capacitance . . Cw Capacitance (for input pins only) Vin= OV 4 6 pF Cour | Capacitance (for input/output pins) Vout =0V 8 12 pF Cypp | Capacitance (for WR/Vpp or R/W/Vpp)} Vpp =0V 18 25 pF NOTES: 20. This paramter is only sampled and is not 100% tested. 21. Typical values are for Ts = 25C and nominal supply voltages. Figure 12. AC Testing Input/Output 30V Waveform x , ( TEST POINT = 1.5V OV Figure 13. DO1V AC Testing Load Circuit 195 2 DEVICE UNDER TEST C,=30 pF (INCLUDING mie SCOPE AND JIG > CAPACITANCE) Erasure and To clear ail locations of their programmed sources at 2537 A, exposure to fluorescent Programming contents, expose the device to ultra-violet light and sunlight eventually erases the May, 1993 light source. A dosage of 15 W second/cm? is required. This dosage can be obtained with exposure to a wavelength of 2537 A and intensity of 12000 uW/cm? for 15 to 20 minutes. The device should be about 1 inch from the source, and ail filters should be removed from the UV light source prior to erasure. The PSD3XxX and similar devices will erase with light sources having wavelengths shorter than 4000 A. Although the erasure times will be much longer than with UV 129 device. For maximum system reliability, these sources should be avoided. If used in such an environment, the package windows should be covered by an opaque substance. Upon delivery from WSI, or after each erasure, the PSD3XX device has all bits in the PAD and EPROM in the 1 or high state. The configuration bits are in the 0 or low state. The code, configuration, and PAD MAP data are loaded through the procedure of programming.NAPC/PHILIPS SEMICOND bLE D MM 6653924 0071904 TOD MBSICS3 Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD303 Pin 44-Pin Assignments Pin Name PLOC/CLEC Package BHE/PSEN 1 WR/Vpp or R/W 2 RESET 3 PB7 4 PB6 5 PBS 6 PB4 7 PB3 8 PB2 9 PB1 10 PBO 1 GND 12 ALE or AS 13 PA7 14 PAG 15 PAS 16 PA4 17 PA3 18 PA2 19 PA1 20 PAO 21 RD/E/DS 22 ADO/AO 23 AD1/A1 24 AD2/A2 25 AD3/A3 26 AD4/A4 27 ADS/A5 28 AD6/AG 29 AD7/A7 30 AD&/A8 31 AD9/A9 32 AD10/A10 33 GND 34 AD11/A11 35 AD12/A12 36 AD13/A13 37 AD14/A14 38 AD15/A15 39 PCO 40 PC1 41 PC2 42 A1g/CSI 43 Veco 44 May, 1993 130NAPC/PHILIPS SEMICOND b1E D WM 6653924 0073905 945 MBSICI Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD303 Package Information z - - ie B Ww aNr QQ Devity 4 ggg eg S228 aries 44 Pin Ceramic SRR aA | Leaded Chip ons 71 (tt LELPLP LPL UELE UE th ao aptwats | Carrier (cLCC) PB3 8 ft -- at 38 AD/14/A14 | with Window PB2 9 coe 0 37 AD13/A13 : (Package Type L) pat 10 973 SU 36 AD12/A12 PBO 11 : iD 35 ADVAN eno: te Da 34 GND | ALE or AS 13 (7 7) 33 AD10/A10 PA7 14 (0: OUT] 32 ADOvAS | PAG 15 [T7773 CH) 31 ADsv/As | PAS 16 77; i) 30 AD7/A7 ) PA4 17 (17 777] 29 ADG/AG S22RaRRSRRRR G2aegBezeztVzs2 aeoagssassa (TOP VIEW) iS e2:2ee8 Figure 2. ; Drawing J2 z . 44 Pin Plastic - a 2B Leaded Chip ~ eo 2m of8%58 w oe ge Oo Carrler (PLCC) BSE PE 25 ges with Window aA a ~ a (Package Type J) LELELELELEEELELEGE GELS papa 7 OG C777 39 ADI5S/A15 Pes 8 Qt MU 390 aD14/A14 pp2 9 UP: 70 37 AD13/A13 pat 10 OP: "0 36 AD12/A12 Ppo 14 (3 rc] 35 ADIV/A11 @np 12 (4 70 34 GND ALEor AS 13 (020i 33 AD10/A10 Pa? 14 (ET 32 ADO/A9 Paes 15 ("i 31 AD8/A8 PAS 16 U3 30 AD7/A7 PAs a7 ED 29 ADG/AG 5 222282292222 (TOP VIEW) errr egadssad @a<aacce May, 1993 131NAPC/PHILIPS SEMICOND bLE D MM 6653924 OO7L90b 881 MESIC3 Philips Semiconductors Microcontroller Peripherals Preliminary specification Field-programmable microcontroller peripheral PSD303 Ordering Operatin 7 Information Part Number ist ond traning Temperature Manotscturing Range Procedure PSD303-90 A 90 44-pin PLCC J2 Commercial Standard PSD303-90 KA 90 44-pin CLCC L4 Commercial Standard PSD303-12 A 120 44-pin PLCC J2 Commercial Standard PSD303-12 KA | 120 44-pin CLCC L4 Commercial Standard PSD303-15 A 150 44-pin PLCC J2 Commercial Standard PSD303-151 A 150 44-pin PLCC J2 Industrial Standard PSD303-15KA 150 44-pin CLCC L4 Commercial Standard PSD303-151 KA ; 150 44-pin CLCC L4 Industrial Standard PSD303-20 A 200 44-pin PLCC J2 Commercial Standard PSD303-201 A 200 44-pin PLCC J2 Industrial Standard PSD303-20 KA | 200 44-pin CLCC L4 Commercial Standard PSD303-201 KA | 200 44-pin CLCC L4 Industrial Standard May, 1993 . 132