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October 2011
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSD156MRBN • Rev. 1.0.0
FSD156MRBN — Green-Mode Fairchild Power Switch (FPS™)
FSD156MRBN
Green-Mode Fairchild Power Switch (FPS™)
Features
Advanced Soft Burst-Mode Operation for
Low Standby Power and Low Audible Noise
Random Frequency Fluctuation (RFF) for Low EMI
Pulse-by-Pulse Current Limit
Various Protection Functions: Overload Protection
(OLP), Over-Voltage Protection (OVP), Abnormal
Over-Current Protection (AOCP), Internal Thermal
Shutdown (TSD) with Hysteresis, Output-Short
Protection (OSP), and Under-Voltage Lockout
(UVLO) with Hysteresis
Low Operating Current (0.4mA) in Burst Mode
Internal Startup Circuit
Internal High-Voltage SenseFET: 650V
Built-in Soft-Start: 15ms
Auto-Restart Mode
Applications
Power Supply for LCD Monitor, STB, and DVD
Combination
Description
The FSD156MRBN is an integrated Pulse Width
Modulation (PWM) controller and SenseFET specifically
designed for offline Switch-Mode Power Supplies
(SMPS) with minimal external components. The PWM
controller includes an integrated fixed-frequency
oscillator, Under-Voltage Lockout (UVLO), Leading-
Edge Blanking (LEB), optimized gate driver, internal
soft-start, temperature-compensated precise current
sources for loop compensation, and self-protection
circuitry. Compared with a discrete MOSFET and PWM
controller solution, the FSD series can reduce total cost,
component count, size, and weight; while
simultaneously increasing efficiency, productivity, and
system reliability. This device provides a basic platform
suited for cost-effective design of a flyback converter.
Ordering Information
Part Number Package
Operating
Junction
Temperature
Current
Limit
RDS(ON)
(Max.)
Output Power Table(2)
Replaces
Device
230VAC ±15%(3) 85-265VAC
Adapter(4) Open
Frame(5) Adapter(4) Open
Frame(5)
FSD156MRBN 8-DIP -40°C ~
+125°C 1.60A 2.3 26W 40W 20W 30W
FSFM300N
FSGM300
Notes:
1. Lead-free package per JEDEC J-STD-020B.
2. The junction temperature can limit the maximum output power.
3. 230VAC or 100/115VAC with voltage doubler.
4. Typical continuous power in a non-ventilated enclosed adapter measured at 50C ambient temperature.
5. Maximum practical continuous power in an open-frame design at 50C ambient temperature.
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSD156MRBN • Rev. 1.0.0 2
FSD156MRBN — Green-Mode Fairchild Power Switch (FPS™)
Application Circuit
Figure 1. Typical Application Circuit
Internal Block Diagram
Figure 2. Internal Block Diagram
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSD156MRBN • Rev. 1.0.0 3
FSD156MRBN — Green-Mode Fairchild Power Switch (FPS™)
Pin Configuration
4. N.C.
2. VCC
3. FB
1. GND
FSD156MRBN
8. Drain
5. Drain
7. Drain
6. Drain
Figure 3. Pin Configuration (Top View)
Pin Definitions
Pin # Name Description
1 GND Ground. This pin is the control ground and the SenseFET source.
2 VCC Power Supply. This pin is the positive supply input, which provides the internal operating
current for both startup and steady-state operation.
3 FB
Feedback. This pin is internally connected to the inverting input of the PWM comparator.
The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor
should be placed between this pin and GND. If the voltage of this pin reaches 7.0V, the
overload protection triggers, which shuts down the FPS™.
4 NC
No Connection
5, 6, 7, 8 Drain SenseFET Drain. High-voltage power SenseFET drain connection.
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSD156MRBN • Rev. 1.0.0 4
FSD156MRBN — Green-Mode Fairchild Power Switch (FPS™)
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol Parameter Min. Max. Unit
VDS Drain Pin Voltage 650 V
VCC VCC Pin Voltage 26 V
VFB Feedback Pin Voltage -0.3 10.0 V
IDM Drain Current Pulsed 4 A
IDS Continuous Switching Drain Current(6) TC=25C 1.9 A
TC=100C 1.27 A
EAS Single Pulsed Avalanche Energy(7) 190 mJ
PD Total Power Dissipation (TC=25C)(8) 1.5 W
TJ
Maximum Junction Temperature 150 C
Operating Junction Temperature(9) -40 +125 C
TSTG Storage Temperature -55 +150 C
ESD Electrostatic
Discharge Capability
Human Body Model, JESD22-A114 5 kV
Charged Device Model, JESD22-C101 2
Notes:
6. Repetitive peak switching current when the inductive load is assumed: Limited by maximum duty (DMAX=0.73)
and junction temperature (see Figure 4).
7. L=45mH, starting TJ=25C.
8. Infinite cooling condition (refer to the SEMI G30-88).
9. Although this parameter guarantees IC operation, it does not guarantee all electrical characteristics.
Figure 4. Repetitive Peak Switching Current
Thermal Impedance
TA=25°C unless otherwise specified.
Symbol Parameter Value Unit
JA Junction-to-Ambient Thermal Impedance(10) 85 °C/W
JL Junction-to-Lead Thermal Impedance(11) 11 °C/W
Notes:
10. JEDEC recommended environment, JESD51-2, and test board, JESD51-10, with minimum land pattern.
11. Measured on the SOURCE pin #7, close to the plastic interface.
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSD156MRBN • Rev. 1.0.0 5
FSD156MRBN — Green-Mode Fairchild Power Switch (FPS™)
Electrical Characteristics
TJ = 25C unless otherwise specified.
Symbol Parameter Conditions Min. Typ. Max. Unit
SenseFET Section
BVDSS Drain-Source Breakdown Voltage VCC = 0V, ID = 250A 650 V
IDSS Zero-Gate-Voltage Drain Current VDS = 650V, TA = 25C 250
A
RDS(ON) Drain-Source On-State Resistance VGS=10V, ID =1A 1.8 2.2
CISS Input Capacitance(12) V
DS = 25V, VGS = 0V, f=1MHz 515 pF
COSS Output Capacitance(12) V
DS = 25V, VGS = 0V, f=1MHz 75 pF
tr Rise Time VDS = 325V, ID = 4A, RG=25 26 ns
tf Fall Time VDS = 325V, ID = 4A, RG=25 25 ns
td(on) Turn-On Delay VDS = 325V, ID = 4A, RG=25 14 ns
td(off) Turn-Off Delay VDS = 325V, ID= 4A, RG=25 32 ns
Control Section
fS Switching Frequency(12) V
CC = 14V, VFB = 4V 61 67 73 kHz
fS Switching Frequency Variation(12) -25C < TJ < 125C ±5 ±10 %
DMAX Maximum Duty Ratio VCC = 14V, VFB = 4V 61 67 73 %
DMIN Minimum Duty Ratio VCC = 14V, VFB = 0V 0 %
IFB Feedback Source Current VFB = 0 65 90 115 A
VSTART
UVLO Threshold Voltage VFB = 0V, VCC Sweep 11 12 13 V
VSTOP After Turn-on, VFB = 0V 7.0 7.5 8.0 V
tSS Internal Soft-Start Time VSTR = 40V, VCC Sweep 15 ms
VRECOMM Recommended VCC Range 13 23 V
Burst-Mode Section
VBURH
Burst-Mode Voltage VCC = 14V, VFB Sweep
0.45 0.50 0.55 V
VBURL 0.30 0.35 0.40 V
Hys 150 mV
Protection Section
ILIM Peak Drain Current Limit di/dt = 300mA/s 1.45 1.60 1.75 A
VSD Shutdown Feedback Voltage VCC = 14V, VFB Sweep 6.45 7.00 7.55 V
IDELAY Shutdown Delay Current VCC = 14V, VFB = 4V 1.2 2.0 2.8 A
tLEB Leading-Edge Blanking Time(12,14) 300 ns
VOVP Over-Voltage Protection VCC Sweep 23.0 24.5 26.0 V
tOSP
Output-Short
Protection(12)
Threshold Time OSP Triggered when
tON<tOSP & VFB>VOSP
(Lasts Longer than tOSP_FB)
0.7 1.0 1.3 s
VOSP Threshold VFB 1.8 2.0 2.2 V
tOSP_FB V
FB Blanking Time 2.0 2.5 3.0 s
TSD
Thermal Shutdown Temperature(12) Shutdown Temperature 125 135 145 C
THYS Hysteresis 60
C
Continued on the following page…
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSD156MRBN • Rev. 1.0.0 6
FSD156MRBN — Green-Mode Fairchild Power Switch (FPS™)
Electrical Characteristics (Continued)
TJ = 25C unless otherwise specified.
Symbol Parameter Conditions Min. Typ. Max. Unit
Total Device Section
IOP
Operating Supply Current,
(Control Part in Burst Mode) VCC = 14V, VFB = 0V 0.3 0.4 0.5 mA
IOPS Operating Switching Current,
(Control Part and SenseFET Part) VCC = 14V, VFB = 2V 1.1 1.5 1.9 mA
ISTART Start Current VCC=11V (Before VCC
Reaches VSTART) 85 120 155 A
ICH Startup Charging Current VCC = VFB = 0V, VSTR = 40V 0.7 1.0 1.3 mA
VSTR Minimum VSTR Supply Voltage VCC = VFB = 0V, VSTR Sweep 26 V
Notes:
12. Although these parameters are guaranteed, they are not 100% tested in production.
13. Average value.
14. tLEB includes gate turn-on time.
Comparison of FSGM300N and FSD156MRBN
Function FSGM300N FSD156MRBN Advantages of FSD156MRBN
Operating Current 1.5mA 0.4mA Very low standby power
Power Balance Long tCLD Very Short tCLD The difference of input power between the
low and high input voltage is quite small.
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSD156MRBN • Rev. 1.0.0 7
FSD156MRBN — Green-Mode Fairchild Power Switch (FPS™)
Typical Performance Characteristics
Characteristic graphs are normalized at TA=25°C.
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Normalized
Temperature [ °C]
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Normalized
Temperature [ °C]
Figure 5. Operating Supply Current (IOP) vs. TA Figure 6. Operating Switching Current (IOPS) vs. TA
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Normalized
Temperature [ °C]
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Normalized
Temperature [ °C]
Figure 7. Startup Charging Current (ICH) vs. TA Figure 8. Peak Drain Current Limit (ILIM) vs. TA
0.60
0.70
0.80
0.90
1.00
1.10
1.20
1.30
1.40
40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Normalized
Temperature [ °C]
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Normalized
Temperature [ °C]
Figure 9. Feedback Source Current (IFB) vs. TA Figure 10. Shutdown Delay Current (IDELAY) vs. TA
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSD156MRBN • Rev. 1.0.0 8
FSD156MRBN — Green-Mode Fairchild Power Switch (FPS™)
Typical Performance Characteristics
Characteristic graphs are normalized at TA=25°C.
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Normalized
Temperature [ °C]
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Normalized
Temperature [ °C]
Figure 11. UVLO Threshold Voltage (VSTART) vs. TA Figure 12. UVLO Threshold Voltage (VSTOP) vs. TA
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Normalized
Temperature [ °C]
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Normalized
Temperature [ °C]
Figure 13. Shutdown Feedback Voltage (VSD) vs. TAFigure 14. Over-Voltage Protection (VOVP) vs. TA
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Normalized
Temperature [ °C]
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Normalized
Temperature [ °C]
Figure 15. Switching Frequency (fS) vs. TA Figure 16. Maximum Duty Ratio (DMAX) vs. TA
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSD156MRBN • Rev. 1.0.0 9
FSD156MRBN — Green-Mode Fairchild Power Switch (FPS™)
Functional Description
1. Startup: At startup, an internal high-voltage current
source supplies the internal bias and charges the
external capacitor (CVcc) connected to the VCC pin, as
illustrated in Figure 17. When VCC reaches 12V, the
FSD156MRBN begins switching and the internal high-
voltage current source is disabled. Normal switching
operation continues and the power is supplied from the
auxiliary transformer winding unless VCC goes below the
stop voltage of 7.5V.
Figure 17. Startup Block
2. Soft-Start: The internal soft-start circuit increases
PWM comparator inverting input voltage, together with
the SenseFET current, slowly after startup. The typical
soft-start time is 15ms. The pulse width to the power
switching device is progressively increased to establish
the correct working conditions for the transformers,
inductors, and capacitors. The voltage on the output
capacitors is progressively increased to smoothly
establish the required output voltage. This helps prevent
transformer saturation and reduces stress on the
secondary diode during startup.
3. Feedback Control: This device employs Current-
Mode control, as shown in Figure 18. An opto-coupler
(such as the FOD817) and shunt regulator (such as the
KA431) are typically used to implement the feedback
network. Comparing the feedback voltage with the
voltage across the RSENSE resistor makes it possible to
control the switching duty cycle. When the reference pin
voltage of the shunt regulator exceeds the internal
reference voltage of 2.5V, the opto-coupler LED current
increases, pulling down the feedback voltage and
reducing drain current. This typically occurs when the
input voltage is increased or the output load is decreased.
3.1 Pulse-by-Pulse Current Limit: Because Current-
Mode control is employed, the peak current through
the SenseFET is limited by the inverting input of PWM
comparator (VFB*), as shown in Figure 18. Assuming
that the 90A current source flows only through the
internal resistor (3R + R =25k), the cathode voltage
of diode D2 is about 2.8V. Since D1 is blocked when
the feedback voltage (VFB) exceeds 2.8V, the
maximum voltage of the cathode of D2 is clamped at
this voltage. Therefore, the peak value of the current
through the SenseFET is limited.
3.2 Leading-Edge Blanking (LEB): At the instant the
internal SenseFET is turned on, a high-current spike
usually occurs through the SenseFET, caused by
primary-side capacitance and secondary-side rectifier
reverse recovery. Excessive voltage across the RSENSE
resistor leads to incorrect feedback operation in the
Current-Mode PWM control. To counter this effect, the
leading-edge blanking (LEB) circuit inhibits the PWM
comparator for tLEB (300ns) after the SenseFET is
turned on.
Figure 18. Pulse Width Modulation Circuit
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSD156MRBN • Rev. 1.0.0 10
FSD156MRBN — Green-Mode Fairchild Power Switch (FPS™)
4. Protection Circuits: The FSD156MRBN has several
self-protective functions, such as Overload Protection
(OLP), Abnormal Over-Current Protection (AOCP),
Output-Short Protection (OSP), Over-Voltage Protection
(OVP), and Thermal Shutdown (TSD). All the
protections are implemented as auto-restart. Once the
fault condition is detected, switching is terminated and
the SenseFET remains off. This causes VCC to fall.
When VBCCB falls to the Under-Voltage Lockout (UVLO)
stop voltage of 7.5V, the protection is reset and the
startup circuit charges the VCC capacitor. When VCC
reaches the start voltage of 12.0V, the FSD156MRBN
resumes normal operation. If the fault condition is not
removed, the SenseFET remains off and VCC drops to
stop voltage again. In this manner, the auto-restart can
alternately enable and disable the switching of the
power SenseFET until the fault condition is eliminated.
Because these protection circuits are fully integrated
into the IC without external components, reliability is
improved without increasing cost.
Figure 19. Auto-Restart Protection Waveforms
4.1 Overload Protection (OLP): Overload is defined
as the load current exceeding its normal level due to
an unexpected abnormal event. In this situation, the
protection circuit should trigger to protect the SMPS.
However, even when the SMPS is in normal
operation, the overload protection circuit can be
triggered during the load transition. To avoid this
undesired operation, the overload protection circuit is
designed to trigger only after a specified time to
determine whether it is a transient situation or a true
overload situation. Because of the pulse-by-pulse
current limit capability, the maximum peak current
through the SenseFET is limited and, therefore, the
maximum input power is restricted with a given input
voltage. If the output consumes more than this
maximum power, the output voltage (VOUT) decreases
below the set voltage. This reduces the current
through the opto-coupler LED, which also reduces the
opto-coupler transistor current, increasing the
feedback voltage (VFB). If VFB exceeds 2.5V, D1 is
blocked and the 2.0µA current source starts to charge
CFB slowly up. In this condition, VFB continues
increasing until it reaches 7.0V, when the switching
operation is terminated, as shown in Figure 20. The
delay for shutdown is the time required to charge CFB
from 2.5V to 7.0V with 2.0µA. A 25 ~ 50ms delay is
typical for most applications. This protection is
implemented in Auto-Restart Mode.
Figure 20. Overload Protection
4.2 Abnormal Over-Current Protection (AOCP):
When the secondary rectifier diodes or the
transformer pins are shorted, a steep current with
extremely high di/dt can flow through the SenseFET
during the minimum turn-on time. Even though the
FSD156MRBN has overload protection, it is not
enough to protect the FSD156MRBN in that abnormal
case; due to the severe current stress imposed on the
SenseFET until OLP is triggered. The internal AOCP
circuit is shown in Figure 21. When the gate turn-on
signal is applied to the power SenseFET, the AOCP
block is enabled and monitors the current through the
sensing resistor. The voltage across the resistor is
compared with a preset AOCP level. If the sensing
resistor voltage is greater than the AOCP level, the
set signal is applied to the S-R latch, resulting in the
shutdown of the SMPS.
Figure 21. Abnormal Over-Current Protection
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSD156MRBN • Rev. 1.0.0 11
FSD156MRBN — Green-Mode Fairchild Power Switch (FPS™)
4.3. Output-Short Protection (OSP): If the output is
shorted, steep current with extremely high di/dt can
flow through the SenseFET during the minimum turn-
on time. Such a steep current brings high-voltage
stress on the drain of the SenseFET when turned off.
To protect the device from this abnormal condition,
OSP is included. It is comprised of detecting VFB and
SenseFET turn-on time. When the VFB is higher than
2.0V and the SenseFET turn-on time is lower than
1.0s, this condition is recognized as an abnormal
error and PWM switching shuts down until VCC
reaches VSTART again. An abnormal condition output
short is shown in Figure 22.
Figure 22. Output-Short Protection
4.4 Over-Voltage Protection (OVP): If the
secondary-side feedback circuit malfunctions or a
solder defect causes an opening in the feedback path,
the current through the opto-coupler transistor
becomes almost zero. Then VFB climbs up in a similar
manner to the overload situation, forcing the preset
maximum current to be supplied to the SMPS until the
overload protection is triggered. Because more
energy than required is provided to the output, the
output voltage may exceed the rated voltage before
the overload protection is triggered, resulting in the
breakdown of the devices in the secondary side. To
prevent this situation, an OVP circuit is employed. In
general, the VCC is proportional to the output voltage
and the FSD156MRBN uses VCC instead of directly
monitoring the output voltage. If VCC exceeds 24.5V,
an OVP circuit is triggered, resulting in the termination
of the switching operation. To avoid undesired
activation of OVP during normal operation, VCC should
be designed to be below 24.5V.
4.5 Thermal Shutdown (TSD): The SenseFET and
the control IC on a die in one package makes it easier
for the control IC to detect the over temperature of the
SenseFET. If the temperature exceeds ~135C, the
thermal shutdown is triggered and stops operation.
The FSD156MRBN operates in Auto-Restart Mode
until the temperature decreases to around 75C,
when normal operation resumes.
5. Soft Burst-Mode Operation: To minimize power
dissipation in Standby Mode, the FSD156MRBN enters
Burst-Mode operation. As the load decreases, the
feedback voltage decreases. As shown in Figure 23, the
device automatically enters Burst Mode when the
feedback voltage drops below VBURL (350mV). At this
point, switching stops and the output voltages start to
drop at a rate dependent on standby current load. This
causes the feedback voltage to rise. Once it passes
VBURH (500mV), switching resumes. The feedback
voltage then falls and the process repeats. Burst Mode
alternately enables and disables SenseFET switching,
reducing switching loss in Standby Mode.
Figure 23. Figure 23. Burst-Mode Operation
6. Random Frequency Fluctuation (RFF): Fluctuating
switching frequency of an SMPS can reduce EMI by
spreading the energy over a wide frequency range. The
amount of EMI reduction is directly related to the
switching frequency variation, which is limited internally.
The switching frequency is determined randomly by
external feedback voltage and internal free-running
oscillator at every switching instant. RFF effectively
scatters EMI noise around typical switching frequency
(67kHz) and can reduce the cost of the input filter
included to meet the EMI requirements (e.g. EN55022).
Figure 24. Random Frequency Fluctuation
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSD156MRBN • Rev. 1.0.0 12
FSD156MRBN — Green-Mode Fairchild Power Switch (FPS™)
Typical Application Circuit
Application Input Voltage Rated Output Rated Power
LCD Monitor
Power Supply 85 ~ 265VAC 5.0V(2A)
14.0V(1.3A) 28.2W
Key Design Notes
1. The delay for overload protection is designed to be about 30ms with C105 (8.2nF). OLP time between 39ms
(12nF) and 46ms (15nF) is recommended.
2. The SMD-type capacitor (C106) must be placed as close as possible to the VCC pin to avoid malfunction by
abrupt pulsating noises and to improve ESD and surge immunity. Capacitance between 100nF and 220nF is
recommended.
Schematic
Figure 25. Schematic
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSD156MRBN • Rev. 1.0.0 13
FSD156MRBN — Green-Mode Fairchild Power Switch (FPS™)
Transformer
Figure 26. Schematic of Transformer
Winding Specification
Pin(S F) Wire Turns Winding Method Barrier Tape
TOP BOT Ts
Np /2 3 2 0.25×1 22 Solenoid Winding - 2.0mm 1
Insulation: Polyester Tape t = 0.025mm, 2 Layers
N5V 7 6 0.4×2 (TIW) 3 Solenoid Winding - 3.0mm 1
Insulation: Polyester Tape t = 0.025mm, 2 Layers
Na 4 5 0.2×1 8 Solenoid Winding 4.0mm 3.0mm 1
Insulation: Polyester Tape t = 0.025mm, 2 Layers
N5V 8 6 0.4×2 (TIW) 3 Solenoid Winding - 3.0mm 1
Insulation: Polyester Tape t = 0.025mm, 2 Layers
N14V 10 8 0.4×2 (TIW) 5 Solenoid Winding 2.0mm 1
Insulation: Polyester Tape t = 0.025mm, 2 Layers
Np/2 2 1 0.25×1 22 Solenoid Winding - 2.0mm 1
Insulation: Polyester Tape t = 0.025mm, 2 Layers
Electrical Characteristics
Pin Specification Remark
Inductance 13 826H ±6% 67kHz, 1V
Leakage 13 15H Maximum Short all other pins
Core & Bobbin
Core: EER3016 (Ae=109.7mm2)
Bobbin: EER3016
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSD156MRBN • Rev. 1.0.0 14
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Bill of Materials
Part # Value Note Part # Value Note
Fuse Capacitor
F101 250V 2A C101 220nF/275V Box (Pilkor)
NTC C102 150nF/275V Box (Pilkor)
NTC101 5D-9 DSC C103
100F/400V Electrolytic (SamYoung)
Resistor C104 3.3nF/630V Film (Sehwa)
R101 1.5M, J 1W C105 15nF/100V Film (Sehwa)
R103 43k, J 1W C106 100nF SMD (2012)
R201 1.5k, F 1/4W, 1% C107 47F/50V Electrolytic (SamYoung)
R202 1.0k, F 1/4W, 1% C201 820F/25V Electrolytic (SamYoung)
R203 18k, F 1/4W, 1% C202 820F/25V Electrolytic (SamYoung)
R204 8k, F 1/4W, 1% C203 2200F/10V Electrolytic (SamYoung)
R205 8k, F 1/4W, 1% C204 1000F/16V Electrolytic (SamYoung)
C205 47nF/100V Film (Sehwa)
C301 2.2nF/Y2 Y-cap (Samhwa)
IC Inductor
FPS FSD156MRBN Fairchild LF101 20mH Line filter 0.5Ø
IC201 KA431LZ Fairchild L201 5H 5A Rating
IC301 FOD817B Fairchild L202 5H 5A Rating
Diode Transformer
D101 1N4007 Vishay T101 826uH
D102 UF4007 Vishay
ZD101 1N4750 Vishay
D201 MBRF10H100 Fairchild
D202 MBRF1060 Fairchild
BD101 G2SBA60 Vishay
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSD156MRBN • Rev. 1.0.0 15
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Package Dimensions
Figure 27. 8-Lead, MDIP, JEDEC MS-001, .300" Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
5.08 MAX
0.33 MIN
2.54
7.62
0.56
0.355
1.65
1.27
3.683
3.20
3.60
3.00
6.67
6.096
9.83
9.00
7.62
9.957
7.87
0.356
0.20
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO
JEDEC MS-001 VARIATION BA
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
D) DIMENSIONS AND TOLERANCES PER
ASME Y14.5M-1994
8.255
7.61
E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.
(0.56)
© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSD156MRBN • Rev. 1.0.0 16
FSD156MRBN — Green-Mode Fairchild Power Switch (FPS™)
www.onsemi.com
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