PUMD16,115 - NEXPERIA - Datasheet.Live

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1. Product profile

1.1 General description

NPN/PNP resistor-e qu ip pe d tr an sist or s.

1.2 Features and benefits

Built-in bias resistors

Simplifies circuit design

Reduces component count

Reduces pick and place cost

1.3 Applications

Low current peripheral driver

Control of IC inputs

Replacemen t of ge n eral- pu rp o se tran sis tor s in dig ital applicat ion s

1.4 Quick reference data

PEMD16; PUMD16

NPN/PNP resistor-equipped transistors;

R1 = 22 k, R2 = 47 k

Rev. 3 — 28 June 2011 Product data sheet

Table 1. Product overview

Type number Package PNP/PNP

complement NPN/NPN

complement

NXP JEITA

PEMD16 SOT666 - PEMB16 PEMH16

PUMD16 SOT363 SC-88 PUMB16 PUMH16

Table 2. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

VCEO collector-emitter voltage open base - - 50 V

IOoutput current - - 100 m A

R1 bias resistor 1 (input) 15.4 22 28.6 k

R2/R1 bias resistor ratio 1.7 2.1 2.6

Product data sheet Rev. 3 — 28 June 2011 2 of 11

NXP Semiconductors PEMD16; PUMD16

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 47 k

2. Pinning information

3. Ordering information

4. Marking

[1] * = placeholder for manufacturing site code

Table 3. Pinning

Pin Description Simplified outline Graphic symbol

1 GND (emitter) TR1

2 input (base) TR1

3 output (collector) TR2

4 GND (emitter) TR2

5 input (base) TR2

6 output (collector) TR1

001aab555

6 45

1 32

65 4

123

TR1 TR2

R2 R1

006aaa143

Table 4. Orderin g information

Type number Package

Name Description Version

PEMD16 - plastic surface-mounted package; 6 leads SOT666

PUMD16 SC-88 plastic surface-mounted package; 6 leads SOT363

Table 5. Marking codes

Type number Marking code[1]

PEMD16 5H

PUMD16 D1*

Product data sheet Rev. 3 — 28 June 2011 3 of 11

NXP Semiconductors PEMD16; PUMD16

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 47 k

5. Limiting values

[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard

footprint.

[2] Reflow soldering is the only recommended soldering method.

Table 6. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

Per transistor; for the PNP transistor with negative polarity

VCBO collector-base voltage open emitter - 50 V

VCEO collector-emitter voltage open base - 50 V

VEBO emitter-base voltage open collector - 5 V

VIinput voltage TR1

positive - +40 V

negative - 7V

input voltage TR2

positive - +7 V

negative - 40 V

IOoutput current - 100 mA

ICM peak collector current - 100 mA

Ptot total power dissipation Tamb 25 C

SOT363 [1] -200mW

SOT666 [1][2] -200mW

Tstg storage temperature 65 +150 C

Tjjunction temperature - 150 C

Tamb ambient temperature 65 +150 C

Per device

Ptot total power dissipation Tamb 25 C

SOT363 [1] -300mW

SOT666 [1][2] -300mW

Product data sheet Rev. 3 — 28 June 2011 4 of 11

NXP Semiconductors PEMD16; PUMD16

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 47 k

6. Thermal characteristics

[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.

[2] Reflow soldering is the only recommended soldering method.

7. Characteristics

Table 7. Thermal characteris tics

Symbol Parameter Conditions Min Typ Max Unit

Per transis tor

Rth(j-a) thermal resistance from

junction to ambient in free air

SOT363 [1] - - 625 K/W

SOT666 [1][2] - - 625 K/W

Per device

Rth(j-a) thermal resistance from

junction to ambient in free air

SOT363 [1] - - 416 K/W

SOT666 [1][2] - - 416 K/W

Table 8. Characteristics

Tamb =25



C unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

Per transistor; for the PNP transistor with negative polarity

ICBO collector-base cut-off

current VCB =50V; I

E= 0 A - - 100 nA

ICEO collector-emitter

cut-off current VCE =30V; I

B=0A - - 1 A

VCE =30V; I

B=0A;

Tj= 150 C--50A

IEBO emitter-base cut-off

current VEB =5V; I

C=0A - - 120 A

hFE DC current gain VCE =5V; I

C=5mA 80 - -

VCEsat collector-emitter

saturation voltage IC=10mA; I

B=0.5mA - - 150 mV

VI(off) off-state input voltage VCE =5V; I

C=100A- 0.80.5V

VI(on) on-state input voltage V CE = 0.3 V; IC=2mA 2 1.1 - V

R1 bias resistor 1 (input) 15.4 22 28.6 k

R2/R1 bias resistor ratio 1.7 2.1 2.6

Cccollector capacitance VCB =10 V;

IE=i

e=0A; f=1MHz

TR1 (NPN) - - 2.5 pF

TR2 (PNP) - - 3 pF

Product data sheet Rev. 3 — 28 June 2011 5 of 11

NXP Semiconductors PEMD16; PUMD16

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 47 k

VCE =5V

(1) Tamb = 100 C

(2) Tamb =25C

(3) Tamb =40 C

IC/IB=20

(1) Tamb = 100 C

(2) Tamb =25C

(3) Tamb =40 C

Fig 1. TR1 (NPN): DC current gain as a function of

collector current; typical valu es Fig 2. TR1 (NPN): Collector-emitter saturation

voltage as a function of collector cur r e nt;

typical values

VCE =0.3V

(1) Tamb =40 C

(2) Tamb =25C

(3) Tamb = 100 C

VCE =5V

(1) Tamb =40 C

(2) Tamb =25C

(3) Tamb = 100 C

Fig 3. TR1 (NPN): On-state input voltage as a

function of collector current; typical values Fig 4. TR1 (NPN): Off-state input voltage as a

function of collector current; typical values

IC (mA)

10−1102

101

006aaa174

102

103

hFE

(1)

(2)

(3)

IC (mA)

110

006aaa175

102

103

VCEsat

(mV)

(1)

(2)

(3)

006aaa176

IC (mA)

10−1102

101

VI(on)

(V)

10−1

(1)

(3)

(2)

006aaa177

IC (mA)

10−210110−1

VI(off)

(V)

10−1

(1)

(3)

(2)

Product data sheet Rev. 3 — 28 June 2011 6 of 11

NXP Semiconductors PEMD16; PUMD16

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 47 k

VCE =5V

(1) Tamb = 100 C

(2) Tamb =25C

(3) Tamb =40 C

IC/IB=20

(1) Tamb = 100 C

(2) Tamb =25C

(3) Tamb =40 C

Fig 5. TR2 (PNP): DC current gain as a function of

collector current; typical valu es Fig 6. TR2 (PNP): Collector-emitter saturation

voltage as a function of collector cur r e nt;

typical values

VCE =0.3 V

(1) Tamb =40 C

(2) Tamb =25C

(3) Tamb = 100 C

VCE =5V

(1) Tamb =40 C

(2) Tamb =25C

(3) Tamb = 100 C

Fig 7. TR2 (PNP): On-state input voltage as a

function of collector current; typical values Fig 8. TR2 (PNP): Off-state input volt age as a

function of collector current; typical values

IC (mA)

−10−1−102

−10−1

006aaa198

102

103

hFE

(1)

(3)

(2)

006aaa199

IC (mA)

−10−1−102

−10−1

−102

−103

VCEsat

(mV)

−10

(1)

(2)

(3)

006aaa200

IC (mA)

−10−1−102

−10−1

−103

−104

VI(on)

(mV)

−102

(1)

(2)

(3)

006aaa201

IC (mA)

−10−2−10−1−10−1

−103

−104

VI(off)

(mV)

−102

(1)

(2)

(3)

Product data sheet Rev. 3 — 28 June 2011 7 of 11

NXP Semiconductors PEMD16; PUMD16

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 47 k

8. Package outline

9. Packing information

[1] For further information and the availability of packing methods, see Section 12.

[2] T1: normal taping

[3] T2: reverse taping

Fig 9. Package outline SOT363 (SC-88) Fig 10. Package outline SOT666

06-03-16Dimensions in mm

0.25

0.10

0.3

0.2

pin 1

index

1.3

0.65

2.2

2.0 1.35

1.15

2.2

1.8 1.1

0.8

0.45

0.15

132

465

Dimensions in mm 04-11-08

1.7

1.5

1.7

1.5

1.3

1.1

0.18

0.08

0.27

0.17

0.5

pin 1 index

123

456

0.6

0.5

0.3

0.1

Table 9. Packing methods

The indicated -xxx are the last thre e digits of the 12NC ordering code. [1]

Type number Package Description Packing quantity

3000 4000 10000

PEMD16 SOT666 4 mm pitch, 8 mm tape and reel - -115 -

PUMD16 SOT363 4 mm pitch, 8 mm tape and reel; T1 [2] -115 - -135

4 mm pitch, 8 mm tape and reel; T2 [3] -125 - -165

Product data sheet Rev. 3 — 28 June 2011 8 of 11

NXP Semiconductors PEMD16; PUMD16

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 47 k

10. Revision history

Table 10. Revision history

Document ID Release date Data sheet status Change notice Supersedes

PEMD16_PUMD16 v.3 20110628 Product data sheet - PEMD16_PUMD16 v.2

Modifications: •The format of this document has been redesigned to comply with the new identity

guidelines of NXP Semiconductor.

•Legal texts have been adapted to the new company name where appropriate.

•Figure 9 “Package outline SOT363 (SC-88)” is upda ted.

•Section 11 “Legal information” is updated.

PEMD16_PUMD16 v.2 20050607 Product data sheet - PUMD16 v.1

PUMD16 v.1 20031022 Product specification - -

Product data sheet Rev. 3 — 28 June 2011 9 of 11

NXP Semiconductors PEMD16; PUMD16

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 47 k

11. Legal information

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[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

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Draft — The document is a draft version only. The content is still under

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with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and

full information. For detailed and full information see the relevant full data

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office. In case of any inconsistency or conflict with the short data sheet, the

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Product specificat io n — The information and data provided in a Product

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Notwithstanding any damages that customer might incur for any reason

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changes to information published in this document, including without

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malfunction of an NXP Semiconductors product can reasonably be expected

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NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty tha t such application s will be suitable for the

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Customers are responsible for the design and ope ration of their applications

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Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanent ly and irreversibly affect

the quality and reliability of the device.

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products are sold subject to the general terms and conditions of commercial

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Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contains data from the objective specificati on for product development.

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.

Product [short] dat a sheet Production This document contains the product specification.

Product data sheet Rev. 3 — 28 June 2011 10 of 11

NXP Semiconductors PEMD16; PUMD16

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 47 k

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristi cs sections of this

document, and as such is not complete, exhaustive or legally binding.

11.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respect i ve ow ners.

12. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors PEMD16; PUMD16

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 47 k

For more information, please visit: http://www.nxp.co m

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 28 June 2011

Document identifier: PEMD16_PUMD16

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

13. Contents

1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 General description . . . . . . . . . . . . . . . . . . . . . 1

1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3

6 Thermal characteristics . . . . . . . . . . . . . . . . . . 4

7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 4

8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7

9 Packing information . . . . . . . . . . . . . . . . . . . . . 7

10 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 8

11 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 9

11.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 9

11.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

11.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

11.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

12 Contact information. . . . . . . . . . . . . . . . . . . . . 10

13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11