NERC Eee ER DATA SlAl 74LVC11 = = | Triple 3-input AND gate Product specification Philips Semiconductors 1998 Apr 28 PHILIPSPhilips Semiconductors Product specification a Triple 3-input AND gate 74LVC11 FEATURES Wide supply voltage range of 1.2 V to 3.6V DESCRIPTION The 74LVC11 is a high-performance, low power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC11 provides the 3-input AND function. in accordance with JEDEC standard no. 8-1A. inputs accept voltages up to 5.5.V CMOS low power consumption Direct interface with TTL levels @ Output capability: standard ioc category: SSI QUICK REFERENCE DATA GND = 0 V; Tamp = 25C; = f $2.5 nS SYMBOL PARAMETER CONDITIONS TYPICAL UNIT : = 50 pF: fext/teLy meen G aay Vio Sorr 37 ns Cl Input capacitance 5.0 pF Cpep Power dissipation capacitance per gate Notes 1 and 2 26 pF NOTES: 1. Cpp is used to determine the dynamic power dissipation (Pp in uW) Pp = Cpp x Veo* x fi +5 (CL x Voc? x fp) where: f, = input frequency in MHz; Cy. = output load capacity in pF; fp = output frequency in MHz; Vcc = supply voltage in V; 5 (CL x Voc? x fp) = sum of the outputs. 2. The condition is V; = GND to Voc. ORDERING INFORMATION __ PACKAGES TEMPERATURE RANGE | OUTSIDE NORTH AMERICA | NORTH AMERICA | DWG NUMBER 14-Pin Plastic SO ~40C to-+85C 74LVC11 D 74iVCHi D SOT108-1 14-Pin Plastic SSOP Type Il 40C to +85C 74\VC11 DB 74LVC11 DB SOT337-1 14-Pin Plastic TSSOP Type | 40C to +85C 74\.VC11 PW 7ALVC11PW DH SOT402-1 PIN CONFIGURATION LOGIC SYMBOL (IEEE/IEC) TAL 4 LJ 14] Veco api 4 it} 3c acl 5 10] 38 svoosso al 6 zx BA eno[_7 | 8] 3Y SVv00416 1998 Apr 28 853-2060 19308Philips Semiconductors Product specification Triple 3-input AND gate 7A4LVC11 PIN DESCRIPTION LOGIC DIAGRAM (ONE GATE) PIN NUMBER SYMBOL NAME AND FUNCTION A 1,3,9 1A-3A | Data inputs B Y 2,4, 10 1B-38 | Data inputs c 7 GND _| Ground (0 V) Sweet 12, 6,8 V-3Y7 Data outputs 13,5, 11 1~-3C | Data inputs FUNCTION TABLE 14 Veco Positive supply voltage INPUTS OUTPUTS nA nB nc ny LOGIC SYMBOL L L L L , L L H L 1A L H L L L H H L H L L L H L H L H H L L H H H H NOTES: SVv004d38 H = HIGH voltage level L = LOW voltage level RECOMMENDED OPERATING CONDITIONS LIMITS ER ONDITIO UNIT SYMBOL PARAMET Cc NS aN MAX Veo DC supply voltage (for max. speed performance) 2.7 3.6 Vv Vec DC supply voltage (for low-voltage applications) 2 3.6 v Vi DC input voltage range 0 5.5 v Vo DC output voltage range 0 Voc Vv Tarp Operating free-air temperature range -40 +85 C tr ty input rise and fall times ves = OS e aN 5 Pe ns/V 1998 Apr 28Philips Semiconductors Product specification Triple 3-input AND gate 74LVC11 ABSOLUTE MAXIMUM RATINGS! In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = OV) SYMBOL PARAMETER CONDITIONS RATING UNIT Vee DC supply voltage 0.5 to +6.5 Vv lic DC input diode current Vv, <0 50 mA VI DC input voltage Note 2 -0.5 to +5.5 Vv lox DC output diode current Vo >Vec or Vo < 0 +50 mA Vo DC output voltage Note 2 ~O.5 to Voc +0.5 Vv lo DC output source or sink current Vo = 010 Voc +50 mA leno. leg | DC Veg or GND current +100 mA Tetg Storage temperature range ~65 to +150 C Power dissipation per package Prot ~ plastic mini-pack (SO) above +70C derate linearly with 8 mW/K 500 W plastic shrink mini-pack (SSOP and TSSOP) above +60C derate linearly with 5.5 mW/K 500 m NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and. output voltage ratings may be exceeded if the input and output current ratings are observed. DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions voltages are referenced to.GND (ground = 0V) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40C to +85C =| UNIT MIN TYP? | MAX Vec = 1.2V Vec View | HIGH level Input voltage Vv Voc = 2.7 to 3.6V 2.0 Veg = 1.2V GND Vir LOW fevel Input voltage Vv Voc = 2.7 to 3.6V 0.8 Voc = 2.7V; Vie= Vig or Vins Io = -12mA Veco -0.5 Veo = 3.0V; Vi = Vin or Vii ig = -100pA Voo-0.2 | Voc Vou HIGH level output voltage v Voo = 3.0V; Vi = Vig or Vics lo = -12mA Voc -0.6 Veo = 3.0V; Vj = Vin oF Vip: lo = -24mA Voo- 1.0 Voo = 2.7V; Vi) = Vin or Vii lo = F2mA 0.40 VoL LOW level output voltage Veo = 3.0V; Vp = Vin or Viz: lo = 100nA GND | 0.20 Vv Voc = 3.0V; Vi = Vin or Vit; Io = 24mA 0.55 h input leakage current Voc = 3.6V; V; = 5.5V or GND +01) +5 | pA lec Quiescent supply current Voc = 3.6V; Vi = Voc or GND; Ip = 0 0.1 10 pA Alog | Adeitionsl quiescent supply current Per | vor =2.7V to 3.6V; Vi = Voc ~0.6V; Io = 0 5 | 500 | uA NOTE: 1. All typical values are at Voc = 3.9V and Tamp = 28C. 1998 Apr 28Philips Semiconductors Product specification Triple 3-input AND gate 7ALVC11 AC CHARACTERISTICS GND =0V; t= < 2.5 ns; C, = 50 pF; Ry = 5009; Tapp = 40C to +85C LIMITS SYMBOL PARAMETER WAVEFORM Veco = 3.3V 0.3V Veo = 2.7 UNIT MIN Typt MAX MIN MAX i i tpui/tpiy Bier eerie 1,2 - 3.7 6.2 - 7.4 ns NOTE: 1.. These typical values are at Voc = 3.3V and Tamp = 25C. AC WAVEFORMS TEST CIRCUIT Vy = 1.5 VatVog = 2.7V Vi = 0.5 * Veg at Veco < 2.7.V y S1 ay, Vo. and Voy are the typical output voltage drop that occur with the oC : o~ Open output load. | o GND vi vi vo 5008 nA, nB, nC INPUT GENEHTOR ; DUT GND ..-- RT T oo. SOPF < sono aY OUTPUT v SWITCH POSITION ot svoee23 TEST 3 Vee vi Waveform 1. Input (nA, nB, nC).to tpuatpHt, Open <2.7V Voc lays. output (n) propagation delays 27-36v | 2.7V svoogas Waveform 2. Load circuitry for switching times. 1998 Apr 28 5Philips Semiconductors Product specification Triple 3-input AND gate 74LVC11 $014: plastic small outline package; 14 leads; body width 3.9 mm $OT108-1 _ HAAR AAD pin 1 index r iO i HE UW; [=] mt detail X Pp 0 25 5mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mo Ay | Az | As | bp | ce | DB | EM) @ | He | L | bp | @ v w y | 2M] 6 0.25 | 1.45 0.49 | 025/875 | 40 6.2 1.0 | 07 07 mm 1 175 | ot | 1.25 | | o38| 019] 855 | 38 | '* | sa | '%] o6 | o6 | 97] 7) O11 on | ge 0.010 | 0.057 0.019 }0.0100] 0.35 | 0.16 0.244 0.039 | 0.028 0.028] 0 inches | 0.069 | 9 q94 | 0.049} | o.o14}0.0075| 0.34 | 0.15 | 2] 0.228 | 941 | oo16 | 0.024 | OOF | 9.01 | 0.004) Do 15 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION 1EC JEDEC EIAJ PROJECTION SOT108-1 076E06S MS-012AB E46 Sonos 1998 Apr 28Philips Semiconductors Product specification Triple 3-input AND gate 74LVC11 SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm $0OT337-1 D E [A] Fa a |_| \ _ a f? = . > ] tILoeof vil, __ FI a ~~ Ly ~ He ote te]v OLA] po 7 a 6 pin 1 index i 0 25 5mm Dt diel ateelrneelnerll scale DIMENSIONS (mm are the original dimensions) A UNIT | ax | Ar | Az | As | be | | OM] BM) e | He] L | bp | @ | vj wi] y | 2] 2 0.21 | 4.80 038 | o20| 64 | 54 79 1.03 | 0.9 14 | a mm | 20 | gos | 1651 75 | 025] 009 | 60 | 52 | 98] 76 | 178] oes] o7 | %2 | OF] OTT og | ge Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION ec JEDEC EIAJ PROJECTION ) 25-62-04 $0T337-1 MO-150AB ese coor an 1998 Apr 28 7Philips Semiconductors Product specification Triple 3-input AND gate 74LVC11 TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 po Ae, - 7 a) | jit iy OP Re | a Lo Le | ve G 2.5 5mm scale DIMENSIONS (mm are the original dimensions) A UNIT | ax | At | A2 | Aa | bp e | oM] EQ] e He L Lp Q v w y | z)] 6 0.15 | 0.95 0.30 0.2 5.1 45 6.6 0.75 0.4 0.72 8 mm 7 119) 905 | ogo | 9 | 019] 0+ | a9 | a3 | 28] a2 | *9 Joso] os | %? [919 | Ot | o3g] 9 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN (ISSUE DATE VERSION lEC JEDEC BIA PROJECTION 34-07-72 SOT402-1 MO-183 =} 95-04-04 1998 Apr 28 8Philips Semiconductors Product specification Triple 3-input AND gate 74\iVC11 NOTES 1998 Apr 28 9Philips Semiconductors Product specification Triple 3-input AND gate 74LVC11 Data sheet status Data sheet Product Definition [1 status status Objective Development This data sheet.contains the design target or goal specifications for product development. specification Specification may change in any manner without notice. Preliminary Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. specification Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make specification changes at any time without notice in order to improve design and supply the. best possible product. {1] Please consuit the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values. definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Serniconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philifs Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the rightto make changes, without notice, in the products, including circuits, standard cells, and/or software, described ar contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors Copyright Philips Electronics North America Corporation 1998 811 East Arques Avenue Alt rights reserved. Printed in U.S.A. P.O. Box 3409 , Sunnyvale, Catifernia 94088-3409 print code Date of release: 08-98 Telephone 800-234-7381 Document order number: 9397-750-04483 Lets make bette PHILIPS Philips Semiconductors