TOSHIBA Features: * High Speed: t,, = 5.0ns (typ.) at Voog = 5V * Low Power Dissipation: |,, = 8uA (max.) at Ta = 25C * Compatible with TTL Outputs: V,, = 0.8V (max.) Vig = 2.0V (min.) * Symmetrical Output Impedance: Ho41 = Io. = 24mMA (min.). Capability of driving 50Q transmission lines. * Balanced Propagation Delays: t,.4 = tou + Wide Operating Voltage Range: Voc(opr=2V~5.5V Pin and Function Compatible with 74F240/244 * ACT240 and ACT244 Available in DiP, SOIC, SOP and SSOP Packages. Pin Assignment TC74ACT240 1G id 20 Vcc 1A1 2st -<p4j19 2G 24 34 \ nis 11 102 4 (LSI \J N17 2A4 23 659 \ 16 12 1A3. 6 (LS \tak 15 2A3 22 74 Ny 14 13 1A4 8 Ls RH 13-202 evi 95 ry 12 14 GND 10 5 Vath 11 2A TC74ACT240, 244 Octal Bus Buffers 240: Inverted, 3-State Outputs 244: Non-Inverted, 3-State Outputs The TC74ACT240, and 244 are advanced high speed CMOS OCTAL BUS BUFFERS fabricated with silicon gate and double-layer metal wiring C?MOS technology. They achieve the high speed operation similar to equiva- lent Bipolar Schottky TTL, while maintaining the CMOS low power dissipation. The 74ACT240 is an inverting 3-state buffer having two active-low output enables. The TC74ACT244 is non-inverting 3-state buffers; the 244 has two active-low output enables. These devices are designed to be used with 3-state memory address drivers, etc. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Truth Table INPUTS OUTPUTS 6 G4 Ay Y, | n44 L H L L H L H H H L H L Z Z A: for TC74ACT241 only AA : for TC74ACT240 only X : Don't Care Z : High Impedance TC74ACT244 1G idea 120 Voc wat 20S -<py19 26 2y4 37 \ 18 11 124 LS AEA 17 2A4 2v3 54 \ hte 12 103 6 ES \Rb 15 2A3 2v2 74 \ 14 13 1A4 8] wo \Reh 13 2A2 2v1 97 H 12 14 GND 10 (] RG 11 2A1 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. 231Octal Bus Buffers TC74ACT240,244 Absolute Maximum Ratings PARAMETER SYMBOL VALUE UNIT * $00mW in the range of Ta = -40C~65C. From Ta = 65C to 85C a derating factor of Supply Voltage Range Voc 05-70 y -10mW/C should be applied up to 300mW. DC Input Voltage Vin 0.5-Veg + 0.5 V OC Output Voltage Vour 0.5-Voe +05 V Input Diode Current lik +20 mA Output Diode Current lox 450 mA DC Output Current lout 450 mA DC Voc/Ground Current lec 4200 mA Power Dissipation Pp 500 (DIP) */180 (SOP) mW Storage Temperature Tig -65~150 8 Lead Temperature 10sec T 300 c Recommended Operating Conditions PARAMETER SYMBOL VALUE UNIT Supply Voltage Vee 2.0-5.5 v Input Voltage Viey 0-Vieg V Output Voltage Vout 0-Vec V Operating Temperature Topr ~40~85 ae Input Rise and Fall Time dt/dv 0-10 ns/v DC Electrical Characteristics Ta = 25C Ta = -40~85C PARAMETER SYMBOL TEST CONDITION UNIT Vec Min. Typ. Max. Min. Max. 45-55 20 _ _ 2.0 _ High-Level Input Valtage Vin 45-65 2.0 _ 2.0 Vv 45-55 20 20 _ 45-55 _ _ 08 08 Low-Level Input Voltage Vit 45~5.5 _ _ 08 _ 08 Vv 45-55 _ 08 _ 08 low = -50mA 45 44 45 _ 44 _ High-Level Output Voltage Vou Vin = Vie or VI loy = -24mA 45 3.94 _ _ 3.80 _ Vv Igy = -75mA* 55 = a 3.85 Io, = SOMA 45 0.0 0.4 01 Low-Level Output Voltage Vor Vin = Vie or Vit lo. = 24mA 45 _ _ 0.36 _ 0.44 Vv lo = 75mA* 55 1.65 3-State Output | VineVin OF Vip 5.6 = = 05 = 5.0 Off-State Current 02 Vour=Veq or GND 55 _ _ 05 _ 5.0 Input Leakage Current ly Vin = Vcc of GND 5.5 _ _ 40.1 _ +.0 uA lec Vin = Voc of GND 55 _ 8.0 _ 80.0 Quiescent Supply Current Vine 55 _ 1.35 _ 14 my Alec otter input Vt oy OND 55 _ _ 1.35 _ 15 mA * This spec indicates the capability of driving 50Q transmission lines. One output should be tested at a time for a 10ms maximum duration. 232 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.TC74ACT240,244 Octal Bus Buffers IEC Logic Symbol TC74ACT240 TC7T4ACT244 1G Mal ey wat 2) > vp 11 v1 a2 4 | 8) 12 12 4a3 8] 14) 1% 13 sag 8] 2) 1%4 14 26 9 en aar WN bY Ao ay 2yi ang 118) | p 7) ae 2y2 ong 15) | 6) 2% 2Y3 ona 12 | 8) 2a 2v4 AC Electrical Characteristics (C, = S0pF, Ry = 500Q, Input t, = t = 3ns) Ta = 25C Ta = -40~85C PARAMETER SYMBOL TEST CONDITION UNIT Vec Min. Typ. Max. Min. Max. Propagation Delay Time pe _ 5.0405 57 8.0 10 9.0 Output Enable Time pe 5.0405 _ 6.0 9.0 10 105 ns p Output Disable Time pe _ 5.040.5 _ 59 85 1.0 10.0 p Input Capacitance Cin _ _ _ 5 10 _ 10 Output Capacitance Cout _ _ _ 10 _ _ , Power Dissipation Capacitance) Cpp! _ 25 _ = _ P Power Dissipation Capacitance**@) Cpp! _ _ 29 _ _ Note (1): Cpp is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: loc jopy = Cpp * Voc fin + loo/B8{per bit). (2): * For TC74AC240 only. ** For TC74AC244 only. TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. 233