Basic JTAG functionality utilizing this adapter should
result in no apparent performance degradation. The
additional advanced features supported on the new 60-
pin interface connector and Next Generation Emulator
are not supported when using this adapter.
Damage
As with any component, damage can occur if the
adapter is mishandled, misused or forced into place.
Should your adapter become damaged for any reason,
Texas Instruments recommends the purchase of a new
adapter. Damaged adapters should be discarded to
prevent future use.
Upgrades
Upgrades to Texas Instruments' emulation adapters are
not planned. These adapters are provided for a limited
time until a sufficient amount of proper tools are
available to interface with the new emulation
connector.
Disclaimers
Read the following for important information to be
aware of:
•Successful use of Texas Instruments next genera-
tion emulation interface for HS-RTDX and trace
capture requires the use of good engineering
design practices when developing target interface
boards.
•Connector choice is extremely important, exces-
sive insertion and removal forces will reduce the
life of your interface. Follow the connector manu-
facturer's specifications for pad placement, layout
and processing. Failure to do so may result in the
shorting of connections, poor processing and
potential damage to your target or emulator / pod
assembly.
•Texas Instruments is not responsible for co-pla-
narity problems in manufacturing where connec-
tor assembly is concerned. Choose your printed
circuit board plating material wisely.
•Target board impedance mismatch and the results
of such a mismatch can be detrimental to the per-
formance of the emulation platform, amongst
other potential problems.
•Excessive capacitance loading due to long trace
lengths, added vias, connectors or test points
causes reduced performance and less than ade-
quate results. Minimize the capacitive loading on
every trace to and from the header.
Texas Instruments has taken into account a reasonable
amount of skew for its new emulation interface and
supporting new hardware. Excessive signal skew may
cause undesirable results. This is a costly correction
and usually requires the respin of a target board.
Spend the appropriate amount of time up front to
validate your design.
Logic (Schematic) Details
Figure 3 represents the logic design and pinout for the
14-pin target to 60-pin emulator adapter.
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