1-2-1 2-Phase Stepper Motor Unipolar Driver ICs SLA7050M/SLA7051M/SLA7052M 2-Phase/1-2 Phase Excitation, Built-in Sequencer Absolute Maximum Ratings (Ta=25C) Ratings Parameter Symbol SLA7050M SLA7051M Unit SLA7052M Motor Supply Voltage VM 46 V Load Supply Voltage VS 46 V Logic Supply Voltage VCC 6 IO Logic Input Voltage VIN -0.3 to VCC+0.3 V REF Input Voltage VREF -0.3 to VCC+0.3 V Sense Voltage VRS -2 to +2 V PD1 4 (Without Heatsink) W PD2 20 (TC=25C) W Tj +150 C Power Dissipation Junction Temperature 1 V Output Current 2 3 A Operating Ambient Temperature Ta -20 to +85 C Storage Temperature Tstg -30 to +150 C Recommended Operating Conditions Ratings Parameter Symbol Motor Supply Voltage min. Unit max. VM 44 V Remarks Load Supply Voltage VS 10 44 V Logic Supply Voltage VCC 3.0 5.5 V The VCC surge voltage should be 0.5V or lower. REF Input Voltage VREF 0.1 1.0 V The control current precision is degraded at 0.1V or lower. Case Temperature TC 100 C Temperature at pin-10 Lead (Without heatsink) Electrical Characteristics (VCC = 5V, V S = 24V, Ta = 25C, unless otherwise specified) Ratings Parameter Symbol SLA7050M min. typ. ISS Main Supply Current Output MOSFET Breakdown Voltage Output MOSFET ON Resistance Maximum Clock Frequency Fclock Logic Input Voltage Logic Input Current 0.5 1.2 1.1 2.3 ISD=1A ISD=3A 100 100 VCC*0.25 100 VCC*0.25 VCC*0.75 VCC*0.25 VCC*0.75 1 1 1 IIH 1 1 1 VREFS 0 1.5 Normal-operation current control 2 VCC Conditions V ID=3A IIL Conditions mA 0.27 ID=1A VCC*0.75 3 VS=44V, IDSS=1mA 0.85 ISD=1A A 100 VS=44V, IDSS=1mA ID=1A VIL VREF REF Input Voltage VS=44V, IDSS=1mA VSD VIH 3 100 0 1.5 Normal-operation current control 2 VCC mA 100 Sleep mode 3 Conditions Unit max. 15 Sleep mode 100 typ. 100 Sleep mode RDS (ON) min. Normal operation 100 Conditions Conditions SLA7052M max. Normal operation ICC Output MOSFET Diode Forward Voltage typ. 15 Normal operation IS VDSS min. 15 Conditions Conditions Logic Supply Current SLA7051M max. 0 V kHz V A 1.5 Normal-operation current control 2 VCC V Output OFF (sleep) Output OFF (sleep) REF Input Current IREF 10 10 10 Sense Voltage VRS VREF VREF VREF V PWM OFF Time TOFF 12 12 12 S 5 S S PWM Minimum ON Time Sleep - Enable Recovery Time TON (min) TSE Conditions TONC Switching Time Conditions TOFFC Conditions 98 ICs 5 Output OFF (sleep) 5 100 100 100 VREF : 2.01.5V, IO : 0.75A VREF : 2.01.5V, IO : 1.5A VREF : 2.01.5V, IO : 2.0A 2.5 2.5 2.5 ClockOut ClockOut ClockOut 2.0 2.0 2.0 ClockOut ClockOut ClockOut http://store.iiic.cc/ A S SLA7050M/SLA7051M/SLA7052M Internal Block Diagram and Pin Assignment 15 NC 5 16 17 OutB MIC 7 OutB/ 14 GB 11 12 Vcc Vs 4 Clock 3 Full/Half CW/CCW 2 GA NC OutA/ OutA 1 18 Pin No. Symbol 1 OutA Phase A output 2 NC No Connection 3 OutA/ Phase A output 4 GA No Connection 5 VCC Logic supply 6 SenseA 7 Clock Step Clock input 8 Sync Synchronous PWM control signal input 9 Ref 10 GND 11 CW/CCW 12 Full/Half Full/Half Step control input 13 SenseB Phase B current sense 14 VS Load supply (motor supply) 15 GB No Connection 16 OutB/ Phase B output 17 NC No Connection 18 OutB Phase B output Function Reg GA GB Sequencer GA/ GB/ OSC OSC PWM Control Synchro Control PWM Control Sleep Circuit 10 13 SenseB GND 8 Sync 9 REF SenseA 6 Truth Table L H CW/CCW CW CCW Full/Half Full Half REF Enable Disable Sync Asynchronous Synchronous Phase A current sense Control current setting & output OFF Device GND Normal/reverse control input Clock * REF terminal turns into normal operation at VREF < 1.5V. The output is disabled (Output OFF) at VREF > 2V. Typical Connection Diagram . Rs=0.1 to 2 (Power dissipation should be: P=.IO2 x RS) R1=10k CA=100F/50V R2=5.1k (VR) CB=10F/10V Q1:T.B.D Vs=10~44V CA 15 OutB NC 14 OutB/ 4 17 16 18 Vcc * VCC line noise precaution: The device may malfunction if the VCC line noise exceeds 0.5V. * Be sure to connect the unused logic input terminals (CW/CCW, F/H, Sync) to VCC or GND. If they are open, the device will malfunction. * GND pattern precaution: Separating the VCC system GND (S-GND) and VS system GND (P-GND) from the device GND (10-Pin) helps to reduce noise. r1 Q1 7 Microcomputer, etc. Vs 2 GB 3 GA Disable CB 5 NC OutA/ OutA 1 Vcc=3.0~5.5V SLA7050M SLA7051M SLA7052M Clock 11 CW/CCW 12 Full/Half 8 Sync 9 REF SenseB 10 GND RsA SenseA 6 r2 13 RsB P-GND S-GND External Dimensions (ZIP18 with Fin [SLA18Pin]) +0.2 +0.2 0.65 -0.1 1 -0.1 17xP1.680.4=28.561 +0.2 +0.2 0.65 -0.1 1 -0.1 +0.2 0.55 -0.1 40.7 2.20.6 60.6 7.50.6 4.6 0.6 +0.2 +1 (3) R-End 3 0.6 2.450.2 0.55 -0.1 1.6 0.6 Part Number Lot No. 4.8 0.2 1.70.1 6.70.5 9.9 0.2 16 0.2 13 0.2 3.20.15x3.8 9.7 -0.5 310.2 24.40.2 16.40.2 3.20.15 (Unit : mm) 17xP1.680.4=28.561 31.30.2 123 . . . . . . . 18 1 2 3 . . . . . . . 18 Forming No. No.871 Forming No. No.872 Product Mass : Approx.6g http://store.iiic.cc/ ICs 99