Description
The A8513 is a single-output white LED (WLED) driver for
LCD backlighting. It integrates a current-mode boost converter
with an internal power switch and one current sink. The A8513
can operate from a single power supply from 4.5 to 40 V,
to accommodate start/stop, cold crank, and load dump
requirements. A 2 MHz boost converter switching frequency
allows the A8513 to operate above the AM radio band.
If required, the fault flag can be used as part of a circuit to drive
an external P-FET to disconnect the input supply from the system
in the event of a fault. The A8513 provides protection against
output short and overvoltage, open or shorted diode, open or
shorted LED pin, shorted boost switch or inductor, shorted
ISET resistor, and IC overtemperature. A dual level cycle-by-
cycle current limit function provides soft start and protects the
internal current switch against high current overloads.
The A8513 is provided in a 10-pin MSOP package (suffix LY)
and a 16-pin TSSOP package (suffix LP). Both packages have
an exposed thermal pad for enhanced thermal dissipation, and
are lead (Pb) free, with 100% matte tin leadframe plating.
A8513-DS Rev. 2
Features and Benefits
• AEC-Q100 Qualified
• Wide input voltage range of 4.5 to 40 V for start/stop,
cold crank and load dump requirements
• Boost converter switching frequency up to 2 MHz,
allowing operation above the AM band
• Excellent input voltage transient response
• Internal secondary OVP for redundant protection
• Fully integrated LED current sink and boost converter with
60 V DMOS FET
• Maximum LED current of 150 mA
• Drives up to 14 series LEDs
• Single EN/PWM pin interface for PWM Dimming and
Enable function
• 5000:1 PWM dimming at 200 Hz
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
Packages:
Typical Application Circuit
Not to scale
A8513
Continued on the next page…
10-pin MSOP
with exposed thermal pad
(LY package)
16-pin TSSOP
with exposed thermal pad
(LP package)
Applications:
• LCD backlighting for:
Automotive infotainment
Automotive cluster
Automotive center stack
Industrial LCD displays
Portable DVD players
Flatbed Scanners
LED Lighting
SW
OVP
VOUT
ROVP1
ROVP2
VIN
VDD
CVDD
COUT
EN/PWM
ISET
GND
COMP
LED
FAULT
PAD
A8513
VC
RISET
CIN
L1 D1
CP
VIN
RZ (Optional)
CZ (Optional)
Boost fSW
(MHz) VIN (min)
(V) LEDs per
String (max)
0.25/0.5/1 5 14
21014
2812
26 9
25 7
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
2
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Absolute Maximum Ratings*
Characteristic Symbol Notes Rating Unit
LED Pin VLED –0.3 to 55 V
OVP Pin VOVP –0.3 to 60 V
VIN and ¯
F
¯
¯
A
¯¯¯
U ¯¯
L
¯
¯
T
¯
Pins VIN
, VFAULT -0.3 to 40 V
SW Pin VSW
Continuous –0.6 to 60 V
t < 50 ns –1.0 V
ISET Pin VISET –0.3 to 5.5 V
All Other Pins –0.3 to 7 V
Operating Ambient Temperature TARange K –40 to 125 ºC
Maximum Junction Temperature TJ(max) 150 ºC
Storage Temperature Tstg –55 to 150 ºC
*Stresses beyond those listed in this table may cause permanent damage to the device. The Absolute Maximum ratings are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the Electrical
Characteristics table is not implied. Exposure to Absolute Maximum-rated conditions for extended periods may affect device reliability.
Features and Benefits (continued)
Selection Guide
Part Number Oscillator Frequency, fSW
(MHz) Packing* Package
A8513KLYTR-T 2 4000 pieces per 13-in. reel
10-pin MSOP with exposed thermal pad
A8513KLYTR-1-T 1
Contact factory for availabilityA8513KLYTR-2-T 0.5
A8513KLYTR-3-T 0.25
A8513KLPTR-T 2 4000 pieces per 13-in. reel
16-pin TSSOP with exposed thermal pad
A8513KLPTR-1-T 1
Contact factory for availabilityA8513KLPTR-2-T 0.5
A8513KLPTR-3-T 0.25
*Contact Allegro® for additional packing options
• Fault flag pin to alert the controller to a myriad of possible
fault conditions
• Protection Features:
Shorted output
Open or shorted LED pin
Output undervoltage and overvoltage
Input undervoltage
Shorted boost switch or inductor
Shorted ISET resistor
Open boost Schottky
Overtemperature
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
3
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
LP Package LY Package
Pin-out Diagram
Terminal List Table
Name Number Function
LP LY
COMP 15 10 Output of the error amplifier and compensation node. Connect compensation network from
this pin to GND for control loop compensation.
¯
F
¯
¯
A
¯¯¯
U ¯¯
L
¯
¯
T
¯ 64
This pin is used to indicate fault conditions. Logic low indicates that the A8513 has
a fault present.
GND 13,14 9 Ground.
ISET 12 8 Connect the RISET resistor between this pin and GND to set the 100% LED current level.
LED 10 6 Connect the cathode of the LED string to this pin.
NC 1,2,8,9,16 – No connection.
OVP 4 2 This pin is used to sense an overvoltage condition. Connect a resistive divider from the
VOUT node to this pin to adjust the Overvoltage Protection (OVP).
PAD – – Exposed pad of the package providing enhanced thermal dissipation. This pad must be
connected to the ground plane(s) of the PCB with at least 8 thermal vias, directly in the pad.
EN/PWM 11 7 PWM dimming pin. Used to control LED intensity by using pulse width modulation.
SW 3 1 The drain of the internal NMOS switch of the boost converter.
VDD 7 5 Output of internal LDO. Connect a 0.1 F decoupling capacitor between this pin and GND.
VIN 5 3 Input power to the A8513.
SW
OVP
VIN
FAULT
VDD
COMP
GND
ISET
EN/PWM
LED
1
2
3
4
5
10
9
8
7
6
PAD
NC
NC
SW
OVP
VIN
FAULT
VDD
NC
NC
COMP
GND
GND
ISET
EN/PWM
LED
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
PAD
Thermal Characteristics*may require derating at maximum conditions, see application information
Characteristic Symbol Test Conditions* Value Unit
Package Thermal Resistance
(Junction to Ambient) RJA
LP package
On 4-layer PCB based on JEDEC standard 34 ºC/W
On 2-layer PCB with 3.8 in.2 of copper area each side 43 ºC/W
LY package
On 4-layer PCB based on JEDEC standard 48 ºC/W
On 2-layer PCB with 2.5 in.2 of copper area each side 48 ºC/W
Package Thermal Resistance
(Junction to Pad) RJP 2 ºC/W
*To be verified by characterization. Additional thermal information available on the Allegro® website.
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
4
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
VDD
Regulator
UVLO
Internal
Soft Start
Enable
PWM
Enable
Short
LED Detect
ISET
Fault
LED
Driver
1.235 V
Ref
Driver
Circuit
Internal VCC
Internal VCC
VREF
Internal VCC
VREF
VREF
ISS
Thermal
Shutdown
ISS
100 k
Enable
Current
Sense
Diode
Open
Sense
OVP
Sense
Oscillator
SW
VIN
COMP
EN/PWM
GND
ISET
OVP
LED
FAULT
+
–
+
–
+
–
+
–
Functional Block Diagram
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
5
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
ELECTRICAL CHARACTERISTICS1 Valid at VIN = 16 V, TA = 25ºC, indicates specifications guaranteed through the full
operating temperature range with TA = TJ = –40ºC to125 ºC, typical specifications are at TA = 25ºC; unless otherwise specified
Characteristics Symbol Test Conditions Min. Typ. Max. Unit
Input Voltage Specifications
Operating Input Voltage Range VIN 4.5 40 V
VIN Pin UVLO Start Threshold VUVLOrise VIN rising 4.35 V
VIN Pin UVLO Stop Threshold VUVLOfall VIN falling 3.90 V
VIN Pin UVLO Hysteresis VUVLOhys 450 mV
Input Current
Input Quiescent Current IQEN/PWM = VIH , SW = 2 MHz, no load 5mA
Input Sleep Supply Current IQSLEEP VIN = 16 V, EN/PWM = 0 V 110A
Input Logic Levels (EN/PWM and ¯
F
¯
¯
A
¯¯¯
U ¯¯
L
¯
¯
T
¯
3)
Input logic Level (Low) VIL 5 V < VIN < 40 V 400 mV
Input logic Level (High) VIH 5 V < VIN < 40 V 1.5 V
EN/PWM Pull-Down Resistor REN/PWM EN/PWM = 5 V 100 k
¯
F
¯
¯
A
¯¯¯
U ¯¯
L
¯
¯
T
¯
Pin Pull-Down Voltage VFAULT IFAULT = 0.5 mA 0.4 V
¯
F
¯
¯
A
¯¯¯
U ¯¯
L
¯
¯
T
¯
Pin Leakage Current IFAULTlkg VFAULT = 5 V 1A
Error Amplifier
Open Loop Voltage Gain AVOL 45 dB
Transconductance gmICOMP = ±10 A 990 A/V
Source Current IEA(SRC) VCOMP = 1.5 V –360 A
Sink Current IEA(SINK) VCOMP = 1.5 V 360 A
COMP Pin Pull-Down Resistance RCOMP ¯
F
¯
¯
A
¯¯¯
U ¯¯
L
¯
¯
T
¯
asserted 2000
Output Overvoltage Protection
Overvoltage Protection Threshold VOVPHI(th) Measured at OVP Pin 1.168 1.218 1.268 V
OVP Pin Leakage Current IOVPH
Standard CMOS input, measured at
VOVP = 1.2 V 100 nA
OVP Pin Undervoltage Threshold VUVP(th) Measured at OVP Pin 110 mV
Secondary Overvoltage Protection VOVP(sec) Measured at SW Pin 53 55.5 58 V
BOOST Switch
Switch On-Resistance RDS(on)SW ISW = 750 mA, VIN = 16 V 450 800 m
Switch Leakage Current ISWlkg
VSW = 16 V, EN/PWM = VIL
, TA = TJ
between –40ºC and 85ºC 0.1 1 uA
VSW = 16 V, EN/PWM = VIL , TA = TJ = 125ºC 10 uA
Switch Current Limit ISW(LIM) 1.9 2.2 2.8 A
Secondary Switch Current Limit ISW(LIM2)
Higher than ISW(LIM)(max) in all conditions,
A8513 latches when detected 3 3.5 4.64 A
Minimum Switch On-Time tSW(ON) 75 100 ns
Minimum Switch Off-Time tSW(OFF) 55 85 ns
Continued on the next page…
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
6
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Oscillator Frequency
Oscillator Frequency fSW
A8513KLYTR-1-T, A8513KLPTR-1-T 1.8 2 2.2 MHz
A8513KLYTR-2-T, A8513KLPTR-2-T 0.9 1 1.1 MHz
A8513KLYTR-3-T, A8513KLPTR-3-T 450 500 550 kHz
A8513KLYTR-4-T, A8513KLPTR-4-T 225 250 275 kHz
LED Current Sinks
LED Accuracy ErrLED ISET = 150 A3%
LED Regulation Voltage VLED ISET = 150 A880 mV
ISET to ILED Current Gain AISET ISET = 150 A 1014 1045 1076 A/A
ISET Pin Voltage VISET 1.003 V
Allowable ISET Current ISET 40 160 A
Soft Start LED Current Gain AILEDSS
Current through enabled LED pin during
soft start 48 A/A
Maximum PWM Dimming Off-Time tPWML
Measured while EN/PWM = low during
dimming control, and internal references
are powered-on (exceeding tPWML results in
shutdown)
16 ms
Minimum PWM On-Time tPWMH First cycle when powering-up A8513 1.5 3 s
EN/PWM High to LED-On Delay tdPWM(on)
Time between PWM enable and when LED
current reaches 90% of maximum;
VPWM = 0 → 2 V
250 500 ns
EN/PWM Low to LED-Off Delay tdPWM(off)
Time between PWM enable going low
and when LED current reaches 10% of
maximum; VPWM = 2 → 0 V
250 500 ns
Thermal Protection (TSD)
Thermal Shutdown Threshold2TTSD Temperature rising 165 ºC
Thermal Shutdown Hysteresis2 T
TSDHYS 20 ºC
1For input and output current specifications, negative current is defined as coming out of the node or pin (sourcing), and positive current is defined as
going into the node or pin (sinking).
2Ensured by design and characterization, not production tested.
3 ¯
F
¯
¯
A
¯¯¯
U ¯¯
L
¯
¯
T
¯
pin is high voltage tolerant
ELECTRICAL CHARACTERISTICS1 (continued) Valid at VIN = 16 V, TA = 25ºC, indicates specifications guaranteed through the
full operating temperature range with TA = TJ = –40ºC to125 ºC, typical specifications are at TA = 25ºC; unless otherwise specified
Characteristics Symbol Test Conditions Min. Typ. Max. Unit
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
7
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Characteristic Performance
-55 -5 45 14595 -55 -5 45 14595
-55 -5 45 14595 -55 -5 45 14595
4.345
4.295
4.245
4.195
4.145
4.095
4.045
3.995
3.945
3.855
3.805
3.755
3.705
3.655
3.605
3.555
3.505
VUVLOrise (V)
VUVLOfall (V)
VIN UVLO Rising Threshold Voltage
2.20
2.15
2.10
2.05
2.00
1.95
1.90
1.85
1.80
Switch Frequency
10
9
8
7
6
5
4
3
2
1
0
IQSLEEP (μA)
fSW (MHz)
Temperature (°C) Temperature (°C)
Temperature (°C) Temperature (°C)
VIN Input Sleep Mode Current
versus Ambient Temperature versus Ambient Temperature
versus Ambient Temperature
VIN UVLO Falling Threshold Voltage
versus Ambient Temperature
VIN = 40 V
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
Efficiency, η (%)
Input Voltage, VIN (V)
Efficiency Versus Input Voltage
ILED = 90 mA, LED Vf ≈ 3.2 V
Efficiency Versus Input Voltage
ILED = 150 mA, LED Vf ≈ 3.2 V
7856 9 1112 1410 13 15 16 17 18 19 2120 22
Input Voltage, VIN (V)
7856 9 1112 1410 13 15 16 17 18 19 2120 22
Efficiency, η (%)
5 series LEDs; VOUT = 17 V
6 series LEDs; VOUT = 20 V
7 series LEDs; VOUT = 23 V
5 series LEDs; VOUT = 17 V
6 series LEDs; VOUT = 20 V
7 series LEDs; VOUT = 23 V
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
8
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
-55 -5 45 14595
Temperature (°C) Temperature (°C)
-55 -5 45 14595
PWM dimming only
PWM + ana
l
og dimming
100
10
1
0.1
0.10
151.0
150.8
150.6
150.4
150.2
150.0
149.8
149.6
LED Current Rao (%)
PWM Duty Cycle (%)
Normalized LED Current Rao versus PWM Duty Cycle
fPWM = 200 Hz, VIN = 12 V, 6 series LEDs (
≈
21 V, 150 mA)
LED Current versus Ambient Temperature
ILED = 150 μA
0.01 0.10 1 10 100
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
Swch Current, ISW (A)
Switch Current Limit versus Ambient Temperature
LED Current, ILED (mA)
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
9
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
The A8513 incorporates a current-mode boost controller with
internal DMOS switch, and a single LED current sink. It can be
used to drive an LED string of up to 14 white LEDs in series,
with current up to 150 mA. For optimal efficiency, the output of
the boost stage is adaptively adjusted to the minimum voltage
required to power the LED string. This is expressed by the fol-
lowing equation:
VOUT = VLED + VREG (1)
where
VLED is the voltage drop across the LED string, and
VREG is the regulation voltage of the LED current sink (typically
0.88 V at the maximum LED current).
Enabling the IC
The IC turns on when a logic high signal is applied to the
EN/PWM pin (figure 1), and turns off when this pin is pulled to
a logic low. For the device to be enabled, the voltage on the VIN
pin must be greater than VUVLOrise to clear the undervoltage lock-
out (UVLO) threshold (figure 2). Before startup, the A8513 goes
through a system check to determine if there are any fault condi-
tions that would prevent the system from functioning correctly.
Powering up: LED pin short to GND check
After the VIN pin goes above VUVLOrise , the IC checks if the LED
pin is shorted to GND by pre-charging the LED pin (figure 3).
When the voltage on the LED pin exceeds 260 mV, the A8513
proceeds with soft start. If a short is present on the LED pin, the
IC will not power up until the short is removed. At this time the
output is also checked for a VOUT short, using the OVP pin. If the
OVP pin does not rise above VOVPLO(th) the IC will not power up.
Soft start function
During soft start, the COMP pin delivers a steady 80 uA current,
the LED pin current gain is set to AILEDSS . The lower gain will
help limit the inrush current generated by charging the output
Functional Description
Figure 1. Start-up by slowly ramping up EN/PWM with VIN at 16 V; shows
VOUT (ch1, 10 V/div.), ILED (ch2, 50 mA/div.), COMP (ch3, 1 V/div.), and
EN/PWM (ch4, 2 V/div.), time = 2 ms/div.
Figure 2. Start-up by slowly ramping up VIN with EN/PWM at 2 V; shows
VOUT (ch1, 10 V/div.), ILED (ch2, 50 mA/div.), COMP (ch3, 1 V/div.), and
EN/PWM (ch4, 2 V/div.), time = 2 ms/div.
t
VOUT
EN/PWM
ILED
COMP
C4
C3
C1
C2
t
VOUT
EN/PWM
ILED
COMP
C4
C3
C1
C2
UVLO threshold
exceeded
Figure 3. LED detection period; shows ¯
F
¯
¯
A
¯¯¯
U ¯¯
L
¯
¯
T
¯
(ch1, 5 V/div.), VLED (ch2,
1 V/div.), ILED (ch3, 100 mA/div.), and EN/PWM (ch4, 5 V/div.),
time = 500 s/div.
t
EN/PWM
ILED
VLED
C4
C1
C2
C3
LED detection
FAULT
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
10
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
capacitors. After the A8513 senses there is enough voltage on the
LED pin, it increases the LED current to the preset regulation
current. The COMP pin will continue to source 80 uA until the
LEDs are able to run at the full preset current level.
Boost converter frequency
The switching frequency of the boost regulator is preset internally
to one of four frequencies. The frequency options are:
Part Number
Switching Frequency (fSW)
(MHz)
A8513KLYTR-1-T 2
A8513KLYTR-2-T 1
A8513KLYTR-3-T 0.5
A8513KLYTR-4-T 0.25
LED current setting and LED dimming
The LED current, ILED
, is set using the ISET pin, and can range
from 40 to 150 mA. Connect a resistor, RISET , between this pin
and GND to set the ILED current, according to the following
formula :
ILED =RISET
× AISET
VISET
=RISET × 1045
1.003 V
(2)
where ILED is in A and RISET is in .
This formula sets the maximum current through the LEDs, which
is referred to as the 100% current.
PWM dimming
The LED current can be reduced from the 100% current level by
PWM dimming using the EN/PWM pin. When the EN/PWM pin
is pulled high, the A8513 turns on and the LED pin sinks 100%
current (figure 4). When EN/PWM is pulled low, the boost con-
verter and LED sink are turned off. The compensation (COMP)
pin is floated, and critical internal circuits are kept active.
The A8513 has very fast turn-on and turn-off times during PWM
dimming to minimize low PWM duty cycle errors. The typical
PWM signal delay tdPWM(on) is 250 ns (figure 5). The typical
tdPWM(off) time, between the PWM signal and the LED current
going low, is shown in figure 6.
Analog dimming
The A8513 can also be dimmed by using an external DAC or
other voltage source applied either directly to the ground side of
the RISET resistor or through an external resistive divider to the
Figure 4. Typical PWM dimming sequence, with PWM dimming frequency
of 1000 Hz and 10% duty cycle; shows COMP (ch1, 1 V/div.), VLED (ch2,
10 V/div.), ILED (ch3, 100 mA/div.), and EN/PWM (ch4, 5 V/div.),
time = 500 s/div.
Figure 5. Typical EN/PWM signal (5 V/div.) to LED current (100 mA/div.)
turn-on delay. The delay measured about 250 ns. VIN is 12 V, VOUT for 10
series LEDs is approximately 36 V, ILED is 150 mA. (time = 500 ns/div.)
Figure 5. Typical EN/PWM signal (5 V/div.) to LED current (100 mA/div.)
turn-off delay. The typical delay is about 250 ns. (time = 500 ns/div.)
t
VLED
EN/PWM
ILED
COMP
C4
C1
C2
C3
t
EN/PWM
ILED
C4
C3
t
EN/PWM
ILED
C4
C3
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
11
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
ISET pin. The limitation of this form of dimming is that the inter-
nal ISET error amplifier is designed to work from 40 to 160 A,
thus limiting the dimming ratios that can be achieved.
Figure 7, top panel is a typical application using a DAC to control
the LED current using a single resistor connected to the ISET pin.
The ISET current is controlled by the following formula:
ISET =
VISET – VDAC
RISET
(3)
Where VISET is the ISET pin voltage and VDAC is the DAC out-
put voltage.
When the DAC voltage is equal to VISET
, the internal reference,
there is no current through RISET . When the DAC voltage starts
to decrease, the ISET current starts to increase, thus increasing
the LED current. When the DAC voltage is 0 V, the LED current
will be at its maximum.
• For a dual-resistor configuration (lower panel of figure 7), the
ISET current is controlled by the following formula:
ISET =–
VISET
RISET
VDAC – VISET
R1
(4)
The advantage of this circuit is that the DAC voltage can be
higher or lower, thus adjusting the LED current to a higher or
lower value of the preset LED current set by the RISET resistor:
VDAC = 1.003 V; the output is strictly controlled by RISET
VDAC > 1.003 V; the LED current is reduced
VDAC < 1.003 V; the LED current is increased
Output Overvoltage Protection (OVP) and Output
Undervoltage Protection (UVP)
The A8513 has output overvoltage protection (OVP), output
undervoltage protection and secondary overvoltage protection
(open diode).
Overvoltage Protection The OVP pin has a threshold, VOVPHI(th)
,
of 1.218 V. A resistive divider can be used to set the VOUT over-
voltage protection threshold up to 45 V (see figure 8). There is
no restriction on the value of the resistor chosen, but it is recom-
mended that the divider current be kept between 10 and 60 A.
This will minimize the effect of sense current on the accuracy of
OVP, and minimize output voltage bleed-off during PWM dim-
ming.
Formulas for calculating the OVP resistor voltage divider are
shown below.
R
OVP1 = (VOVP – 1.218 V) / ISET (5)
ROVP2 = 1.218 V / ISET (6)
The OVP function is not inherently a latched fault. If the OVP
condition occurs during a load dump, the IC will stop switching
but not shut down.
Figure 7. Simplified diagram of voltage LED current control (upper) single
resistor, and (lower) dual resistors.
Figure 8. Simplified diagram of the OVP pin functions.
GND
DAC
VDAC
GND
A8513
ISET
GND
DAC
VDAC
GND
A8513
ISET
R
ISET
R1
R
ISET
OVP
VOUT
ROVP1
ROVP2
A8513
1.218 V
100 mV
+
–
+
–
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
12
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A
B
t
VOUT
EN/PWM
ILED
C4
C2
C1
C3
FAULT
The OVP condition can become a latched fault if, during an OVP
event, the LED current is not in regulation. This typically occurs
during an open LED string situation. If both faults occur simul-
taneously the IC will shut down and the fault flag will be set (see
figures 9, 10, and 11).
Undervoltage Protection The OVP pin is also used to detect
output undervoltage protection (UVP) against VOUT short to
GND. When the UVP fault is tripped, the fault flag is set (fig-
ure 12). Using an external PMOSFET interfaced to the ¯
F
¯
¯
A
¯
¯
U
¯
¯
L
¯
¯
T
¯
pin (figure 13), the user can disconnect the IC from VIN during a
fault event.
Figure 9. Open LED condition during PWM dimming. (A) The LED string
(ch3, 100 mA/div.) is opened (no current flow through the LED pin) during
an off-period for the PWM dimming signal (ch4, 5 V/div.). (B) At the next
PWM cycle, the LED open condition is detected and the A8513 starts
boosting the output voltage (ch1, 10 V/div.). (C) Upon reaching the OVP
threshold and sensing no LED current flow, the A8513 shuts down and
sets the fault flag (ch2, 5 V/div.). (time = 10 ms/div.)
Figure 10. Open LED condition when PWM duty cycle is 100%. (A) The
LED string (ch3, 200 mA/div.) is opened (no current flow through the LED
pin). (B) The A8513 starts boosting the output voltage (ch1, 20 V/div.).
(C) Upon reaching the OVP threshold there is still no current flow through
the LED pin, and the A8513 shuts down and sets the fault flag (ch2,
5 V/div.). The LED pin voltage is ch4, 2 V/div. (time = 50 s/div.)
Figure 11. Power-up into an open LED situation. (A) A8513 enabled,
(B) fault flag (ch2, 5 V/div.) is set when OVP threshold is reached. Shows
VOUT (ch1, 20 V/div.), ILED (ch3, 100 mA/div.), and EN/PWM (ch4,
5 V/div.), time = 1 ms/div..
Figure 12. Input disconnect switch function during an output short. (A) VOUT
(ch1, 10 V/div.) falls during VOUT short to ground, (B) high peak current
present due to short, before the PMOSFET (ch3, 5 V/div.) is disconnected.
Shows input current (ch2, 10 A/div.) and fault flag (ch4, 5 V/div.),
time = 50 s/div.
Figure 13. typical circuit for input disconnect switch.
t
VOUT
PMOSFET Gate
IIN
C3
C4
C1
C2
FAULT
A
B
1
V
IN
A8513
AO4421
2N7002 FAULT
5V
L1
10
1k
k
k
t
VOUT
EN/PWM
ILED
C4
C2
C1
C3
A
B
C
FAULT
A
B
C
t
VOUT
ILED
VLED
C4
C1
C2
C3
A
B
C
FAULT
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
13
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Secondary Overvoltage Protection The A8513 has secondary
overvoltage protection for the internal boost switch in the event
of an open diode condition. If the voltage on the SW pin exceeds
the device safe operating voltage rating, the A8513 is disabled
and remains latched off (figure 14). The EN/PWM pin must be
brought low longer than tPWML to clear this fault.
Boost switch overcurrent protection
The boost switch is protected with cycle-by-cycle current limit-
ing set to ISW(LIM) (figure 15). There is also a secondary current
limit that is sensed on the boost switch. When this current limit
is exceeded, the A8513 immediately shuts down (figure 16). The
secondary current limit is above the cycle-by-cycle current limit
and protects the switch from destructive currents if the boost
inductor is shorted.
Figure 14. Secondary Overvoltage protection tripped when the switching
diode is opened during operation. (A) High voltage is detected on SW
node (ch1, 20 V/div.) and the A8513 is shut down. (B) Fault flag is set
(ch2, 5 V/div.). Shows LED current (ch3, 100 mA/div.), time = 500 ns/div.
t
ILED
VSW
C1
C2
C3
FAULT
A
B
Figure 15. Cycle-by-cycle current limit, inductor current is C3 (1 A/div.).
(A) Fault flag (ch1, 5 V/div.) is not set during cycle-by-cycle current limit,
(B) COMP pin signal (C2, 2 V/div.) is close to 3.6 V. (time = 1 ms/div.)
Figure 16. Secondary current limit during an inductor short condition.
(A) limit is reached, (B) the IC shuts down and the fault flag is set. Shows
fault flag (c1, 5 V/div.), switch node voltage (C2, 20 V/div.), and current
through the inductor (C3, 2 A/div.); time = 1 s/div.
t
IL
VSW
C2
C1
C3
FAULT
A
B
Normal operation Inductor Short
A
B
C
t
COMP
IL
C2
C1
C3
FAULT
A
B
Cycle-by-cycle inductor current limit
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
14
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Input UVLO
When VIN rises above the UVLO threshold VUVLOrise, the A8513
can be enabled by asserting EN/PWM. The A8513 is disabled
when VIN falls below VUVLOfall – VUVLOhys for more than 1 s
(figure 17). This 1 s lag prevents false shut downs during
momentary glitches on the input power supply.
VDD
The VDD pin provides regulated bias supply for internal circuits.
Connect a capacitor, CVDD , with a value of 0.01 to 0.1 F to
this pin.
Shutdown
If the EN/PWM pin is pulled low for more than tPWML , the
device enters shutdown mode and clears all internal fault regis-
ters. In shutdown, the A8513 will disable all current sources and
wait until EN/PWM goes high to re-enable the IC.
Figure 17. Input UVLO. (A) UVLO tripped (VIN, ch1, 2 V/div.), (B) fault flag
set (ch2, 2 V/ div.). Shows LED current (ch3, 100 mA/div.) and EN/PWM
(ch4, 1 V/div.), time = 5 ms/div.
A
B
t
ILED
EN/PWM
VIN
C4
C1
C2
C3
FAULT
A
B
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
15
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Fault protection during operation
The A8513 constantly monitors the state of the system to deter-
mine if any fault conditions occur. The response to a triggered
fault condition is summarized in the table below.
Note: Some of the protection features might not be active during
startup, to prevent false triggering of fault conditions.
The latching faults can be cleared in two ways:
• Keep the EN/PWM pin low for more than 16 ms.
• Cycle the power to create a UVLO condition.
Fault behavior diagrams are shown in figures 18, 19 and 20.
Fault Mode Table
Fault Name Type Active Fault
Flag Set Description Boost Sink
driver
Primary Switch
Current Protection
(cycle-by-cycle
current limit)
Auto-restart Always No
This fault condition is triggered by the cycle-by-cycle
current limit ISW(LIM)
. Prevents current in inductor from
exceeding ISW(LIM)
.
Off for a single
cycle On
Secondary Switch
Current Limit Latched Always Yes
When the current through the boost switch exceeds
the secondary current SW limit, ISW(LIM2)
, the A8513
immediately shuts down.
Off Off
Secondary OVP Latched Always Yes
Secondary overvoltage protection is used for open
diode detection. When diode D1 opens, the switch pin
voltage will increase until VOVP(sec) is reached.
Off Off
LED Pin Short
Protection Auto-restart Startup Yes
This fault prevents the A8513 from starting-up if
the LED pin is shorted to ground. After the short is
removed, soft-start is allowed to begin.
Off Off
ISET Short
Protection Auto-restart Always Yes
This fault occurs when the ISET current goes above
150% of the maximum Allowable ISET Current,
ISET(max). The boost will stop switching and the IC will
disable the LED sinks until the fault is removed. When
the fault is removed, the IC tries to regulate to the
preset LED current.
Off Off
LED String Open
Protection Latched Always Yes
This fault occurs when the OVP pin exceeds the
VOVPHI(th) threshold. The A8513 immediately stops
switching. If at the same time, the LED voltage is below
regulation, the IC will shut down.
Off Off
Output Overvoltage
Protection Auto-restart Always No
This fault occurs when the OVP pin exceeds VOVPHI(th)
threshold (for example, during a load dump). The
A8513 immediately stops switching, but continues to
sink current through the LED pin.
Off On
Output
Undervoltage
Protection
Auto-restart Always Yes This fault occurs when the OVP pin senses less than
110 mV on the pin. Off Off
Overtemperature
Protection Auto-restart Always Yes This fault occurs when the die temperature exceeds
TTSD
.Off Off
VIN UVLO NA Always
Yes until
internal
regulator
shuts down
This fault occurs when VIN drops below VUVLOfall
. This
fault resets all latched faults. Off Off
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
16
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
ISET Short to Ground Recovery from ISET Short to Ground
OVP Tripped During Load Dump
Figure 18. ¯
F
¯
¯
A
¯¯¯
U ¯¯
L
¯
¯
T
¯
(ch1, 5 V/div.), VSW (ch2, 20 V/div.), ILED (ch3,
100 mA/div.), and ISET (ch4, 1 V/div.), time = 1 s/div.
Figure 20. VIN (ch1, 20 V/div.), VOUT (ch2, 20 V/div.), and VSW (ch3,
20 V/div.), ¯
F
¯
¯
A
¯¯¯
U ¯¯
L
¯
¯
T
¯
(ch4, 5 V/div.), time = 2 ms/div.
Figure 19. ¯
F
¯
¯
A
¯¯¯
U ¯¯
L
¯
¯
T
¯
(ch1, 5 V/div.), ILED (ch2, 100 mA/div.), and ISET (ch3,
1 V/div.), time = 2 ms/div.
A
B
t
ILED
ISET
VSW
C4
C2
C1
C3
FAULT
A
B
t
VOUT
VIN
VSW
C1
C3
C4
C2
FAULT
t
ILED
ISET
C3
C1
C2
FAULT
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
17
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Design Example
This section provides a method for selecting component values
when designing an application using the A8513. A typical circuit
using this design is shown in figure 21.
Assumptions: For the purposes of this example, the following are
given as the application requirements:
• VIN: 5 to 16 V
• Quantity of series LEDs, #SERIESLEDS: 6
• LED current, ILED: 120 mA
• Vf at 120 mA: 3.2 V
• fSW: 2 MHz
• TA(max): 85°C
• PWM dimming frequency: 200 Hz with a minimum duty cycle
of 1%.
Procedure: Select the appropriate configuration and the individual
component values in an ordered sequence.
Step 1: Connect the series LED string from VOUT to the LED
pin.
Step 2: Determine the value for the ILED setting resistor, RISET
:
RISET = VISET × AISET/ ILED (7)
= (1.003 × 1045) / 120 mA = 8.74 k
Choose an 8.66 k resistor.
Step 3: Determine the values of the OVP resistors. The OVP
resistors are connected between the OVP pin and the output volt-
age (VOUT) and the OVP pin and ground.
Step 3a: The first step is to determine the maximum voltage
based on the LED Vf requirements. To this value the regulation
voltage should be added, as well as another 2 V to account for
noise, output ripple, and resistor tolerances. The regulation volt-
age, VLED
, of the A8513 is 880 mV. Then:
VOUT(OVP) = #SERIESLEDS × Vf + VLED + 2 V (8)
= 6 × 3.2 V+ 0.880 V + 2 V
= 22.08 V
To find the OVP resistor values, the user should choose a resis-
tor divider that has very low current (IOVP) and ROVP should be
approximately 1 M. A good starting point is 50 A as IOVP .
(The IOVP current is used later in calculating the total leakage
current.) Then
:
ROVP1 = (VOUT(OVP) – VOVPHI(th) ) / IOVP (9)
= (22.08 V – 1.218 V) / 50 A = 417.2 k
and:
ROVP2 = VOVPHI(th) / IOVP (10)
= 1.218 V / 50 A = 24.36 k
Choose a value of resistor that is higher value than the calculated
ROVP . In this case 422 k was selected. Below is the actual value
of the minimum OVP trip level with the selected resistor:
VOUT(OVP) = ROVP × IOVP × VOVPHI(th) (11)
= 422 k × 50 A + 1.218 V = 22.32 V
STEP 3b: At this point a quick check should be done to determine
if the conversion ratio is acceptable for the selected frequency:
Dmaxofboost = 1 – tSW(OFF) × fSW (12)
= 1 – 85 ns × 2 MHz = 83%
where the Minimum Switch Off-Time, tSW(OFF) , is found in the
Electrical Characteristics table.
The Theoretical Maximum VOUT is then calculated as:
VOUT(max) Vd
=–
1 – Dmaxofboost
VIN(min)
0.4 V 29.01 V
==–
1 – 0.83
5 V
(13)
where Vd is the diode forward voltage.
The Theoretical Maximum VOUT value must be greater than the
value VOUT(OVP) . If this is not the case, a lower frequency ver-
sion of the A8513 should be chosen to meet the maximum duty
cycle requirements.
Step 4: Inductor selection. The inductor should be chosen such
that it can handle the necessary input current. In most applica-
tions, due to stringent EMI requirements, the system must operate
in continuous conduction mode throughout the whole input volt-
age range.
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
18
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Step 4a: Determine the Duty Cycle:
D(max) Vd
=+
VIN(min)
VOUT(OVP)
78%
==
22.32 V + 0.4 V
1 –
1 –
5 V
(14)
where Vd is the voltage drop of the boost diode.
Step 4b: Determine the maximum and minimum input current to
the system. The minimum input current will dictate the inductor
value. The maximum current rating will dictate the current rating
of the inductor. Given IOUT = ILED = 120 mA:
IIN(max) =
VIN(min)
VOUT(OVP) IOUT
H
0.595 A
==
22.32 V
5 V 0.9
120 mA
(15)
where is efficiency. Next, calculate minimum input current, as
follows:
IIN(min) =
VIN(max)
VOUT(OVP) IOUT
H
0.19 A
==
22.32 V
16 V 0.9
120 mA
(16)
A good approximation of efficiency can be taken from the effi-
ciency curves located in the data sheet. A value of 90% is a good
starting approximation.
STEP 4c: Determine the inductor value.
To assure that the inductor operates in continuous conduction
mode the value of inductor should be set such that the ½ inductor
ripple current is not greater than the average minimum input cur-
rent. A good inductor choice for inductor ripple current is 30% of
the maximum input current:
IL = IIN(max) × 0.3 (17)
= 0.595 A × 0.3 = 0.18 A
then:
L=
VIN(min) D(max)
fSW
IL
10.83 H
0.18 A
==
0.78
5 V
2 MHz
(18)
Double-check to make sure the ½ current ripple is less than
IIN(min):
IIN(min) > 1/2 IL (19)
0.19 A > 0.09 A
A good inductor value to use would be 10 H.
Step 4d: This step verifies that there is sufficient slope compensa-
tion for the inductor chosen. The required slope compensation
value for different frequencies is listed below:
fSW
(MHz)
Slope Compensation
(A/s)
2 3.73
1 1.85
0.500 3.70
0.250 1.83
Next insert the inductor value used in the design:
=
VIN(min) D(max)
fSW
Lused
ILused
10 H0.20 A
==
0.78
5 V
2.0 MHz
(20)
Calculate the minimum required slope:
=
(1 – D(max))
(1 – 0.78)
f
SW
Required Slope (min) I
Lused
0.20 A
1
1
1
10
–6
110
–6
==
1.8 A/s
2.0 MHz
(21)
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
19
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
For a stable system, the required minimum slope must be smaller
than the IC slope compensation.
Note: The slope compensation value is in A/s; the 1×10-6 is a
constant multiplier.
STEP 4e: Determine the inductor current rating :
ILminimum rating = IIN(max) + 1/2 ILused (22)
= 0.595 A + 0.20 A / 2 = 0.695 A
Step 5: Choose the proper switching diode. The switching diode
should be chosen for three characteristics when it is used in LED
lighting circuitry. The first and most obvious are the current
rating of the diode and the reverse voltage rating. The reverse
voltage rating should be such that during operation condition the
voltage rating of the device is larger than the maximum output
voltage; in this case it is VOUT (OVP)
. The peak current through
the diode is:
Idp = IIN(max) + 1/2 ILused (23)
= 0.595 A + 0.20 A / 2 = 0.695 A
The third major component in deciding the switching diode is the
reverse current, IR , characteristic of the diode. This characteristic
is especially important when PWM dimming is implemented.
During PWM off-time the boost converter is not switching. This
results in a slow bleeding off of the output voltage, due to leakage
currents. IR can be a large contributor, especially at high tempera-
tures. On the diode that was selected in this design, the current
varies between 1 and 100 A.
Step 6: Choose the output capacitors. The output capacitors
should be chosen such that they provide filtering for both the
boost converter and for the PWM dimming function. The biggest
factors that contribute to the size of the output capacitor is PWM
dimming frequency and the PWM duty cycle. Another major
contributor is leakage current, Ilkg . This current is a combination
of the OVP resistor divider, IOVP , and the reverse leakage of the
switching diode. In this design the PWM dimming frequency is
200 Hz and the minimum duty cycle is 1%. Typically the voltage
variation on the output during PWM dimming must be less than
250 mV (VCOUT) so that no audible noise can be heard. The
capacitance can be calculated as follows:
COUT =
fPWM(dimming)
1 – Ddimming(min)
1 – 0.01
200 Hz
Ilkg
120 A 2.38 F
==
0.250 V
VCOUT
(24)
A capacitor larger than 2.38 F capacitor should be selected due
to degradation of capacitance at high voltages on the capacitor.
One ceramic 4.7 F, 50 V capacitor is a good choice to fulfill this
requirement. Corresponding capacitors include:
Vendor Value Part number
Murata 4.7 F 50 V GRM32ER71H475KA88L
Murata 2.2 F 50 V GRM31CR71H225KA88L
The rms current through the capacitor is given by:
ICOUTrms =
1 – D(max)
D(max) + IL
IOUT
0.120 A 0.23 A
12
==
IIN(max)
1 – 0.78
0.78 + 0.20 A
0.595 A
12
(25)
The output capacitor should have a current rating of at least
230 mA. The current rating of the 4.7 F, 50V capacitor is 1.5 A.
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
20
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
SW
OVP
VOUT
ROVP1
ROVP2
VIN
VDD
CVDD
COUT
EN/PWM
ISET
GND
COMP
LED
FAULT
PAD
A8513
RZ
CZ
VC
RISET
CIN
4.7 F
50 V
4.7 F
50 V
0.47 F
10 H
0.1 F
120 pF
100 k
8.66 k
120
422 k
24.3 k
L1
D1
CP
VIN
STEP 7: Select the input capacitor. The input capacitor should be
selected such that it provides good filtering of the input voltage
waveform. A good rule of thumb is to set the input voltage ripple,
VIN to be 1% of the minimum input voltage. The minimum
input capacitor requirements are as follows:
CIN =
fSW
0.20 A
IL
0.25 F
8
==
VIN
2 MHz 0.05 V
8
(26)
The rms current through the capacitor is given by:
IINrms =
(1 – D(max))
IOUT × IL
0.05 A
12
==
IIN(max)
(1 – 0.78)
0.120 × 0.20 A
0.595 A
12
(27)
A good ceramic input capacitor with ratings of 2.2 F, 50V or
4.7 F, 50 V will suffice for this application. Corresponding
capacitors include:
Vendor Value Part number
Murata 4.7 F 50 V GRM32ER71H475KA88L
Murata 2.2 F 50 V GRM31CR71H225KA88L
Figure 21. A typical circuit designed using the example above in this section.
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
21
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Typical Application Drawings
SW
OVP
VOUT
ROVP1
ROVP2
VIN
VDD
CVDD
COUT
EN/PWM
ISET
GND
COMP
LED
FAULT
PAD
A8513
RZ (Optional)
CZ (Optional)
RISET
CIN RP
R7
L1
R1
D1
CP
VIN
R1 is used to provide a leakage path such that the OVP pin is above 100 mV during startup.
Otherwise the IC would assume the output is shorted to GND and would not proceed with soft start.
A
A
SW
OVP
VOUT
ROVP1
ROVP2
VIN
VDD
CVDD
COUT
CSW
EN/PWM
ISET
GND
COMP
LED
FAULT
PAD
A8513
RZ (Optional)
CZ (Optional)
VC
RISET
CIN
L1
R1 L2
D1
D2
CP
VIN = 9 to 16 V
R1 is used to provide a leakage path such that the OVP pin is above 100 mV during startup.
Otherwise the IC would assume the output is shorted to GND and would not proceed with soft start.
D2 is a blocking diode.
AB
A
B
Figure 22. Typical application showing boost configuration and PMOS disconnect switch implementation
Figure 23. Typical application showing SEPIC configuration
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
22
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Package LP, 16-Pin TSSOP
with Exposed Thermal Pad
A
1.20 MAX
0.15
0.00
0.30
0.19
0.20
0.09
8º
0º
0.60 ±0.15
1.00 REF
C
SEATING
PLANE
C0.10
16X
0.65 BSC
0.25 BSC
21
16
5.00±0.10
4.40±0.10 6.40±0.20
GAUGE PLANE
SEATING PLANE
ATerminal #1 mark area
B
For Reference Only; not for tooling use (reference MO-153 ABT)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
B
C
Exposed thermal pad (bottom surface); dimensions may vary with device
6.10
0.65
0.45
1.70
3.00
3.00
16
21
Reference land pattern layout (reference IPC7351
SOP65P640X110-17M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
PCB Layout Reference View
C
Branded Face
3 NOM
3 NOM
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
23
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Package LY, 10-Pin MSOP
with Exposed Thermal Pad
Terminal #1 mark area
A
Gauge Plane
Seating Plane
0.86 ±0.05
SEATING
PLANE
0.50
REF
0.25
21
10
21
10
A
B
C
C
0.53 ±0.10
0.15 ±0.05
0.05
0.15
0° to 6°
3.00 ±0.10
3.00 ±0.10 4.88 ±0.20 1.73 4.60
1.98
1.98 MIN
1.73
21
10
1
0.30 0.50
1.65
0.27
0.18
For Reference Only; not for tooling use (reference JEDEC MO-187BA-T)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
B
Exposed thermal pad (bottom surface)
Reference land pattern layout (reference IPC7351 SOP50P490X110-11M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
W ide Input Voltage Range, High Ef ficiency
Fault Tolerant LED Driver
A8513
24
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Copyright ©2011-2012, Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per-
mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;
nor for any in fringe ment of patents or other rights of third parties which may result from its use.
Revision History
Revision Revision Date Description of Revision
Rev. 2 January 18, 2012 Update Features List
