XU XU Family of Low Phase Noise Quartz-based PLL Oscillators Description Features The XU devices are low phase noise quartz-based PLL oscillators supporting a large range of frequencies and output interface types. These devices are designed to operate at three different power supplies and are available in multiple package sizes as well as temperature grades. With a patented one-time program (OTP) allowing for infinite memory shelf life, the XU devices can be programmed to generate an output frequency from 16kHz to 1500MHz with a resolution as low as 1Hz accuracy. The configuration capability of this family of devices allows for fast delivery times for both sample and large production orders. Datasheet Frequency range: 0.016MHz to 1500MHz Output types: LVDS, LVPECL, HCSL, LVCMOS Supply voltage options: 1.8V, 2.5V, or 3.3V Phase jitter (1.875MHz to 20MHz): 100fs typical Phase jitter (12kHz to 20MHz): 300fs typical Package options: -- 5.0 x 3.2 x 1.2 mm -- 7.0 x 5.0 x 1.3 mm Operating temperature: -20C to +70C -- Frequency stability options: 20, 25, 50, or 100 ppm Operating temperature: -40C to +85C -- Frequency stability options: 25, 50, or 100 ppm Operating temperature: -40C to +105C -- Frequency stability options: 50 or 100 ppm Pin Assignments E/D / NC 1 6 VDD NC / E/D 2 5 OUT2 GND 3 E/D 1 NC 1 2 3 4 5 6 NC GND 2 4 OUT Table 1. 6-pin Package Pin # 4 VDD 3 OUT Table 2. 4-pin Package Pin Name Description Pin # Pin Name Description E/D NC NC E/D GND OUT OUT2 VDD Enable/Disable [a,b] No connect No connect Enable/Disable [a,b] Connect to ground Output Complementary output Supply voltage 1 2 3 4 E/D GND OUT VDD Enable/Disable [a,b] Connect to ground Output Supply voltage (c)2018 Integrated Device Technology, Inc. [a] Pulled high internally = output enabled. [b] Low = output disabled. See Ordering Information for more details. 1 June 25, 2018 XU Datasheet Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the device. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Table 3. Absolute Maximum Ratings Item Rating VDD E/D OUT Storage Temperature Maximum Junction Temperature Core Current Theta JA Theta JB -0.5 to +5.0V -0.5V to VDD + 0.5V -0.5V to VDD + 0.5V -55C to 125C 125C 65mA maximum 75.9 C/W 48.6C/W JU6 JS6 89.6 C/W 54.3 C/W ESD Compliance Table 4. ESD Compliance Human Body Model (HBM) 1000V Mechanical Testing Table 5. Mechanical Testing * Parameter Test Method Mechanical Shock Half-sine wave with 0.3ms 3000G. X, Y, Z each direction 1 time. Mechanical Vibration Frequency: 10 to 55MHz amplitude: 1.5mm. Frequency: 55-2000Hz peak value: 20G. Duration time: 4H for each X,Y,Z axis; total 12hours. High Temp Operating Life (HTOL) 2000 hours at 125C (under power). Hermetic Seal Gross leak (air leak test). Fine leak (Helium leak test) He-pressure: 6kgf/cm 2 hours. * MSL level does not apply. Solder Reflow Profile tP 10 seconds Max within 5C of 260C peak 260C Ramp up 3C/s Max 225C 50 10 seconds above 225C reflow area 180C 160C Ramp down not to exceed 6C/s 120 20 seconds in pre-heating area 25C 400 seconds Max from +25C to 260C peak (c)2018 Integrated Device Technology, Inc. 2 June 25, 2018 XU Datasheet DC Electrical Characteristics Note for all DC Electrical Characteristics tables: A pull-up resistor from VDD to E/D enables output when pin 1 is left open. Table 6. 3.3V IDD DC Electrical Characteristics VDD = 3.3V 5%, TA = -20C to +70C; -40C to +85C, -40C to +105C. Symbol Parameter Output Type LVDS IDD Current Consumption LVPECL HCSL LVCMOS Conditions Minimum Typical Maximum 0.016MHz to 400MHz. 97 400.000+MHz to 1.5GHz. 122 0.016MHz to 212.5MHz. 115 212.5+MHz to 400MHz. 128 400+MHz to 670MHz. 142 0.016MHz to 670MHz. 145 0.016MHz to 62.5MHz. 98 62.5+MHz to 167MHz. 108 Units mA Table 7. 2.5V IDD DC Electrical Characteristics VDD = 2.5V 5%, TA = -20C to +70C; -40C to +85C, -40C to +105C. Symbol Parameter Output Type LVDS LVPECL IDD Current Consumption HCSL LVCMOS (c)2018 Integrated Device Technology, Inc. Conditions Minimum Typical Maximum 0.016MHz to 400MHz. 90 400.000+MHz to 1.35GHz. 103 0.016MHz to 156.25MHz. 102 156.25+MHz to 400MHz. 112 400+MHz to 670MHz. 118 0.016MHz to 400MHz. 102 400.000+MHz to 670MHz. 112 0.016MHz to 62.5MHz. 80 62.5+MHz to 125MHz. 85 125+MHz to 167MHz. 92 3 Units mA June 25, 2018 XU Datasheet Table 8. 1.8V IDD DC Electrical Characteristics VDD = 3.3V 5%, TA = -20C to +70C; -40C to +85C, -40C to +105C. Symbol Parameter Output Type LVDS IDD Current Consumption LVPECL HCSL LVCMOS Conditions Minimum Typical Maximum 0.016MHz to 400MHz. 65 400.000+MHz to 1.0GHz. 72 0.016MHz to 250MHz. 75 250.000+MHz to 670MHz. 97 0.016MHz to 400MHz. 68 400.000+MHz to 670MHz. 77 0.016MHz to 125MHz. 58 Units mA Table 9. LVDS DC Electrical Characteristics VDD = 3.3V, 2.5V, 1.8V 5%, TA = -20C to +70C; -40C to +85C, -40C to +105C. Below are guaranteed for listed standard frequencies. Symbol Parameter VOD Differential Output Voltage VOS Output Offset Voltage VIH Enable/Disable Input High Voltage VIL Enable/Disable Input Low Voltage Conditions Minimum Typical Maximum 0.25 0.4 0.5 1 1.17 1.375 70%VDD Units V 30%VDD Table 10. LVPECL DC Electrical Characteristics VDD = 3.3V, 2.5V, 1.8V 5%, TA = -20C to +70C; -40C to +85C, -40C to +105C. Below are guaranteed for listed standard frequencies. Symbol VOH VOL Parameter Output High Voltage Output Low Voltage VIH Enable/Disable Input High Voltage VIL Enable/Disable Input Low Voltage (c)2018 Integrated Device Technology, Inc. Conditions Minimum Typical Maximum VDD = 3.3V 5%. 1.85 2.3 VDD = 2.5V 5%. 1.1 1.45 VDD = 1.8V 5%. 0.5 0.8 VDD = 3.3V 5%. 1.1 1.65 VDD = 2.5V 5%. 0.35 0.85 VDD = 1.8V 5%. 0 0.25 Units V 70%VDD 30%VDD 4 June 25, 2018 XU Datasheet Table 11. HCSL DC Electrical Characteristics VDD = 3.3V, 2.5V, 1.8V 5%, TA = -20C to +70C; -40C to +85C, -40C to +105C. Below are guaranteed for listed standard frequencies. Symbol VOH Parameter Output High Voltage VOL Output Low Voltage VIH Enable/Disable Input High Voltage VIL Enable/Disable Input Low Voltage Conditions Minimum Typical Maximum VDD = 3.3V 5%. 0.6 1.1 VDD = 2.5V 5%. 0.55 0.95 VDD = 1.8V 5%. 0.45 0.7 0 0.2 Units V 70%VDD 30%VDD Table 12. LVCMOS DC Electrical Characteristics VDD = 3.3V, 2.5V, 1.8V 5%, TA = -20C to +70C; -40C to +85C, -40C to +105C. Below are guaranteed for listed standard frequencies. Symbol Parameter VOH Differential Output Voltage VOL Output Offset Voltage VIH Enable/Disable Input High Voltage VIL Enable/Disable Input Low Voltage (c)2018 Integrated Device Technology, Inc. Conditions Minimum Typical Maximum Units 90%VDD 10%VDD 70%VDD V 30%VDD 5 June 25, 2018 XU Datasheet AC Electrical Characteristics Table 13. 3.3V AC Electrical Characteristics VDD = 3.3V 5%, TA = -20C to +70C; -40C to +85C, -40C to +105C. Symbol F Parameter Output Frequency Range Frequency Stability Minimum 1500 LVPECL, HCSL. 0.016 670 LVCMOS. 0.016 167 Temperature = -20C to +70C. 20 100 ppm Temperature = -40C to +85C. 25 100 ppm Temperature = -40C to +105C. 50 100 ppm TA = 25C. 3 Aging (10 years) TA = 25C. 10 Start-up Time Output Rise Time LVDS. Differential. 100 LVPECL. VDD - 2.0V. 50 HCSL. To GND. 50 LVCMOS. To GND. 15 Output valid time after VDD meets minimum specified level. LVPECL. 275 20% to 80% Vpk-pk. LVPECL. ODC Output Clock Duty Cycle 275 80% to 20% Vpk-pk. TOE fJITTER 3 90% to 10% VDD. 45 55 FOUT < 312.5MHz. 45 55 FOUT > 312.5MHz. 40 60 45 55 FOUT < 62.5MHz. 45 55 FOUT > 62.5MHz. 40 60 100 LVDS. 300 400 LVPECL. 300 400 HCSL. 300 400 300 400 LVCMOS. (c)2018 Integrated Device Technology, Inc. ns 380 400 Output Enable/ Disable Time Phase Jitter (12kHz-20MHz) ps ps 330 HCSL. LVCMOS. 380 3 10% to 90% VDD. LVDS. LVPECL. ms 330 HCSL. LVCMOS. pF 400 HCSL. MHz 10 LVDS. Output Fall Time Units 0.016 LVCMOS. tF Maximum LVDS. LVDS. tR Typical Aging (1st year) Output Load TST Test Condition FOUT = 100MHz. 6 ns % ns fsec June 25, 2018 XU Datasheet Table 14. 2.5V AC Electrical Characteristics VDD = 2.5V 5%, TA = -20C to +70C; -40C to +85C, -40C to +105C. Symbol F Parameter Output Frequency Range Frequency Stability Minimum 1350 LVPECL. 0.75 670 HCSL. 0.016 670 LVCMOS. 0.016 167 Temperature = -20C to +70C. 20 100 ppm Temperature = -40C to +85C. 25 100 ppm Temperature = -40C to +105C. 50 100 ppm TA = 25C. 3 Aging (10 years) TA = 25C. 10 Start-up Time Output Rise Time LVDS. Differential. 100 LVPECL. VDD - 2.0V. 50 HCSL. To GND. 50 LVCMOS. To GND. 15 Output valid time after VDD meets minimum specified level. LVPECL. 20% to 80% Vpk-pk. LVPECL. LVPECL. Output Clock Duty Cycle fJITTER 630 3 10% to 90% VDD. 80% to 20% Vpk-pk. 300 400 360 630 3 90% to 10% VDD. 45 55 FOUT < 156.25MHz. 45 55 FOUT < 156.25MHz. 40 60 45 55 FOUT < 62.5MHz. 45 55 FOUT > 62.5MHz. 40 60 Output Enable/ Disable Time Phase Jitter (12kHz-20MHz) 100 LVDS. 400 500 LVPECL. 350 500 HCSL. 350 500 350 500 LVCMOS. (c)2018 Integrated Device Technology, Inc. ps ns ps 315 HCSL. LVCMOS. TOE 250 ms 315 LVDS. ODC 400 HCSL. LVCMOS. pF 300 HCSL. MHz 10 LVDS. Output Fall Time Units 0.016 LVCMOS. tF Maximum LVDS. LVDS. tR Typical Aging (1st year) Output Load TST Test Condition FOUT = 100MHz. 7 ns % ns fsec June 25, 2018 XU Datasheet Table 15. 1.8V AC Electrical Characteristics VDD = 1.8V 5%, TA = -20C to +70C; -40C to +85C, -40C to +105C. Symbol F Parameter Output Frequency Range Frequency Stability Minimum 1000 LVPECL, HCSL. 0.016 670 LVCMOS. 0.016 125 Temperature = -20C to +70C. 20 100 ppm Temperature = -40C to +85C. 25 100 ppm Temperature = -40C to +105C. 50 100 ppm TA = 25C. 3 Aging (10 years) TA = 25C. 10 Start-up Time Output Rise Time LVDS. Differential. 100 LVPECL, HCSL. To GND. 50 LVCMOS. To GND. 10 Output valid time after VDD meets minimum specified level. LVPECL. 20% to 80% Vpk-pk. LVPECL. LVDS. ODC Output Clock Duty Cycle LVPECL. LVCMOS. fJITTER 250 350 5 10% to 90% VDD. 80% to 20% Vpk-pk. 315 250 350 (c)2018 Integrated Device Technology, Inc. ps 320 5 90% to 10% VDD. ns FOUT < 156.25MHz. 45 55 FOUT < 156.25MHz. 40 60 FOUT < 312.5MHz. 45 55 FOUT > 312.5MHz. 40 60 40 60 FOUT < 62.5MHz. 45 55 FOUT > 62.5MHz. 40 60 100 LVDS. 800 1200 LVPECL. 750 1200 HCSL. 100 1200 800 1200 LVCMOS. ps ns 250 Output Enable/ Disable Time Phase Jitter (12kHz-20MHz) ms 320 HCSL. TOE 315 HCSL. LVCMOS. pF 250 HCSL. MHz 10 LVDS. Output Fall Time Units 0.016 LVCMOS. tF Maximum LVDS. LVDS. tR Typical Aging (1st year) Output Load TST Test Condition FOUT = 100MHz. 8 % ns fsec June 25, 2018 XU Datasheet Notes for all AC Electrical Characteristics tables: 1 2 A pull-up resistor from VDD to E/D enables output when pin 1 is left open. Installation should include a 0.01F bypass capacitor placed between VDD and GND to minimize power supply line noise. 3 Stability is inclusive of 25C tolerance, operating temperature range, input voltage change, load change, aging, shock and vibration. 4 Standard LVCMOS frequencies include 10MHz, 12MHz, 12.288MHz, 16MHz, 20MHz, 24MHz, 24.576MHz, 25MHz, 33.333MHz, 40MHz, 48MHz, 50MHz, 100MHz, 125MHz and 156.25MHz. 5 Standard differential frequencies include 100MHz, 106.25MHz, 125MHz, 150MHz, 155.52MHz, 156.25MHz, 200MHz, 212.5MHz, 250MHz, 300MHz, 312.5MHz and 400MHz. Output Waveforms Figure 1. LVDS Output Waveforms Output Levels/Rise Time/Fall Time Measurements TF TR OUTPUT 2 VOS 20% to 80% VOD OUTPUT 1 Oscillator Symmetry VOH OUTPUT 2 OUTPUT 1 VOL 1/2 Period Period (c)2018 Integrated Device Technology, Inc. 9 June 25, 2018 XU Datasheet Figure 2. LVPECL Output Waveforms Rise Time/Fall Time Measurements TF TR VOH OUTPUT 2 20% to 80% OUTPUT 1 VOL Oscillator Symmetry VOH OUTPUT 2 OUTPUT 1 VOL 1/2 Period Period Figure 3. HCSL Output Waveforms Rise Time/Fall Time Measurements TF TR VOH OUTPUT 2 20% to 80% OUTPUT 1 VOL Oscillator Symmetry VOH OUTPUT 2 OUTPUT 1 VOL 1/2 Period Period (c)2018 Integrated Device Technology, Inc. 10 June 25, 2018 XU Datasheet Figure 4. LVCMOS Output Waveforms Rise Time/Fall Time Measurements 10% to 90% 20% to 80% 0V to VDD 10% to 90% Rise Time 20% to 80% Rise Time 90% to 10% Fall Time 80% to 20% Fall Time Oscillator Symmetry On Time 1/2 Period Off Time 1/2 Period 50% VDD Period Package Outline Drawings The package outline drawings are appended at the end of this document and are accessible from the links below. The package information is the most current data available. www.idt.com/document/psc/js6-package-outline-50-x-32-mm-body-11-mm-thick www.idt.com/document/psc/ju6-package-outline-70-x-50-mm-body-13-mm-thick www.idt.com/document/psc/js4-package-outline-50-x-32-mm-body-11-mm-thick www.idt.com/document/psc/ju4-package-outline-70-x-50-mm-body-13-mm-thick (c)2018 Integrated Device Technology, Inc. 11 June 25, 2018 XU Datasheet Ordering Information XU L 5 3 5 125.000000 I Family and ASIC Output Type Package Voltage Precision Frequency Temperature Range I: Industrial range - 40 to +85 C K: Extended industrial range - 40 to +105 C X: Extended commercial range - 20 to +70 C 1: 1.8 VDC 5% 2: 2.5 VDC 5% 3: 3.3 VDC 5% 5: 5.0 x 3.2 mm 7: 7.0 x 5.0 mm 125.000000 Listed in MHz to 6 digits H: HCMOS Enable/Disable Pin 1 J: HCMOS Enable/Disable Pin 2 L: LVDS Enable/Disable Pin 1 M: LVDS Enable/Disable Pin 2 P: LVPECL Enable/Disable Pin 1 Q: LVPECL Enable/Disable Pin 2 N: HCSL Enable/Disable Pin 1 O: HCSL Enable/Disable Pin 2 X: XHCMOS Comp HCMOS Enable /Disable Pin 1 Y: XHCMOS Comp HCMOS Enable/Disable Pin 2 000.016000 MHz to 999.999999 MHz A00.000000 to A99.999999 1000 MHz to 1099.999 MHz B00.000000 to B99.999999 1100 MHz to 1199.999 MHz C00.000000 to C99.999999 1200 MHz to 1299.999 MHz D00.000000 to D99.999999 1300MHz to 1399.999 MHz E00.000000 to E99.999999 1400 MHz to 1499.999 MHz F00.000000 1500 MHz 0: 100 ppm ** 5: 50 ppm ** 6: 25 ppm 8: 20 ppm * XU: 400 fs jitter * 20ppm for X (20C to +70C) only. ** 100ppm and 50ppm for K (40C to +105C) only. (c)2018 Integrated Device Technology, Inc. 12 June 25, 2018 XU Datasheet Revision History Revision Date Description of Change June 25, 2018 Updated Package Outline Drawings section. November 22, 2017 Updated Theta JA and JB in Absolute Maximum Ratings table. Added MSL statement under Mechanical Testing table. Updated ordering information. October 19, 2017 May 12, 2017 Reformatted embedded tables. Removed "Jitter Performance" tables and moved the "Phase Jitter (12kHz-20MHz)" parameter to its respective AC Electrical Characteristics table. Updated all Output Waveform drawings. December 1, 2016 Initial release Updated document title. Updated Features bullets. Updated Absolute Maximum Ratings and ESD Compliance tables. Added -40C to +105C rating to all electrical tables. Removed phase noise charts. Updated Ordering Information table. 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This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT's products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT. Integrated Device Technology, IDT and the IDT logo are trademarks or registered trademarks of IDT and its subsidiaries in the United States and other countries. Other trademarks used herein are the property of IDT or their respective third party owners. For datasheet type definitions and a glossary of common terms, visit www.idt.com/go/glossary. Integrated Device Technology, Inc. All rights reserved. (c)2018 Integrated Device Technology, Inc. 13 June 25, 2018