High Performance 64Kx32 CMOS SRAM AS7C36432 (R) 64Kx32 Synchronous burst SRAM Preliminary information Features * Organization: 65,536 words x 32 bits * Fully synchronous pipelined operation * Flow-through option * Fast clocking speed: 100/75/66 MHz * Fast clock to data access: 5.5/6/7 ns * Self-timed write cycle * On-chip address, control, and data registers * Byte write enable & global write enable control * Asynchronous output enable control * ADSP, ADSC, ADV, MODE burst control pins * PentiumTM or PowerPCTM count sequence * Transparent logic support for 1 or 2 CPUs * Single 3.3 0.3V power supply * 5V safe inputs * ESD protection 2000 volts * Latch-up current 200 mA Logic block diagram Pin arrangement CLK Burst logic CLR 16 A[15:0] D Q CLK D 16 14 16 Address register CE GW BW WE4 64Kx32 Memory array Q1 I/O[32:25] 32 Q 32 Byte Write registers CLK D WE3 I/O[24:17] Q Byte Write registers CLK D WE2 I/O[16:9] Q Byte Write registers CLK D WE1 I/O[8:1] Q 4 Byte Write registers CLK CE1 CE2 CE3 D Enable register Q Output registers CE# CLK D ZZ Power down CLK Enable delay register OE Input registers CLK CLK LE Q 32 OE DATA [32:1] NC I/O16 I/O17 VCCQ GNDQ I/O18 I/O19 I/O20 I/O21 GNDQ VCCQ I/O22 I/O23 FT VCC NC GND I/O24 I/O25 VCCQ GNDQ I/O26 I/O27 I/O28 I/O29 GNDQ VCCQ I/O30 I/O31 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 AS7C36432 PQFP (14mm x 20mm) & TQFP (14mm x 20mm) NC I/O15 I/O14 VCCQ GNDQ I/O13 I/O12 I/O11 I/O10 GNDQ VCCQ I/O09 I/O08 GND NC VCC ZZ I/O07 I/O06 VCCQ GNDQ I/O05 I/O04 I/O03 I/O02 GNDQ VCCQ I/O01 I/O00 NC MODE A5 A4 A3 A2 A1 A0 NC NC GND VCC NC NC A10 A11 A12 A13 A14 A15 NC FT 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 Q0 CE 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 CLK ADV ADSC ADSP A6 A7 CE1 CE2 WE3 WE2 WE1 WE0 CE3 VCC GND CLK GWE BWE OE ADSC ADSP ADV A8 A9 MODE Selection guide Minimum cycle time Maximum clock frequency Maximum pipelined clock access time Maximum operating current Maximum standby current Maximum CMOS standby current (DC) 7C36432-5 10 100 5.5 300 30 8 7C36432-6 13.3 75 6 275 30 8 ALLIANCE SEMICONDUCTOR 7C36432-7 15 66 7 250 30 6 Unit ns MHz ns mA mA mA 1 AS7C36432 Preliminary information (R) Functional description The AS7C36432 is a high performance CMOS 1 Mbit synchronous Static Random Access Memory (SRAM) organized as 65,536 words x 32 bits and incorporates a 2-bit burst counter and output register. It is designed for high performance 3.3V PentiumTM, PowerPCTM, and Cyrix cache applications. Fast cycle times of 10/13/15 ns with clock access times (tCD) of 5.5/6/7 ns are ideal for 100, 75, and 66 MHz bus frequencies. Three chip enable inputs permit easy memory expansion. Burst operation is initiated in one of two ways: the controller address strobe (ADSC), or the processor address strobe (ADSP). The burst advance pin (ADV) allows subsequent internally generated burst addresses. Read cycles are initiated with ADSP (regardless of WE and ADSC) using the new external address clocked into the on-chip address register when ADSP is sampled Low, the chip enables are sampled active, and the output buffer is enabled with OE. In a read operation the data accessed by the current address, registered in the address registers by the positive edge of CLK, are carried to the data-out registers and driven on the output pins on the next positive edge of CLK. ADV is ignored on the clock edge that samples ADSP asserted, but is sampled on all subsequent clock edges. Address is incremented internally for the next access of the burst when WE is sampled High, ADV is sampled Low, and both address strobes are High. Burst operation is selectable with the MODE input. With MODE unconnected or driven High, burst operations use a Pentium/486 count sequence. With MODE driven Low the device uses a linear count sequence, suitable for PowerPC and many other applications (refer to the Burst sequence table on page 2). Write cycles are performed by disabling the output buffers with OE and asserting WE. A global write enable GWE writes all 32 bits regardless of the state of individual WE0-WE3 inputs. Alternately, when GWE is High, one or more bytes may be written by asserting BWE and the appropriate individual byte WE signal(s). WE0 controls I/O0-I/O7; WE1 controls I/O8-I/O15; WE2 controls I/O16-I/O23; and WE3 controls I/O24-I/O31. WE is ignored on the clock edge that samples ADSP Low, but is sampled on all subsequent clock edges. Output buffers are disabled when WE is sampled Low (regardless of OE). Data is clocked into the data input register when WE is sampled Low. Address is incremented internally to the next burst of address if WE and ADV are sampled Low. Read or write cycles may also be initiated with ADSC instead of ADSP. The differences between cycles initiated with ADSC and ADSP follow. * ADSP must be sampled High when ADSC is sampled Low to initiate a cycle with ADSC. * WE signals are sampled on the clock edge that samples ADSC Low (and ADSP High). * Master chip select CE1 blocks ADSP, but not ADSC. The AS7C36432 incorporates a flow-through feature which makes the output registers transparent. Tying the FT pin low enables flowthrough mode and disables pipelined operation. The ZZ sleep mode in the AS7C36432 reduces power consumption in standby mode. The device operates from a single 3.3V0.3V supply. The AS7C36432 is packaged in a 100-pin 14x20 mm PQFP or TQFP package. Write enable truth table (per byte) GWE L X H H BWE X L H L WEn X L X H Asynchronous truth table OE L H WRITEn T T F F I/O [31:0] Read data High Z Note: For write cycles that follow read cycles, output buffers must be disabled with OE to prevent data bus contention. Key: L = Low, H = High. Key: X = Don't Care, L = Low, H = High. Valid read. Burst sequence table Start address Second address Third address Fourth address 00 01 10 11 Mode = High/No Connect Pentium Count Sequence 01 10 00 11 11 00 10 01 Note: The burst sequence wraps around to its initial state upon completion. 2 11 10 01 00 00 01 10 11 Mode = Low Linear Count Sequence 01 10 10 11 11 00 00 01 11 00 01 10 AS7C36432 Preliminary information (R) Signal descriptions Signal CLK A0-A15 I/O0-I/O31 I/O I I I/O CE1 I CE2, CE3 I ADSP ADSC ADV I I I GWE I BWE I WE0-WE3 I OE I MODE I FT I ZZ I Properties CLOCK SYNC SYNC Description Clock. All inputs except OE are synchronous to this clock. Address. Sampled when all chip enables are active and ADSC or ADSP are asserted. Data. Driven as output when the chip is enabled and OE is active. Master chip enable. Sampled on clock edges when ADSP or ADSC is active. When CE1 is SYNC inactive, ADSP is blocked. Refer to the SYNCHRONOUS TRUTH TABLE for more information. Synchronous chip enables. Active High and active Low, respectively. Sampled on clock edges SYNC when ADSC is active or when CE1 and ADSP are active. SYNC Address strobe processor. Asserted Low to load a new bus address or to enter standby mode. SYNC Address strobe controller. Asserted Low to load a new address or to enter standby mode. SYNC Advance. Asserted Low to continue burst read/write. SYNC default Global write enable. Asserted Low to write all 32 bits. When High, BWE and WE0-WE3 = High control write enable. This signal is internally pulled High. SYNC default Byte write enable. Asserted Low with GWE = High to enable effect of WE0-WE3 inputs. This = Low signal is internally pulled Low. Write enables. Used to control write of individual bytes when GWE = High and BWE = Low. SYNC If any of WE0-WE3 is active with GWE = High and BWE = Low the cycle is a write cycle. If all WE0-WE3 are inactive the cycle is a read cycle. Asynchronous output enable. I/O pins are driven when OE is active and the chip is ASYNC synchronously enabled. STATIC Count mode. When driven High, count sequence follows Intel XOR convention. When driven default = Low, count sequence follows Motorola/linear convention. This signal is internally pulled High.18 High Flow-through mode.When low, enables flow-through mode. Connect to VCC if unused or for STATIC pipelined operation. ASYNC Sleep. Places device in low power mode; data is retained. Connect to GND if unused.19 Absolute maximum ratings Parameter Power supply voltage relative to GND Input voltage relative to GND (input pins) Input voltage relative to GND (I/O pins) Power dissipation DC output current Storage temperature (plastic) Temperature under bias Symbol VCC VIN PD IOUT Tstg Tbias Min -0.5 -0.5 -0.5 - - -65 -65 Max +4.6 VCC + 0.5 VCCQ + 0.5 1.2 30 +150 +135 Unit V V V W mA o C oC Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions may affect reliability. Capacitance 1 Parameter Input capacitance I/O capacitance Symbol CIN CI/O Signals Address and control pins, MODE, ZZ I/O pins Test conditions Vin = 0V Vin = Vout = 0V Max 5 7 Unit pF pF 3 AS7C36432 Preliminary information (R) Synchronous truth table CE1 H L L L L L L L L X X X X H H H H L X H X H CE2 X L L X X H H H H X X X X X X X X H X X X X CE3 X X X H H L L L L X X X X X X X X L X X X X ADSP X L H L H L L H H H H H H X X X X H H X H X ADSC L X L X L X X L L H H H H H H H H L H H H H ADV X X X X X X X X X L L H H L L H H X L L H H WRITEn X X X X X F F F F F F F F F F F F T T T T T OE X X X X X L H L H L H L H L H L H X X X H H Address accessed NA NA NA NA NA External External External External Next Next Current Current Next Next Current Current External Next Next Current Current CLK L to H L to H L to H L to H L to H L to H L to H L to H L to H L to H L to H L to H L to H L to H L to H L to H L to H L to H L to H L to H L to H L to H Operation Deselect Deselect Deselect Deselect Deselect Begin read Begin read Begin read Begin read Cont. read Cont. read Suspend read Suspend read Cont. read Cont. read Suspend read Suspend read Begin write Cont. write Cont. write Suspend write Suspend write Key: X = Don't Care, L = Low, H = High, T = TRUE, F = FALSE. See write enable truth table for detailed information. DC operating conditions -5 Parameter Input leakage current* Symbol | ILI | Output leakage current | ILO | Operating power supply current ICC14 ISB Standby power supply current Output voltage ISB1 ISB2 VOL VOH Test conditions VCC = Max, Vin = GND to VCC OE VIH, VCC = Max, Vout = GND to VCC CE1 = VIL, CE2 = VIH, CE3 = VIL, f = fmax, Iout = 0 mA Deselected, f = fmax Deselected, f = 0, all VIN 0.2V or VCC - 0.2V ZZ > VIH IOL = 5 mA, VCC = Max IOH = -5 mA, VCC = Min -6 Max 2 Min - Max 2 Min - Max 2 Unit A - 2 - 2 - 2 A - 300 - 275 - 250 mA - 30 - 30 - 30 mA - 8 - 8 - 6 mA - - 2.4 4 0.4 - - - 2.4 4 0.4 - - - 2.4 4 0.4 - mA V V *FT and ZZ pins have internal pull-up and pull-down resistors, respectively, which create 150A of input leakage; BWE, GWE, and MODE create 50A of input leakage. 4 -7 Min - AS7C36432 Preliminary information (R) Recommended operating conditions Parameter Symbol VCC GND VCCQ GNDQ VIH VIL VIH VIL Ta Supply voltage I/O supply voltage Address and control pins Input voltage Applicable to all portions of this specification unless otherwise noted. I/O pins Ambient operating temperature Min 3.0 0.0 3.0 0.0 2.0 -0.5* 2.0 -0.5* 0 Nominal 3.3 0.0 3.3 0.0 - - - - - Max 3.6 0.0 3.6 0.0 5.5 0.8 VCC+0.5 0.8 70 Unit V V V V V V V C * VIL min = -2.0V for pulse width less than tRC/2. Package dimensions PQFP Min b JEDEC A2 e A1 100 Lead Quad Flatpack PQFP (14mm x 20mm) D Hd L1 E L c He A1 A2 b c D e E Hd He L L1 q TQFP Max MO-108 0.25 0.45 2.57 2.87 0.20 0.40 0.10 0.20 13.90 14.10 0.65 19.90 20.10 17.00 17.40 23.00 23.40 0.65 0.95 1.60 0 10 Min Max MO-136 0.05 0.15 1.35 1.45 0.22 0.38 0.09 0.20 13.90 14.10 0.65 19.90 20.10 15.90 16.10 21.90 22.10 0.45 0.75 1.00 0 7 PCB land pattern C2 D2 This land pattern accommodates both PQFP and TQFP packages. Y C1 D1 A B G1 Z1 X e Notes 1 2 3 4 D G2 Z2 Pad requirement to accommodate two package types is larger than for one package type. All dimensioning and tolerancing conform to ANSI Y14.5M-1982. Dimensions in mm. Datums A--B and --D-- to be determined from the center two leads. Based on the surface mount Design and Land Pattern Standard in IPC-SM-782 rev. A, subsection 11.3, 8/93 for PQFP. Symbol C1 C2 D1 D2 e G1 G2 N X Y Z1 Z2 Description Reference Reference Reference Reference Pad pitch Pad inner dimension Pad inner dimension Pad count Pad width Pad length Pad outer dimension Pad outer dimension TQFP/PQFP Min Max 15.98 ref. 21.98 ref. 12.35 ref. 18.85 ref. 0.65 13.69 13.79 19.69 19.79 100 0.35 0.38 2.24 ref. 18.16 18.26 24.16 24.26 5 AS7C36432 Preliminary information (R) Timing characteristics over operating range -5 Parameter Cycle time (pipelined mode) Clock access time (pipelined mode) Cycle time (flow-through mode) Clock access time (flow-through mode) Output enable to data valid Clock High to output Low-Z Output hold from clock High Output enable Low to output Low-Z Output enable High to output High Z Clock High to output High Z Clock High pulse width Clock Low pulse width Address setup to clock High Address strobe setup to clock High Data setup to clock High Write setup to clock High Address advance setup to clock High Chip select setup to clock High Address hold from clock High Address status hold from clock High Data hold from clock High Write hold from clock High Address advance hold from clock High Chip select hold from clock High Output rise time (unloaded) Output fall time (unloaded) ZZ High to snooze mode Snooze mode recovery Symbol tCYC tCD tCYC tCDF tOE tLZC tOH tLZOE tHZOE tHZC tCH tCL tAS tSS tDS tWS tADVS tCSS tAH tSH tDH tWH tADVH tCSH tR tF tZZ tZZR Min 10 2 2 2 3 3 2 2 2 2 2 2 0.5 0.5 0.5 0.5 0.5 0.5 1 1 tCYC - -6 Max 5.5 14 12.5 4 4.5 4.5 tCYC Min 13 2 2 2 4.5 4.5 2.5 2.5 2.5 2.5 2.5 2.5 0.5 0.5 0.5 0.5 0.5 0.5 1 1 tCYC - -7 Max 6 18 13 5 5 5 tCYC Min 15 2 2 2 5.5 5.5 2.5 2.5 2.5 2.5 2.5 2.5 0.5 0.5 0.5 0.5 0.5 0.5 1 1 tCYC - Max 7 20 14 6 6 6 tCYC Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns V/ns V/ns ns ns Notes 3 5, 8, 15 5, 8 5, 8, 15 5, 8, 15 5, 8, 15 9, 10 9, 10 9, 10 9, 10 9, 10 9, 10 9, 10 9, 10 9, 10 9, 10 9, 10 9, 10 5 5 Notes 1 2 3 4 5 6 7 8 This parameter is guaranteed but not tested. For test conditions, see AC Test Conditions, Figures A, B, C. OE state is "don't care" when a byte write enable is sampled Low. This parameter is sampled and not 100% tested. Read cycle is defined as byte write enables all High or ADSP Low for required setup and hold times. Write cycle is defined as at least one byte write enable Low and ADSP High for required setup and hold times. This is a synchronous device. All addresses must meet the specified setup and hold times for all rising edges of CLK when either ADSP or ADSC is Low and chip enabled. All other synchronous inputs must meet the setup and hold times with stable logic levels for all rising edges of CLK when chip is enabled. Chip enable must be valid at each rising edge of CLK with either ADSP or ADSC Low to remain enabled. Typical values measured at 3.3V, 25C and 20 ns cycle time. All voltages referenced to GND. 6 9 10 11 12 13 14 15 Overshoot: V IH +6.0V for t tCYC/2 Undershoot: VIL -2.0V for t tCYC/2 Power up: VIH +6.0V and VCC 3.1V for t 200 ms ICC given with no output current. ICC increases with faster cycle times and greater output loading. Transitions are measured 500 mV from steady state voltage. Output loading specified with CL = 5 pF as in Figure C. tHZOE is less than tLZOE; and tHZC is less than tLZC at any given temperature and voltage. Deselect = device inactive, in powered-down mode. Otherwise device active (not in powered-down mode). Mode pin exhibits input leakage current of 10A in linear burst mode and has an internal pull-up. At least two clock cycles are required for entry or exit from sleep mode after ZZ assertion. ZZ specifications to comply with Intel documentation. AS7C36432 Preliminary information (R) Key to switching waveforms AAA AAAA AAAA AAAAAAA AAA AAA AAAA AAAA AAAAAAA AAA Rising input AAA AAAA AAAA AAAAAAA AAA Undefined Falling input output/don't care Read waveform tCYC tCL tCH CLK tSS ADSP tSH AAAAAAA AAAAAAA AAAA AAAAAAA AAA AAAAAAA AAAA AAAA AAAA AAAA AAAA AAAAAAAA AAAAAAA AAAAAAAA AAAAAAA AAAA AAAAAAAA AAAA AAAA AAAAAAA AAA AAAAAAAA AAAAAAA AAAAAA t AAAAAA SS AAA AAAAAA AAA t AAAAAAAA AAAAAAAA AAAA AAAAAAAA AAAA AAAAAAAA AAAAAAA AAAAAAA AAAA AAAAAAA AAA AAAAAAA AAAAAAAA AAAAAAAA AAAA AAAAAAAA AAAA AAAAAAAA AAAAAAA AAAAAAA AAAA AAAAAAA AAA AAAAAAA AAAAAAAA AAAAAAAA AAAA AAAAAAAA AAAA AAAAAAAA AAAAAAA AAAAAAA AAAA AAAAAAA AAA AAAAAAA AAAAAAAA AAAAAAAA AAAA AAAAAAAA AAAA AAAAAAAA AAAAAAA AAAAAAA AAAA AAAAAAA AAA AAAAAAA AAAAAAAA AAAAAAAA AAAA AAAAAAAA AAAA AAAAAAAA AAAAAAA AAAAAAA AAAA AAAAAAA AAA AAAAAAA SH AAAAAAAA AAAAAAAA AAAAAA AAAAAA AAAAAAAA AAAA AAAA AAA AAAA AAAAAAAA AAAA AAAA AAA AAAA AAAAAAAA AAAA AAAA AAA AAAA AAAAAAAA AAAA AAAA AAA AAAA AAAAAAA AAA AAAA AAA AAAA AAAAAAA AAA AAAA AAAAAAA AAA AAAAAAA AAAAAAA AAAAAAA AAAAAAA AAAAAAA ADSC AAAA AAAA AAAAAAAA AAAAAAAA AAAAAA AAAAAA AAAAAAAA AAAA AAAA AAAAAAA AAA AAAA AAAAAAAA AAAA AAAA AAAAAAA AAA AAAA AAAAAAAA AAAA AAAA AAAAAAA AAA AAAA AAAAAAAA AAAA AAAA AAAAAAA AAA AAAA AAAAAAA AAA AAAA AAAAAAA AAA AAAA AAAAAAA AAA AAAA AAAAAAA AAA tAS LOAD NEW ADDRESS AAA AAA Address AAA AAA AAA tAH AAAAAAAAAAAAAA AAAA AAAAAAAAAA A1 AAAAAAAAAAAAAA AAAA AAAAAAAA AAAAAAAA AAAAAA AA tWS A2 AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA A3 AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA tWH AAAAAAAA AAAAAAAA AAAAA A AAAA AA AAAA AAA AAAA AAAAAAAA AAAA AAAA AAA AAAA AAAAAAAA AAAA AAAA AAA AAAA AAAAAAAA AAAA AAAA AAA AAAA AAAAAA AAAAAAA AAAAAAA AAAAAAA AAAAAAA GWE, BWE AAAA AAAAAAAA AAAAAAAA AAAAA A AAAA AAAAAA AA AAAA AAAAAAA AAA AAAA AAAAAAAA AAAA AAAA AAAAAAA AAA AAAA AAAAAAAA AAAA AAAA AAAAAAA AAA AAAA AAAAAAAA AAAA AAAA AAAAAAA AAA AAAAAAA AAA AAAA AAA AAAA AAAAAAAA AAAA AAAA AAAAAAA AAA AAAA AAAAAAA AAAA AAAAAAA AAA AAAA AAAAAAA AAA AAAA AAAAAAAA AAAA AAAA AAAAAAA AAA tCSS tCSH AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAA AAAAAAAA AAAA AAAA AAAAAAAA AAAA AAAA AAAAAAA AAA AAAA AAAAAAA AAA AAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA CE2 AAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAA AAAAAAAA AAAA AAAA AAAAAAAA AAAA AAAA AAAAAAA AAA AAAA AAAAAAA AAA AAAA AAA AAAA AAA AAAA AAAAAAA AAA AAAA AAA AAAA AAA AAAA AAAAAAA AAA AAAA CE1, CE3 AAAA AAAA AAAA tADVS AAAAAAAA AAAAAAAA AAAAA A ADV AAAA AAAA AAAAAAAA AAAAAAAA AAAAA A tADVH AAAA AAAA AAAA AAAAAAAA AAAAAAA AAA AAAA AAAAAAAA AAAAAAAA AAAAAAA AAA AAAA AAA AAAA AAA AAAA AAAAAAA AAA AAAA AAA AAAA AAA AAAA AAAAAAA AAA AAAA AAA AAAA AAA AAAA AAAAAAA AAA AAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAA AAA AAAA AAA AAAA AAAAAAA AAA AAAA AAA AAAA AAA AAAA AAAAAAA AAA AAAA AAA AAAA AAA AAAA AAAAAAA AAA AAAAAAAA AAAAA A OE AAAA AAAA AAAAAAAA AAAAA A tCD tHZOE tLZOE tOH tOE DOUT (pipelined mode) t OE Q(A1) ADV INSERTS WAIT STATES tHZC tLZC AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAA AAA Q(A2) Q(A201) Q(A210) Q(A211) Q(A3) Q(A301) Q(A310) Q(A311) AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAA AAA tLZOE DOUT (flow-through mode) Q(A1) AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AA AAAA AAAA AAAAAAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AA Q(A2)AAAAAAAA Q(A201) Q(A210) Q(A211) Q(A3) Q(A301) Q(A310) Q(A311) AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AA tCDF tHZC Note: = XOR when MODE = High/No Connect; = ADD when MODE = Low. Refer to Burst sequence table on page 2. WE[0:3] is don't care. 7 AS7C36432 Preliminary information (R) Write waveform A A A A AA AA AA AA AA AA AA AA A A A A A AA AA AA A A A A A tCYC AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A t t CH A A A A CL AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A CLK A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A t A A AA AA A A AA A A A A A A SS A A AA AA A A AA A A A A A A A A AA AA AA A A A A A AA AA AA AA AA AA AA AA A A A A A AA AA A A AA A A A A tSH A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A AAA A AAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAA AAAAAA A A AAA A AAAA AAA A AAAA AAAA A AAAA AAAA A AAAA AAA AA AAAA AAAA AA AAAA AAA A AAAA AAA A AAAA AAA AA AAAA AAA A AAAA AAA A AAAA AAA A AAAA AA ADSP AAA A AAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAA AAAAAA AA AAA A AAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAA AAAAAA A AA A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA AA AA AA AA AA AA A A A A A AA AA AA A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A tSS A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A t SH A A A A AA AA A A AA A A A A AAA A AAAAAAAA AAAAAAAAAAAAAAAAAAAAAA A AAAAAA A AAAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAAA AAAAAA AAAAAAAAAA AAAAAA A AAA A AAAAAAAA AAAAAAAAAAAAAAAAAAAAAA A AAAAAA A AAAAAAAAAAAAAAAAAA AAAAAAAA AAAAAAAAAAAAAAAAA AAAAAA AAAAAAAAAA AAAAAA A A AAAA AAAA A AAAA AAAA A AAAA AAAA A AAAA AAAA AA A AAAA AAAA AA AAAA AAA A AAAA AAA A AAAA AAA AA AAAA AAA A AAAA AA A AAAA AAAA A AAAA AA ADSC AAA AAAAAAAAAAAAAAAAAAAAAA A A A AAAAAAAAAA AAAAAA AAAAAAAAAA AAAAAA A A AAA A AAAAAA A AAAAAAAAAA A AAAAAAAA A A A AA AAAAAAAAAAA AAAAAAAAA AAAAAAAAA AA A A A A A AA AA AA AA AA A A A A A AA AA A A AA AA AA AA A A A A A AA AA A A AA A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A ADSC LOADS NEW A A tAS A A AA AA A A AA A ADDRESS A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A tAH A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A AAAA AAAA AAAA AAAA AAAA AAAA AAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAAA AAAA AAAA AAA A A A A AA AA A A AA A A A A AAAA AAAA AAAA AAAA AAAA AAAA AAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAAA AAAA AAAA AAA A1 A2 A3 Address AAAAAAAA A A A A AA AA A A AA A A A A AAAA AAAA AAAA AAAA AAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAAA AAAA AAAA AAA A A AAAAAAAA AAAAAAAA A AAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAA A A AAAAAAAA AAAAAAAA A AAAAAAAAAAAAAAAAAAAAA A AAAAAAA A AAAAAAAA AAAA AAAA AAAA A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A t WS A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA AA A tWHAA A A A A AA AA AA AA AA AA AA A AAA A AAAA AAAA A AAAA AA A AAAA AAAA A AAAA AA AA AAAA AAAA AA AAAA AAA A AAAA AA A AAAA AAA AA AAAA AA A AAAA AAA A AAAA AAA A AAAA AA AAA A AAAAAAAA AAAAAAA AAAAAAAAAAAAA A AA AAAAAAAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAAAAAAA A AAAAAAAA AAAAAAAA AAAAAA A A A AAAA AAAA A AAAA AA A AAAA AAAA A AAAA AA AA AAAA AAAA AA AAAA AAA A AAAA AA A AAAA AAA AA AAAA AA A AAAA AAA A AAAA AAA A AAAA AA A WE AAA AAA A A A AA AA A AAAAAAAA AAAAAAA A AAAAAAAAAAAAA A AAAAAAAAAAAA AAAAAAAAAAA AAAAAAAA AAAAAAAAA AAAAAAAA AA AAAAAAAAA AAAAAAAAA AAAAAA A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A AA A AAAAAAAA AAAAAAAAAA AAAAAAAAAAAAAA A AAAAAAAA A AAAAAAAA AAAAAA A AAAAAAAA A AAAAAAAAAAAAAAAAAA A A AAAAAAAA AAAA AAAA AAAA AAAA A A A A AA AA A A AA A A A A AAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA A A AA A AAAAAAAA AAAAAAAAAA A AAAAAAAA A AAAAAAAA AAAAAA A AAAAAAAA A AAAAAAAAAAAAAAAAAAAAA A A AAAA AAAAAAAA AAAAAA AAAAAAAAAAAA AAAA A WE[0:3] AAAA A A A A AA AA A A AA A A A A AAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA A A AA A AAAAAAAA AAAAAAAAAA AAAAAAAAAAAAAA A AAAAAAAA A AAAAAAAA AAAAAA A AAAAAAAA A AAAAAAAAAAAAAAAAAAAAA A A AAAAAAAA AAAA AAAA AAAA AAAA A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA AA AA AA AA AA AA A A A A A AA AA AA A A A A AA AA AA AA AA AA AA AA A A A tCSS A A A AA AA AA A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A t A A A A AA AA AA A CSH A A A A AA AA AA AA AA AA AA AA A AAAA A AAAA AAAA A AAAA AAAA A AAAA AAA A AAAA AAAA AA AAAA AAAA AA AAAA AAAA AAAA A AAAA AAAA A AAAA AAAA AA AAAA AAAA A AAAA AAAA A AAAA AAAA AAAA A AAAA AAAA A AAAAAAAA A AAAA A AAAA AAAA A AAAA AAA A AAAA AAAA AA AAAA AAAA AA AAAA AAAA AAAA A AAAA AAAA A AAAA AAAA AA AAAA AAAA A AAAA AAAA A AAAA AAAA AAAA A AAAA AAAA A A A AAAAAAAA AAAAAAAA AAAAAAAAA AAAAAAAAAAAAAA AA AAAAAAAA A AAAAAAAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA A AAAAAAAA A AAAAAAAA A AAAA AAAA CE1, CE3 AAAA AAAAAAAA A AAAA A AAAA AAAA A AAAA AAA A AAAA AAAA AA AAAA AAAA AA AAAA AAAA AAAA A AAAA AAAA A AAAA AAAA AA AAAA AAAA A AAAA AAAA A AAAA AAAA AAAA A AAAA AAAA A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A AAAAAAAA A AAAA A AAAA AAAA A AAAA AAA A AAAA AAAA AA AAAA AAAA AA AAAA AAAA AAAA A AAAA AAAA A AAAA AAAA AA AAAA AAAA A AAAA AAAA A AAAA AAAA AAAA A AAAA AAAA A A A A A AA AA A A AA A A A A AAAA AAAA AAAA AAAA AAAA AAAA AAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA A AAAA AAAA A AAAA AAAA A AAAA AAA A AAAA AAAA AA AAAA AAAA AA AAAA AAAA AAAA A AAAA AAAA A AAAA AAAA AA AAAA AAAA A AAAA AAAA A AAAA AAAA AAAA A AAAA AAAA A CE2 AAAAAAAA A A AAAAAAAA AAAAAAAA AAAAAAAAA AAAAAAAAAAAAAA AA AAAAAAAA A AAAAAAAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA A AAAAAAAA A AAAAAAAA A AAAA AAAAAAAA A AAAA A AAAA AAAA A AAAA AAA A AAAA AAAA AA AAAA AAAA AA AAAA AAAA AAAA A AAAA AAAA A AAAA AAAA AA AAAA AAAA A AAAA AAAA A AAAA AAAA AAAA A AAAA AAAA A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A tADVS A A A A A AA AA A AA A A A ADV SUSPENDS BURST A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A t A A A A AA AA A A AA A A A A ADVH A A A A AA AA A A AA A A A AAA A A AAAA AAAAAAAA AAAA AAAAA AAAAAAA AAA A AAAAA AAAAAAAA AAAAAAAA A AAAA AAAAAA AAAAAA AAAAAAA AAAAA AAAAAA AAAAAAA AAAAA AAAA AAAAAAA AAAAA AAAA AAAAAAA AAAAA AAAAAA AAAAAAAA AAAAAAAAAA AAAAAAAA AAAAAAAAAA AAAAAAAA AAAAAA AAAA AAAAAAA AAAA A AAA A A AAAA A ADV AAA A AAAAAAAAAAAAAAAA AAAAAAAAAAAAA AAAA AAAA AAA AAAA AAA AAAA AAA AAAA AAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAA A AA AA A A AA A A A AAA A AAAAAAAA A AAAAAAA A AAAAAAAAAAAA A AAAAAA AAAAAAAAA AAAAAAAAA AAAAAAAAA AAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAA A A A A A AA AA AA A A A A A AA AA AA AA AA AA AA AA A A A A A AA AA AA A A A A A AA AA A A AA A A A A AAAA AAAA A AAAA AAAA A A A AA AAAA AAAA AA AAAA AAAA A AAAA AAAA A AAAA AAAA AAAA AA AAAA AAAA A AAAA AAAA A AAAA AAAA AAAA A AAAA AAA A AAAA AAAA A AAAA AAAA A A A AA AAAA AAAA AA AAAA AAAA A AAAA AAAA A AAAA AAAA AAAA AA AAAA AAAA A AAAA AAAA A AAAA AAAA AAAA A AAAA AAA A OE AAAA AAAA A AAAA AAAA A A A AA AAAA AAAA AA AAAA AAAA A AAAA AAAA A AAAA AAAA AAAA AA AAAA AAAA A AAAA AAAA A AAAA AAAA AAAA A AAAA AAA A AAAAAAAA A AAAA AAAA A A A AA AAAA AAAA AA AAAA AAAA A AAAA AAAA A AAAA AAAA AAAA AA AAAA AAAA A AAAA AAAA A AAAA AAAA AAAA A AAAA AAA A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A t DS A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A tDH A A A A A AA AA A A AA A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA A A A A AAAA AAAA A AAAA AAAA AA AAAA AAAA AAAA AA AAAA AAAA A AAAA AAAA A AAAA AAAA AA AAAA AAAA AAAA A AAAA AAAA A AAAA AAAA A AAAA AAAA D(A1) D(A2) D(A201) D(A201) D(A210) D(A211) D(A3) D(A301) D(A310) Data In A A AAAAA AAAAAAAA AAAAAAAA A AAAA AAAAAA AA AAAAAAAA AAAAAAAA AAAA AA AAAA AAAAAAAA AAAA A AAAA AAAAAAAA AAAAAAAAAA AAAAAAAA AAAAAA AA AAAAAAAA AAAAAAAA AAAA A AAAA AAAAAAAA AAAA A AAAA AAAAAAAA AAAAAAAAAA AAAAAAAA AAAAA A A A A A AAAA AAAA AA A AAAA A A A A A A A AA AA A A AA A A A A A A A A AA AA A A AA A A A A Note: = XOR when MODE = High/No Connect; = ADD when MODE = Low. Refer to Burst sequence table on page 2. 8 AS7C36432 Preliminary information (R) Read/write waveform AA A AA A AA AA AA AA AA AA A AA A AA A AAt AA AA AA A AA A AA A AA CYC AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A tCH A AA A AA AAtCL AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A CLK AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A t SS AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A tSH AA AA A A AA AA A AA A AA A AA A AA A AA AA A AA A AA AAAA AA AAAAAAA A AAAAAAAAAA AAAAAAA A AAAAAAAAAAAAAAAAAAAA AAAAAAA A AAAAAAAAAAAAAAAAAA A AAAAAAAAAA AAAAAAA A AAAA AA AAAAAAA A AAAAAAAAAA AAAAAAA A AAAAAAAAAAAAAAAAAAAA AAAAAAA A AAAAAAAAAAAAAAAAAA A AAAAAAAAAA AAAAAAA A A AAAA ADSP AAAA AAAA AA AAAAAAA AAA A AAAA AAAAAAAA AAAAAA AAAA AAAAAAA AAA A AAAA AAAAAAAA AAAAAAAAAA AAAAAAAA AAAAAA AAAA AAAAAAA AAA A AAAA AAAAAAAA AAAAAAAAAA AAAAAAAA AAAA A AAAA AAAAAAAA AAAAAA AAAA AAAAAAA AAA A AAAA AA AAAAAAA A AAAAAAAAAA AAAAAAA A AAAAAAAAAA AAAAAAAAAA AAAAAAA AA AAAAAAAAAA AAAAAAAA AA AAAAAAAAAA AAAAAAA A AA A AA A AA AA AA AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A tAS AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A t AH AA AA A AA A AA A AA A AA A AA A AA A AA AA A AA A AA A AA AAAAAAA A AAAAAAAA AA A AAAAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAA A AAAAAAAAAAAAAAAAAAAAAA A AA AAAAAAAA AAAA AAAA AA AAAAAAA A1 A AAAAAAAA AA A AAAAAAAAAAAAAAAAAA AA AAAAAAAAAAAAA AAAAAAAAAAAAAA A AAAAAAAAAAAAAAAAAAAAAA A AA AAAA AAAA AAAA AAAA AAAA A2 A3 Address AAAA AAAAAAAA AA AAAAAAA A AAAAAAAA AA AAAAAAAA A AAAAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAA A AAAAAAAAAAAAAAAAAAAAAA A AA AAAAAAAA AA AAAA AAA A AAAA AAAA AA AAAA AAAA A AAAA AAAA AA AAAA AAAA AA AAAA AAAA A AAAA AAAA AAAA AA AAAA AAAA AAAA A AAAA AAAA AA AAAA AAAA AAAA A AA A AA A AA AA A AA A AA A AA AA A AA A AA AA AA AA A AA A AA A AA AA AA AA AA AA A AA A AA A AA AA A AA A AA A t AA A AA A AA AA AA AA AA AA A AA A AA A AA WS AA AA AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A tWH AA AA A AA A AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA AAAAAAAA AAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAAA AAA AAAA AAAA AAAA AAAA AA AAAA AAA AAAA AAAA AAAA AAAA AAAA AAAA AA AAAAAAAAAAAA A AAAAAAAAAAAAAA A AAAAAAAAAAAAAAAAAAAAA AA AAAAAA A AAAAAAAAAAAAAAAAA A AAAAAAAAAAAAAAAAAA A A AAAA AAAA AAAA AA AA A AA A AA AA A AA A AA A AAAA AAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAAA AAA AAAA AAAA AAAA AAAA AA AAAA AAA AAAA AAAA AAAA AAAA AAAA AAAA WE AAAA AA A AA A AA AA AA AAAAAAAAA AA AAAAAAAAAA A AAAA AAAA AAAA AAAA AA AAAA AAAA AAA AAAA AAAA AA AAAA AAAA AA AAAA A AAAAAA A AAAA AAAAAA AA AAAA AAAAAA AAAAAA A AAAAAAAA AAAA AAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAAA AAA AAAA AAAA AAAA AAAA AA AAAA AAA AAAA AAAA AAAA AAAA AAAA AAAA AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AAAAAAAA AA AAAA AAA A AAAA AAAA AA AAAA AAAA AA A AAAA AAAA AAAA AA AAAA AAA AA AAAA AAAA A AAAA AAAA AAAA AA AAAA AAAA AAAA A AAAA AAAA AA AAAA AAAA AAAA A AA AAAAAAA A AAAAAAAAAAAA AA AAAAAA AAAAAAAAAAAAA AA AAAAAAAAA AAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAA A AAAAAAAAAAAAAAAAAAAAAA A A AAAA AAAA A AAAA AA AAAA AAA A AAAA AAAA AA AAAA AAAA AA A AAAA AAAA AAAA AA AAAA AAA AA AAAA AAAA A AAAA AAAA AAAA AA AAAA AAAA AAAA A AAAA AAAA AA AAAA AAAA AAAA A A CE1, CE3 AAAA AA A AA A AA AA A AA A AA A AAAA AAAA AAAA AAA AAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAAA AAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AA AAAAAAA A AAAAAAAAAAAA AA AAAAAA AAAAAAAAAAAAA AA AAAAAAAAA AAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAA A AAAAAAAAAAAAAAAAAAAAAA A A AAAAAAAA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA AA AA A AA A AA A AA AA AA AA AA AA A AAAAAAAA AA AAA A AAAAAAAA AA AA A AAAAAAAA AA AAAAA AAAAAAAAAAAAAAAAAA AA AAAAAAAA AA AAAAAAAAAA AAAAAAAA A AA AAAA A AAAA AA AAAA AAAAA AA AAAA AA AAAA AAAAAA AAAAAA A A AAAAAAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA A AAAA AA AAAAAAA AAA A AAAAAAAA AAAAAAAA AA AAAA AAAAAA AA A AAAAAAAA AAAAAAAA AAAA AA AAAAAAA AAAAA AAAAAAAA AAAAAAAAAA AAAAAAAA AAAAAAAA AAAA AA AAAAAAAA AAAAAAAA AAAA AA AAAA AAAAAAAA AAAAAA AAAAAAAA AAAAAAAA AAAA A A CE2 AAAA AA A AA A AA AA AA AA A AAAA AAAA AAAA AAA AAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAAA AAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AA AAAAAAA A AAAAAAAAAAAA AA AAAAAA AAAAAAAAAAAAA AA AAAAAAAAA AAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAA A AAAAAAAAAAAAAAAAAAAAAA A A AAAAAAAA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA AA AA AA AA A AA A AA A AA t AA AA AA A AA A AA A AA A AA A AA A ADVS AA AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A tADVH AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AAAAAAAA AA AAAA AAAA A AAAA AAAA AA AA AAAA AAAA A AAAA AAAA A AA AAAA AAAA AA AAAA AAAA AA A AAAA AAAA AA AAAA AAAA A A AAAA AAAA AA AAAA AAAA AAAA A AAA AA A AA A AA AA A AA A AA A AAAA AAAA AAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAAA A AAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAAA A AAAA AAAA AAAA AAAA AAAA AA AAAAAAAAAAAA A AA AAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAA AA AAAAAA A AAAAAAAAAAAAAAAAAAAA AAAAAAAAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAA ADV AAAA AA A AA A AA AA A AA A AA A AAAA AAAA AAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAAA A AAAA AAAA AAAA AAAA AA AAAA AAAA AAAA AAAA A AAAA AAAA AAAA AAAA AAAA AA AAAAAAAAAAAA A AA AAAAAA A AAAAAAAAAAAAAAAAAAAA AAAAAAAAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAAA AAAAAAAAA AA AAAAAAAAAAAA AAAAAAAAAAAA AAA AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA AA AA A AA A AA A AA AA AA AA AA AA A AA A AA A AA AA AA AA AA AA A AA A AA A AA AA AA AA A AA A AA A AA AA A AA A AA A OE AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A tDS AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A t DH AA AA A AA A AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A D(A2) DIN AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A t t t t AA A AA A AA AA A AA A A HZOE OH AA LZC LZOE AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A tCD A tAA AA A AA AA AA A A AA A OE AA A AA A AA AA A AA A AA A AA A AA A AA AA A AAAA AA AAAA AAAA AAAA A AAAA AAAA AA AAAA AAAA AAAA A AA A AA A AA AA A AAAA AA AAAA AAAA AAAA A AAAA AAAA AA AAAA AAAA AAAA A AA A AA A AA AA A AAAA AA AAAA AAAA AAAA A AAAA AAAA AA AAAA AAAA AAAA A Q(A1) Q(A3) Q(A301) Q(A310) Q(A311) DOUT AA A AA A AA AA A AAAA AA AAAA AAAA AAAA A AAAA AAAA AA AAAA AAAA AAAA A AA A AA A AA AA A AAAA AA AAAA AAAA AAAA A AAAA AAAA AA AAAA AAAA AAAA A AA A AA A AA AA A AA A AA A (pipeline mode) AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A t CDF AA A AA A AA AA A AA A AA A AA A AA A AA AA AAAA A AAAA AAAA AA AAAA AAAA AAAA A AAAA AA A AA A AA A AA AA AAAA A AAAA AAAA AA AAAA AAAA AAAA A AAAA AA A Q(A1) A Q(A3) Q(A301) Q(A310) DOUT AA A AA AA AA AAAA A AAAA AAAA AA AAAA AAAA AAAA A AAAA AA A AA A AA A AA AA AAAA A AAAA AAAA AA AAAA AAAA AAAA A AAAA AA A A AA A AA AA A AA A AA A (flow-throughAA mode) AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A AA A AA A AA AA A AA A AA A Note: = XOR when MODE = High/No Connect; = ADD when MODE = Low. Refer to Burst sequence table on page 2. 9 AS7C36432 Preliminary information (R) AC test conditions * Output Load: see Figure B, except for tLZC, tLZOE, tHZOE, tHZC see Figure C. * Input pulse level: GND to 3V. See Figure A. * Input rise and fall time (Measured at 0.3V and 2.7V): 2 ns. See Figure A. * Input and output timing reference levels: 1.5V. Z0=50 +3.0V 90% 90% 10% 10% GND +3.3V 50 Dout 5 pF* 351 30 pF* Figure A: Input waveform 317 Dout VL=1.5V GND *including scope and jig capacitance Figure C: Output load(B) for tLZC, tLZOE, tHZOE, tHZC Figure B: Output load (A) Normalized supply current ICC, ISB vs. ambient temperature Ta 1.4 1.2 1.2 0.8 0.6 ISB 0.4 ICC 1.0 0.8 0.6 ISB 0.4 0.2 0.2 0.0 3.0 0.0 -15 3.3 Supply voltage (V) Normalized access time t CD vs. supply voltage VCC 1.5 Normalized access time 1.3 Ta = 25C 1.2 1.1 1.0 0.9 0.8 3.0 3.3 Supply voltage (V) 3.6 VCC = 3.30V 25 5 1 0.2 0.04 10 35 60 85 Ambient temperature (C) 3.6 1.4 625 -55 Normalized access time t CD vs. ambient temperature Ta 1.4 1.4 1.3 1.2 1.1 1.0 0.9 0.8 -15 -10 35 80 125 Ambient temperature (C) Normalized supply current ICC vs. cycle frequency 1/t CYC 1.2 VCC = 3.3V Normalized ICC 1.0 1.5 Normalized access time ICC Normalized supply current ISB1 vs. ambient temperature Ta Normalized ISB1 (log scale) Normalized supply current ICC, ISB vs. supply voltage VCC 1.4 Normalized ICC, ISB Normalized ICC, ISB Typical DC and AC electrical characteristics 1.0 VCC = 3.3V Ta = 25C 0.8 0.6 0.4 0.2 10 35 80 85 Ambient temperature (C) 0.0 0 Power-down waveform 19 20 40 60 80 Cycle frequency (MHz) (preliminary information) CLK ADSP, ADSC ZZ ICC 10 AAAA AAAA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAA AA AAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAAAA AAAAAA AA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAA AA AAAA AAAA AAAA AAAAAAAA AAAAAA AA AAAA AAAAAAAA AAAAAAAA AAAAAA AA AAAA AAAA AAAAAAAAAAAA AAAAAA AA tZZ tZZR AS7C36432 Preliminary information (R) Application connectivity examples ADSP ADPS I/O [63:32] A[18:03] D [63:00] MODE ADSC ADV CE1 Pentium CE2 N/C AS7C36432 CE3 GWE BWE WE[3:0] ADSP ADR[18:03] Cache Controller ADSC ADV CE I/O [31:00] A[18:03] MODE ADSC N/C ADV CE1 CE2 AS7C36432 CE3 WE[7:0] GWE BWE WE[3:0] BE[0:3] BE[4:7] Figure A: Pentium 512KB single bank cache AS7C36432 ordering information Package \ Min access time PQFP TQFP 5.5 ns AS7C36432-5QC AS7C36432-5TQC 6 ns AS7C36432-6QC AS7C36432-6TQC 7 ns AS7C36432-7QC AS7C36432-7TQC AS7C36432 part numbering system AS7C 3 6432 SRAM prefix 3 = 3.3V supply Device number -XX Minimum pipeline access time XX Package: Q = PQFP TQ = TQFP C Commercial temperature range, 0C to 70 C 11 AS7C36432F (R) Representatives and sales offices DOMESTIC REPS ILLINOIS NEBRASKA RHODE ISLAND ALABAMA El-Mech 3511 N. Cicero Avenue Chicago, IL 60641 (312) 794-9100 CenTech 3751 Pennridge Dr., Suite #107 Bridgeton, MO 63044 (314) 291-4230 CenTech 10312 East 63rd Terrace Raytown, MO 64133 (816) 358-8100 Kitchen & Kutchin Associates 87 Cambridge Street Burlington, MA 01803 (617) 229-2660 NEVADA SOUTH CAROLINA Brooks Technical Group 883 N. Shoreline Blvd. Mountain View, CA 94043 (415) 960-3880 Concord Component Reps 10608 Dunhill Terrace Raleigh, NC 27615 (919) 846-3441 NEW HAMPSHIRE SOUTH DAKOTA Kitchen & Kutchin Associates 87 Cambridge Street Burlington, MA 01803 (617) 229-2660 D.A. Case Associates 4620 W. 77th Street Suite #250 Minneapolis, MN 55435 (612) 831-6777 Concord Component Reps 190 Lime Quarry, Suite #102 Madison, AL 35758 (205) 772-8883 ARKANSAS Southern States Marketing 1702 N. Collins Blvd., Suite #250 Richardson, TX 75080 (214) 238-7500 CALIFORNIA North: Brooks Technical Group 883 N. Shoreline Blvd. Mountain View, CA 94043 (415) 960-3880 South: Action Technical Sales 2137 Newcastle Avenue Cardiff, CA 92007-1824 (619) 634-1488 Competitive Technology 16253 Laguna Canyon Road Suite #160 Irvine, CA 92718. (714) 450-0170 COLORADO Technology Sales 1720 South Bellaire Street Suite #910 Denver, CO 80222 (303) 692-8835 CONNECTICUT Kitchen & Kutchin Associates 154 State St. North Haven, CT 06473 (203) 239-0212 DELAWARE Electro Tech 621 E. Germantown Pike, Suite #202 Norristown, PA 19401-2454 (610) 272-2125 FLORIDA Micro-Electronic Components Corp. 400 Fairway Drive, Suite #107 Deerfield Beach, FL 33441 (954) 426-8944 Micro-Electronic Components Corp. 822 Riverbend Blvd. Longwood, FL 32779 (407) 682-9602 Micro-Electronic Components Corp. 10637 Harborside Drive, North Largo, FL 34643 (813) 393-5011 INDIANA CC Electro Sales 1843 N. Meridian Street Indianapolis, IN 46202-1411 (317) 921-5000 KANSAS CenTech 10312 East 63rd Terrace Raytown, MO 64133 (816) 358-8100 NEW JERSEY ERA Associates 354 Veterans Memorial Hwy Commack, NY 11725 (800) 645-5500 Electro Tech 621 E. Germantown Pike Suite #202 Norristown, PA 19401-2454 (610) 272-2125 KENTUCKY CC Electro Sales 1843 N. Meridian Street Indianapolis, IN 46202-1411 (317) 921-5000 LOUISIANA Southern States Marketing 13831 NW Freeway, Suite #151 Houston, TX 77040 (713) 895-8533 Southern States Marketing 1702 N. Collins Blvd., Suite #250 Richardson, TX 75080 (214) 238-7500 Kitchen & Kutchin Associates 87 Cambridge Street Burlington, MA 01803 (617) 229-2660 ERA Associates 354 Veterans Memorial Hwy Commack, NY 11725 (516) 543-0510 Tri-Tech Electronics 1043 Front Street Binghamton, NY 13905 (607) 722-3580 Tri-Tech Electronics 349 W. Commercial Street Suite #2585 East Rochester, NY 14445 (716) 385-6500 MARYLAND NORTH CAROLINA MAINE Concord Component Reps Chesapeake Technology 3905 National Drive, Suite #425 10608 Dunhill Terrace Raleigh, NC 27615 Burtonsville, MD 20866 (919) 846-3441 (301) 236-0530 MASSACHUSETTS NORTH DAKOTA Kitchen & Kutchin Associates 87 Cambridge Street Burlington, MA 01803 (617) 229-2660 D.A. Case Associates 4620 W. 77th Street Suite #250 Minneapolis, MN 55435 (612) 831-6777 MICHIGAN OHIO Enco Group 799 Industrial Court Bloomfield Hills, MI 48302 (810) 338-8600 Midwest Marketing Associates 5001 Mayfield Road Suite #319 Lyndhurst, OH 44124 (216) 381-8575 Midwest Marketing Associates 30 Marco Lane Dayton, OH 45458 (513) 433-2511 MINNESOTA D.A. Case Associates 4620 W. 77th Street Suite #250 Minneapolis, MN 55435 (612) 831-6777 MISSOURI Concord Component Reps 6825 Jimmy Carter Blvd. 1303 Norcross, GA 30071 (770) 416-9597 CenTech 3751 Pennridge Dr., Suite #107 Bridgeton, MO 63044 (314) 291-4230 CenTech 10312 East 63rd Terrace Raytown, MO 64133 (816) 358-8100 HAWAII MISSISSIPPI Brooks Technical Group 883 N. Shoreline Blvd. Mountain View, CA 94043 (415) 960-3880 Concord Component Reps 190 Lime Quarry, Suite #102 Madison, AL 35758 (205) 772-8883 IDAHO MONTANA ES/Chase 6655 SW Hampton, Suite #120 Tigard, OR 97223 (503) 684-8500 ES/Chase 6655 SW Hampton, Suite #120 Tigard, OR 97223 (503) 684-8500 GEORGIA NEW YORK OKLAHOMA Southern States Marketing 1702 N. Collins Blvd., Suite #250 Richardson, TX 75080 (214) 238-7500 OREGON ES/Chase 6655 SW Hampton, Suite #120 Tigard, OR 97223 (503) 684-8500 PENNSYLVANIA Electro Tech 621 E. Germantown Pike Suite #202 Norristown, PA 19401-2454 (610) 272-2125 Midwest Marketing Associates 5001 Mayfield Road Suite #319 Lyndhurst, OH 44124 (216) 381-8575 TENNESSEE Concord Component Reps 190 Lime Quarry, Suite #102 Madison, AL 35758 (205) 772-8883 TEXAS Southern States Marketing 400 Anderson Lane Suite #118 Austin, TX 78752 (512) 835-5822 Southern States Marketing 13831 NW Freeway Suite #151 Houston, TX 77040 (713) 895-8533 Southern States Marketing 1702 N. Collins Blvd. Suite #250 Richardson, TX 75080 (214) 238-7500 UTAH Charles Fields & Associates 103 East 650 North Bountiful, UT 84010 (801) 299-8228 VERMONT Kitchen & Kutchin Associates 87 Cambridge Street Burlington, MA 01803 (617) 229-2660 VIRGINIA Chesapeake Technology 3905 National Drive Suite #425 Burtonsville, MD 20866 (301) 236-0530 WASHINGTON ES/Chase 12025 115th Avenue NE Suite #200 Kirkland, WA 98034 (206) 823-9535 WEST VIRGINIA Chesapeake Technology 3905 National Drive Suite #425 Burtonsville, MD 20866 (301) 236-0530 WISCONSIN D.A. Case Associates 4620 W. 77th Street Suite #250 Minneapolis, MN 55435 (612) 831-6777 WYOMING Technology Sales 1720 South Bellaire Street Suite #910 Denver, CO 80222 (303) 692-8835 JAPAN INTERNATIONAL REPS AUSTRALIA ACD 14 Melrich Road, Unit 1 Bayswater, Victoria 3153 +61-3-9762-7644 R&D Electronics 4 Plane Tree Avenue Dingley, Victoria 3172 +61-3-9558-0444 CANADA J-Squared Technologies 4170 Still Creek Dr. Suite #200 Burnaby, British Columbia V5C 6C6 (604) 473-4666 J-Squared Technologies 2723 37th Avenue NE Suite #206 Calgary, Alberta T1Y 5R8 (403) 291-6755 J-Squared Technologies 300 March Road, Wuite 501 Kanata, Ontario K2K 2E2 (613) 592-9540 J-Squared Technologies 3395 American Dr. Bldg. 306 Unit 2 Mississauga, Ontario L4V 1T4 (905) 672-2030 J-Squared Technologies 100 Alexis Nihon, Suite #960 St. Laurent, Quebec H4M 4P5 (514) 747-1211 EUROPE Brit Comp Sales Ltd. 1 Brooklands Road Weybridge, Surrey KIT13 0SD England +44-1932 347077 +44-1932 346256 Munich, Germany +49-894488496 Athismons, France +33-1-69387678 interACTIVE Epos House 263 Heage Road Ripley, Derbyshire DE5 3GH England +44-1773-740263 Ramtec Int'l B.V. Holland, Spain, Italy Belgium, Hungary, Russia +31-2526-21222 HONG KONG Eastele Technology, Ltd. A16, 6/F., Proficient Ind Centre 6 Wang Kwun Road Kowloon Bay +852-2798-8860 INDIA Priya Electronics San Jose, CA USA (408) 954-1866 Satcom Sales and Services 201/2, 2nd Floor, Azam Complex Shivam Road, Baghamberpet Hyderabad 500 013 +91-40-761-4675 ISRAEL Eldis Technologies 36 Kehilat St. Herzlia 46382 Israel +972-9-562-666 Bussan Micro Electronics Corp. Sowa Gotanda Bldg. 7-18, Higashi Gotanda 2-Chome Shinagawa-ku, Tokyo 141 +81-3-5421-1730 Rohm Corporation R&D Division/ Advanced Tech 21Saiin Mizosaki-cho Ukyo-ku Kyoto 615 +81-75-311-2121 KOREA FM Korea 6th Fl. Bando Bldg. 48-1, Banpo-dong, Seocho-ku Seoul 137 140 Korea +822-596-3880 fm@ktnet.co.kr Woo Young Tech Co., Ltd. 5th Floor Koami Bldg., 13-31 Yoido-dong, Youngdeungpo-ku Seoul, Korea +822-369-7099 MALAYSIA Exertec Pte Ltd. Blk 1A/14/07 Sunnyville No. 1 Jalan Batu Uban Gelugor, Penang 11700 Malaysia +60-4-657-9592 PUERTO RICO MEC/Caribe P.O. Box 5038 Caguas, PR 00726 (787) 746-9897 SINGAPORE Exertec Pte Ltd. 5 Kallang Sector #04-01 349279 Singapore +65-749-1349 TAIWAN ASTL Room A3, 10th Fl. No. 58 Sec. 1 Ming-Sheng Road Taipei, Taiwan R.O.C. +886-2-521-2363 Golden Way 7F-3, 75, Hsin Tai Wu Road Sec. 1, His-Chih Taipei-Hsien Taiwan R.O.C. +886-2-698-1868 x505 Puteam International 9F-5, 391 Sec. 4 Hsin-Yi Road Taipei, Taiwan R.O.C. +886-2-729-0373 SALES OFFICES HEADQUARTERS Alliance Semiconductor San Jose, CA Tel: (408) 383-4900 Fax: (408) 383-4999 BBS: (408) 383-4994 NORTHEAST AREA Alliance Semiconductor Boston, MA (617) 239-8127 TECHNICAL CENTER TAIWAN Alliance Semiconductor 11F, NO.66, Sec. 2 Jang Kuao N. Road Taipei, Taiwan R.O.C. Tel:+886-2-516-7995 Fax:+886-2-517-4928 alliance@netra.wow.net.tw Alliance Semiconductor reserves the right to make changes in this data sheet at any time to improve design and supply the best product possible. Publication of advance information does not constitute a committment to produce or supply the product described. The company cannot assume responsibility for circuits shown or represent that they are free from patent infringement. Alliance products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of Alliance. ProMotion(R) and the Alliance logo are registered trademarks of Alliance Semiconductor Corporation. All other trademarks are property of their respective holders. 3099 North First Street Printed in U.S.A. ALLIANCE SEMICONDUCTOR San Jose, CA 95134 Tel (408) 383-4900 Fax (408) 383-4999 Copyright (c) 1996 All rights reserved. BBS: (408) 383-4994 www.alsc.com September 1996