1
FEATURES
DESCRIPTION
APPLICATIONS
STANDARD APPLICATION
PTN78000
(Top View)
1
1
2
3
5
4
+
RSET
(B)
0.05 W, 1 %
(Required)
CI
(A)
Ceramic
(Required)
CO
(A)
100 mF
Electrolytic
(Required)
VO
GND
VI
Inhibit
GND
PTN78000W , PTN78000H
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...................................................................................................................................... SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008
1.5-A, WIDE-INPUT ADJUSTABLE SWITCHING REGULATOR
•1.5-A Output Current•Wide-Input Voltage
The PTN78000 is a series of high-efficiency,step-down Integrated Switching Regulators (ISR),(7 V to 36 V) / (15 V to 36 V)
that represent the third generation in the evolution of•Wide-Output Voltage Adjust
the popular 78ST100 series of products. In new(2.5 V to 12.6 V) / (11.85 V to 22 V)
designs it should be considered in place of the•High Efficiency (Up to 95%)
78ST100, PT78ST100, PT5100, and PT6100 seriesof single in-line pin (SIP) products. The PTN78000 is•On/Off Inhibit
smaller and lighter than its predecessors, and has•Undervoltage Lockout
either similar or improved electrical performance•Output Current Limit
characteristics. The case-less, double-sided package,also exhibits improved thermal characteristics, and is•Overtemperature Shutdown
compatible with TI ' s roadmap for RoHS and lead-free•Operating Temperature: – 40 ° C to 85 ° C
compliance.•Surface Mount Package Available
Operating from a wide-input voltage range, thePTN78000 provides high-efficiency, step-downvoltage conversion for loads of up to 1.5 A. The•General-Purpose, Industrial Controls,
output voltage is set using a single external resistor.HVAC Systems, Test and Measurement,
The PTN78000W may be set to any value within theMedical Instrumentation, AC/DC Adaptors,
range, 2.5 V to 12.6 V, and the PTN78000H fromVehicles, Marine, and Avionics
11.85 V to 22 V. The output voltage of thePTN78000W can be as little as 2 V lower than theinput, allowing operation down to 7 V, with an outputvoltage of 5 V. The output voltage of the PTN78000Hcan be as little as 3 V lower than the input, alowingoperation down to 15 V, with an output voltage of12 V.
The PTN78000 has undervoltage lockout and anintegral on/off inhibit. The modules are suited to awide variety of general-purpose applications thatoperate off 12-V, 24-V, or 28-V
DC
power.
(A) See the Application Information section forcapacitor recommendations. The minimum inputcapacitance is 2.2 µF for PTN78000W, and 9.4 µF (2x 4.7 µF) for PTN78000H.
(B) R
SET
is required to adjust the output voltagehigher than 2.5 V for PTN78000W, and high than11.824 V for PTN78000H. See the ApplicationInformation section for specific values.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004 – 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
ABSOLUTE MAXIMUM RATINGS
(1)
RECOMMENDED OPERATING CONDITIONS
PACKAGE SPECIFICATIONS
PTN78000W , PTN78000H
SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008 ......................................................................................................................................
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or seethe TI website at www.ti.com.
over operating free-air temperature range unless otherwise noted, all voltages with respect to GND (pin 1),
PTN78000W UNIT
T
A
Operating free-air temperature Over V
I
range – 40 to 85Surface temperature of module body Horizontal TH (suffix AH) 260Wave solder temperature
or pins (5 seconds)
° CHorizontal SMD (suffix AS) 235Surface temperature of module bodySolder reflow temperature
or pins
Horizontal SMD (suffix AZ) 260T
stg
Storage temperature – 55 to 125V
I
Input surge voltage, 10 ms maximum 38
VV
INH
Inhibit (pin 3) input voltage – 0.3 to 5
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under recommended operatingconditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
MIN MAX UNIT
PTN78000W 7 36V
I
Input voltage VPTN78000H 15 36T
A
Operating free-air temperature – 40 85 ° C
PTN78000x (Suffix AH, AS, and AZ)
Weight 2 gramsFlammability Meets UL 94 V-OPer Mil-STD-883D, Method 2002.3, 1 ms, 1/2 sine,Mechanical shock 500 G
(1)mounted
Horizontal T/H (suffix AH) 20 G
(1)Mechanical vibration Mil-STD-883D, Method 2007.2, 20-2000 Hz
Horizontal SMD (suffix AS and AZ) 15 G
(1)
(1) Qualification limit.
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ELECTRICAL CHARACTERISTICS
PTN78000W , PTN78000H
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...................................................................................................................................... SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008
operating at 25 ° C free-air temperature, V
I
= 20 V, V
O
= 5 V, I
O
= I
O
(max), C
I
= 2.2 µ F, C
O
= 100 µ F (unless otherwise noted)
PTN78000WPARAMETER TEST CONDITIONS
MIN TYP MAX UNIT
I
O
Output current T
A
= 85 ° C, natural convection airflow 0 1.5 A
V
I
Input voltage range Over I
O
range 7
(1)
36
(2)
V
Set-point voltage tolerance T
A
= 25 ° C ± 2%
(3)
Temperature variation – 40 ° C to +85 ° C ± 0.5%
Line regulation Over V
I
range ± 10 mVV
O
Load regulation Over I
O
range ± 10 mV
Includes set point, line, loadTotal output voltage variation ± 3%
(3)– 40 ° C < T
A
< 85 ° C
V
I
< 12 V 2.5 V
I
– 2
12 V ≤V
I
≤15.1 V 2.5 V
I
– 2.5V
O
Adj Output voltage adjust range V15.1 V < V
I
≤25 V 2.5 12.6
V
I
> 25 V 0.1 x V
I
12.6
V
I
= 24 V, R
SET
= 732 Ω, V
O
= 12 V 91%
ηEfficiency V
I
= 15 V, R
SET
= 21 k Ω, V
O
= 5 V 86%
V
I
= 15 V, R
SET
= 78.7 k Ω, V
O
= 3.3 V 82%
Output voltage ripple 20 MHz bandwith 1% V
O
V
(PP)
I
O (LIM)
Current limit threshold ΔV
O
= – 50 mV 3.2 A
1 A/ µ s load step from 50% to 100% I
O
max
Transient response Recovery time 100 µ s
V
O
over/undershoot 2.5 %V
O
V
I
increasing 5.5UVLO Undervoltage lockout VV
I
decreasing 5.2
Input high voltage (V
IH
) 1 Open
(4)
VInhibit control (pin 3) Input low voltage (V
IL
) – 0.1 0.3
Input low current (I
IL
) 0.25 mA
I
I (STBY)
Input standby current Pin 3 connected to GND 17 mA
F
S
Switching frequency Over V
I
and I
O
ranges 440 550 660 kHz
C
I
External input capacitance Ceramic 2.2
(5)
µ F
Nonceramic 100
(6)
µ FC
O
External output capacitance Ceramic 200
Equiv. series resistance (nonceramic) 10
(7)
mΩ
Per Telcordia SR-332, 50% stress,MTBF Calculated reliability 8.9
10
6
HrT
A
= 40 ° C, ground benign
(1) For output voltages less than 10 V, the minimum input voltage is 7 V or (V
O
+ 2) V, whichever is greater. For output voltages of 10 Vand higher, the minimum input voltage is (V
O
+ 2.5) V. See the Application Information section for further guidance.(2) For output voltages less than 3.6 V, the maximum input voltage is 10 × V
O
. See the Application Information section for further guidance.(3) The set-point voltage tolerance is affected by the tolerance and stability of R
SET
. The stated limit is unconditionally met if R
SET
has atolerance of 1% with with 100 ppm/ ° C or better temperature stability.(4) This control pin has an internal pullup, and if left open circuit, the module operates when input power is applied. The open-circuit voltageis typically 1.5 V. A smal,l low-leakage ( < 100 nA) MOSFET is recommended for control. See the Application Information section forfurther guidance.(5) An external 2.2- µ F ceramic capacitor is required across the input (V
I
and GND) for proper operation. Locate the capacitor close to themodule.
(6) 100 µ F of output capacitance is required for proper operation. See the Application Information section for further guidance.(7) This is the typical ESR for all the electrolytic (nonceramic) capacitance. Use 17 m Ωas the minimum when using maximum ESR valuesto calculate.
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ELECTRICAL CHARACTERISTICS
PTN78000W , PTN78000H
SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008 ......................................................................................................................................
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operating at 25 ° C free-air temperature, V
I
= 24 V, V
O
= 12 V, I
O
= I
O
(max), C
I
= 2 × 4.7 µ F, C
O
= 100 µ F (unless otherwisenoted)
PTN78000HPARAMETER TEST CONDITIONS
MIN TYP MAX UNIT
V
O
= 12 V 0.1 1.5
I
O
Output current T
A
= 85 ° C, natural convection airflow V
O
= 15 V 0.1 1.5
(1)
A
V
O
= 22 V 0.1 1
(1)
V
I
Input voltage range Over I
O
range 15
(2)
36 V
Set-point voltage tolerance T
A
= 25 ° C ± 2%
(3)
Temperature variation – 40 ° C to +85 ° C ± 0.5%
Line regulation Over V
I
range ± 10 mVV
O
Load regulation Over I
O
range ± 10 mV
Includes set point, line, loadTotal output voltage
± 3%
(3)variation
– 40 ° C < T
A
< 85 ° C
V
I
< 19 V 11.85 V
I
– 3Output voltage adjust
19 V ≤V
I
≤25 V 11.85 V
I
– 4V
O
Adj Vrange
V
I
> 25 V 11.85 22
V
I
= 24 V, R
SET
= 383 k Ω, V
O
= 12 V 91%
ηEfficiency V
I
= 24 V, R
SET
= 15 k Ω, V
O
= 15 V 93%
V
I
= 32 V, R
SET
= 95.3 Ω, V
O
= 22 V 94%
Output voltage ripple 20 MHz bandwith 1% V
O
V
(PP)
I
O (LIM)
Current limit threshold ΔV
O
= – 50 mV, minimum V
I
2 × I
O(max)
A
1 A/ µ s load step from 50% to 100% I
O
max
Transient response Recovery time 200 µ s
V
O
over/undershoot 1 %V
O
V
I
increasing 12.2UVLO Undervoltage lockout VV
I
decreasing 12
Input high voltage (V
IH
) 1 Open
(4)
VInhibit control (pin 3) Input low voltage (V
IL
) – 0.1 0.3
Input low current (I
IL
) 0.25 mA
I
I (STBY)
Input standby current Pin 3 connected to GND 17 mA
F
S
Switching frequency Over V
I
and I
O
ranges 440 550 660 kHz
C
I
External input capacitance Ceramic 9.4
(5)
µ F
Nonceramic 100
(6)
µ FExternal outputC
O
Ceramic 200capacitance
Equiv. series resistance (nonceramic) 10
(7)
mΩ
Per Telcordia SR-332, 50% stress,MTBF Calculated reliability 8.9
10
6
HrT
A
= 40 ° C, ground benign
(1) The maximum output current is 1.5 A or the maximum output power is 22.5 W, whichever is less.(2) For output voltages less than 19 V, the minimum input voltage is 15 V or (V
O
+ 3) V, whichever is greater. For output voltages of 19 Vand higher, the minimum input voltage is (V
O
+ 4) V. See the Application Information section for further guidance.(3) The set-point voltage tolerance is affected by the tolerance and stability of R
SET
. The stated limit is unconditionally met if R
SET
has atolerance of 1% with with 100 ppm/ ° C or better temperature stability.(4) This control pin has an internal pullup, and if left open circuit, the module operates when input power is applied. The open-circuit voltageis typically 1.5 V. A small, low-leakage ( < 100 nA) MOSFET is recommended for control. See the Application Information section forfurther guidance.(5) Two external 4.7- µ F ceramic capacitors are required across the input (V
I
and GND) for proper operation. Locate the capacitor close tothe module.(6) 100 µ F of output capacitance is required for proper operation. See the Application Information section for further guidance.(7) This is the typical ESR for all the electrolytic (nonceramic) capacitance. Use 17 m Ωas the minimum when using maximum ESR valuesto calculate.
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PIN ASSIGNMENT
PTN78000
(TopView)
1
4
2
3
5
PTN78000W , PTN78000H
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...................................................................................................................................... SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008
TERMINAL FUNCTIONS
TERMINAL
I/O DESCRIPTIONNAME NO.
This is the common ground connection for the V
I
and V
O
power connections. It is also the 0 V
dcGND 1 I/O
reference for the Inhibit and V
O
Adjust control inputs.V
I
2 I The positive input voltage power node to the module, which is referenced to common GND.The Inhibit pin is an open-collector/drain active-low input that is referenced to GND. Applying a low-levelground signal to this input disables the module ' s output and turns off the output voltage. When theInhibit 3 I
Inhibit control is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pinis left open-circuit, the module will produce an output whenever a valid input source is applied.A 1% resistor must be connected between this pin and GND (pin 1) to set the output voltage. If leftopen-circuit, the output voltage defaults to its minimum adjust value. The temperature stability of theV
O
Adjust 4 O resistor should be 100 ppm/ ° C (or better). The PTN78000W set-point range is 2.5 V to 12.6 V. ThePTN78000H set-point range is 11.85 V to 22 V. The standard resistor value for a number of commonoutput voltages is provided in the application information.V
O
5 O The regulated positive power output with respect to the GND node.
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TYPICAL CHARACTERISTICS (7-V INPUT)
(1) (2)
50
60
70
80
90
100
0 0.3 0.6 0.9 1.2 1.5
Efficiency − %
IO − Output Current − A
VO = 2.5 V
VO = 5 V VO = 3.3 V
0
10
20
30
40
50
0 0.3 0.6 0.9 1.2 1.5
IO − Output Current − A
− Output Voltage Ripple − mV
VOPP
VO = 2.5 V VO = 3.3 V
VO = 5 V
60LFM
20
30
40
50
60
70
80
90
0 0.3 0.6 0.9 1.2 1.5
Airflow:
Natconv
IO-OutputCurrent- A
V£5V
O
TemperatureDerating- C°
0
0.2
0.4
0.6
0.8
1
0 0.3 0.6 0.9 1.2 1.5
− Power Dissipation − W
PD
IO − Output Current − A
VO = 2.5 V
VO = 3.3 V
VO = 5 V
PTN78000W , PTN78000H
SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008 ......................................................................................................................................
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EFFICIENCY OUTPUT VOLTAGE RIPPLEvs vsOUTPUT CURRENT OUTPUT CURRENT
Figure 1. Figure 2.
POWER DISSIPATION TEMPERATURE DERATINGvs vsOUTPUT CURRENT OUTPUT CURRENT
Figure 3. Figure 4.(1) The electrical characteristic data has been developed from actual products tested at 25 ° C. This data is considered typical for theconverter. Applies to Figure 1 ,Figure 2 , and Figure 3 .(2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer ' s maximumoperating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper.For surface mount packages, multiple vias (plated through holes) are required to add thermal paths around the power pins. Please referto the mechanical specification for more information. Applies to Figure 4 .
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TYPICAL CHARACTERISTICS (15-V INPUT)
(1) (2)
0
20
40
60
80
100
0 0.3 0.6 0.9 1.2 1.5
IO − Output Current − A
− Output Voltage Ripple − mV
VOPP
VO = 2.5 V
VO = 3.3 V
VO = 9 V
VO = 12 V VO = 5 V
50
60
70
80
90
100
0 0.3 0.6 0.9 1.2 1.5
Efficiency − %
IO − Output Current − A
VO = 12 V
VO = 9 V
VO = 2.5 V
VO = 5 V
VO = 3.3 V
0
0.3
0.6
0.9
1.2
1.5
0 0.3 0.6 0.9 1.2 1.5
− Power Dissipation − W
PD
IO − Output Current − A
VO = 5 V
VO = 9 V
VO = 3.3 V
VO = 2.5 V
VO = 12 V
20
30
40
50
60
70
80
90
0 0.3 0.6 0.9 1.2 1.5
200LFM
Natconv
IO-OutputCurrent- A
60LFM
120LFM
TemperatureDerating- C°
V£5V
O
20
30
40
50
60
70
80
90
0 0.3 0.6 0.9 1.2 1.5
Airflow:
Natconv
IO-OutputCurrent- A
TemperatureDerating- C°
V =12V
O
PTN78000W , PTN78000H
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...................................................................................................................................... SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008
EFFICIENCY OUTPUT VOLTAGE RIPPLE POWER DISSIPATIONvs vs vsOUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
Figure 5. Figure 6. Figure 7.
TEMPERATURE DERATING TEMPERATURE DERATINGvs vsOUTPUT CURRENT OUTPUT CURRENT
Figure 8. Figure 9.(1) The electrical characteristic data has been developed from actual products tested at 25 ° C. This data is considered typical for theconverter. Applies to Figure 5 ,Figure 6 , and Figure 7 .(2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer ' s maximumoperating temperatures. Derating limits apply to modules soldered directly to a 100-mm x 100-mm, double-sided PCB with 2 oz. copper.For surface mount packages, multiple vias (plated through holes) are required to add thermal paths around the power pins. Please referto the mechanical specification for more information. Applies to Figure 8 and Figure 9 .
Copyright © 2004 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 7
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TYPICAL CHARACTERISTICS (24-V INPUT)
(1) (2)
50
60
70
80
90
100
0 0.3 0.6 0.9 1.2 1.5
Efficiency-%
I -OutputCurrent- A
O
VO=15V
VO=12V
VO=3.3V
VO=5V
VO=2.5V
0
20
40
60
80
100
120
140
0 0.3 0.6 0.9 1.2 1.5
I -OutputCurrent- A
O
V-OutputVoltageRipple-mV
OPP
VO=2.5V VO=3.3V
VO=5V
VO=12V
VO=15V
20
30
40
50
60
70
80
90
0 0.3 0.6 0.9 1.2 1.5
IO-OutputCurrent- A
60LFM
200LFM
120LFM
V =5V
O
Natconv
TemperatureDerating- C°
20
30
40
50
60
70
80
90
0 0.3 0.6 0.9 1.2 1.5
IO-OutputCurrent- A
200LFM
Natconv
60LFM
120LFM
V =3.3V
O
TemperatureDerating- C°
20
30
40
50
60
70
80
90
0 0.3 0.6 0.9 1.2 1.5
IO-OutputCurrent- A
60LFM
200LFM
120LFM
V =12V
O
Natconv
TemperatureDerating- C°
20
30
40
50
60
70
80
90
0 0.3 0.6 0.9 1.2 1.5
I -OutputCurrent- A
O
200LFM
Natconv
60LFM
120LFM
V =15V
O
TemperatureDerating- C°
20
40
50
60
70
80
90
0 0.2 0.4 0.6 0.8 1.21
I -OutputCurrent- A
O
TemperatureDerating- C°
30
V =18V
O
60LFM
Natconv
200LFM
120LFM
PTN78000W , PTN78000H
SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008 ......................................................................................................................................
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EFFICIENCY OUTPUT VOLTAGE RIPPLE POWER DISSIPATIONvs vs vsOUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
Figure 10. Figure 11. Figure 12.
TEMPERATURE DERATING TEMPERATURE DERATING TEMPERATURE DERATINGvs vs vsOUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
Figure 13. Figure 14. Figure 15.
TEMPERATURE DERATING TEMPERATURE DERATINGvs vsOUTPUT CURRENT OUTPUT CURRENT
Figure 16. Figure 17.(1) The electrical characteristic data has been developed from actual products tested at 25 ° C. This data is considered typical for theconverter. Applies to Figure 10 ,Figure 11 , and Figure 12 .(2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer ' s maximumoperating temperatures. Derating limits apply to modules soldered directly to a 100-mm x 100-mm, double-sided PCB with 2 oz. copper.For surface mount packages, multiple vias (plated through holes) are required to add thermal paths around the power pins. Please referto the mechanical specification for more information. Applies to Figure 13 through Figure 17 .
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TYPICAL CHARACTERISTICS (32-V INPUT)
(1) (2)
0
50
100
150
200
250
0 0.3 0.6 0.9 1.2 1.5
I -OutputCurrent- A
O
V-OutputVoltageRipple-mV
O PP
V =22V
O
V =12V
O
V =5V
OV =3.3V
O
V =9V
O
0
0.5
1
1.5
2
2.5
0 0.3 0.6 0.9 1.2 1.5
VO=12V
VO=5V
VO=3.3V
VO=15V
V =22V
O
I -OutputCurrent- A
O
P -PowerDissipation-W
D
20
30
40
50
60
70
80
90
100
0 0.3 0.6 0.9 1.2 1.5
Efficiency-%
I -OutputCurrent- A
O
V =3.3V
O
V =5V
O
V =12V
O
V =22V
OV =15V
O
20
30
40
50
60
70
80
90
0 0.3 0.6 0.9 1.2 1.5
200LFM
60LFM
120LFM
V =3.3V
O
Natconv
I -OutputCurrent- A
O
TemperatureDerating- C°
20
30
40
50
60
70
80
90
0 0.3 0.6 0.9 1.2 1.5
200LFM
Natconv
I -OutputCurrent- A
O
TemperatureDerating- C°
120LFM
60LFM
V =5V
O
20
30
40
50
60
70
80
90
0 0.3 0.6 0.9 1.2 1.5
200LFM
Natconv
I -OutputCurrent- A
O
120LFM
60LFM
V =12V
O
TemperatureDerating- C°
20
30
40
50
60
70
80
90
0 0.2 0.60.4 0.8 1 1.2
I -OutputCurrent- A
O
TemperatureDerating- C°
V =18V
O
200LFM
60LFM
120LFM
Natconv
20
30
40
50
60
70
80
90
0 0.3 0.6 0.9 1.2 1.5
200LFM
60LFM
120LFM
Natconv
V =15V
O
I -OutputCurrent- A
O
TemperatureDerating- C°
0 0.2 0.4 0.6 10.8
I -OutputCurrent- A
O
TemperatureDerating- C°
V =22V
O
Natconv
60LFM
120LFM
200LFM
20
30
40
50
60
70
80
90
PTN78000W , PTN78000H
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...................................................................................................................................... SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008
EFFICIENCY OUTPUT VOLTAGE RIPPLE POWER DISSIPATIONvs vs vsOUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
Figure 18. Figure 19. Figure 20.
TEMPERATURE DERATING TEMPERATURE DERATING TEMPERATURE DERATINGvs vs vsOUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
Figure 21. Figure 22. Figure 23.
TEMPERATURE DERATING TEMPERATURE DERATING TEMPERATURE DERATINGvs vs vsOUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
Figure 24. Figure 25. Figure 26.(1) The electrical characteristic data has been developed from actual products tested at 25 ° C. This data is considered typical for theconverter. Applies to Figure 18 ,Figure 19 , and Figure 20 .(2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer ' s maximumoperating temperatures. Derating limits apply to modules soldered directly to a 100-mm x 100-mm, double-sided PCB with 2 oz. copper.For surface mount packages, multiple vias (plated through holes) are required to add thermal paths around the power pins. Please referto the mechanical specification for more information. Applies to Figure 21 through Figure 26 .
Copyright © 2004 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): PTN78000W PTN78000H
APPLICATION INFORMATION
Adjusting the Output Voltage of the PTN78000 Wide-Output Adjust Power Modules
General
R =54.9k
SET W´1.25 V
V -V
O min
-RP
(1)
Input Voltage Considerations
PTN78000W , PTN78000H
SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008 ......................................................................................................................................
www.ti.com
A resistor must be connected between the V
O
Adjust control (pin 4) and GND (pin 1) to set the output voltage.The adjustment range is from 2.5 V to 12.6 V for PTN78000W. The adjustment range is from 11.85 V to 22 V forPTN78000H. If pin 4 is left open, the output voltage defaults to the lowest value.
Table 2 gives the preferred value of the external resistor for several standard voltages, with the actual outputvoltage that the value provides. For other output voltages, the value of the required resistor can be calculatedusing Equation 1 , and the constants for the applicable product in Table 1 . Alternatilvey, R
SET
can be simplyselected from the range of values given in Table 3 .Figure 27 shows the placement of the required resistor.
Table 1. R
SET
Formula Constants
PRODUCT V
MIN
(V) R
P
(k Ω)
PTN780x0W 2.5 6.49PTN780x0H 11.824 6.65
The PTN78000 is a step-down switching regulator. In order that the output remains in regulation, the inputvoltage must exceed the output by a minimum differential voltage. (Please refer to the input voltage rangerequirements in the electrical characteristics table.)
Another consideration is the pulse width modulation (PWM) range of the regulator's internal control circuit. Forstable operation, its operating duty cycle should not be lower than some minimum percentage. This defines themaximum advisable ratio between the regulator input and output voltage magnitudes.
As an example, for satisfactory performance, the operating input voltage range of the PTN78000x must adhere tothe following requirements.
1. For PTN78000W output voltages lower than 10 V, the minimum input voltage is (V
O
+ 2 V ) or 7 V, whicheveris higher.
2. For PTN78000W output voltages equal to 10 V and higher, the minimum input voltage is (V
O
+ 2.5 V ) .3. For PTN78000W, the maximum input voltage is (10 x V
O
) or 36 V, whichever is less.4. For PTN78000H output voltages lower than 19 V, the minimum input voltage is (V
O
+ 3 V ) or 15 V,whichever is higher.5. For PTN78000H output voltages equal to 19 V and higher, the minimum input voltage is (V
O
+ 4 V ) .
10 Submit Documentation Feedback Copyright © 2004 – 2008, Texas Instruments Incorporated
Product Folder Link(s): PTN78000W PTN78000H
Inhibit
GND GND
RSET
0.05 W
1%
CI
(Ceramic)
CO
(Required)
PTN78000W
14
52
3
AdjGND
VO
VI
2.2 Fm100 Fm
VIVO
Inh
PTN78000W , PTN78000H
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...................................................................................................................................... SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008
As an example, Table 2 gives the operating input voltage range for the common output bus voltages. In addition,the Electrical Characteristics define the available output voltage adjust range for various input voltages.
Table 2. Standard Values of R
SET
for Common Output VoltagesR
SETV
O
V
O
OperatingPRODUCT (Standard Value)(Required) (V) (Actual) (V) V
I
Range (V)(k Ω)
2.5 Open 2.5 7 to 25
3.3 78.7 3.306 7 to 33PTN780x0W
5 21 4.996 7 to 36
12 0.732 12.002 14.5 to 36
12 383 12.000 15 to 36
15 15 14.994 18 to 36PTN780x0H
18 4.42 18.023 21 to 36
22 0.0953 21.998 26 to 36
(1) A 0.05-W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100 ppm/ ° C (orbetter). Place the resistor as close to the regulator as possible. Connect the resistor directly between pins 4 and 1using dedicated PCB traces.(2) Never connect capacitors from V
O
Adjust to GND or V
O
. Any capacitance added to the V
O
Adjust pin affects thestability of the regulator.
Figure 27. PTN78000W V
O
Adjust Resistor Placement
Copyright © 2004 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): PTN78000W PTN78000H
PTN78000W , PTN78000H
SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008 ......................................................................................................................................
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Table 3. PTN78000W Output Voltage Set-Point Resistor ValuesV
O
(V) R
SET
(k Ω) V
O
(V) R
SET
(k Ω) V
O
(V) R
SET
(k Ω) V
O
(V) R
SET
(k Ω)
2.50 Open 3.7 50.7 6.1 12.6 9.0 4.07
2.55 1370 3.8 46.3 6.2 12.1 9.2 3.75
2.60 680 3.9 42.5 6.3 11.6 9.4 3.46
2.65 451 4.0 39.3 6.4 11.1 9.6 3.18
2.70 337 4.1 36.4 6.5 10.7 9.8 2.91
2.75 268 4.2 33.9 6.6 10.2 10.0 2.66
2.80 222 4.3 31.6 6.7 9.85 10.2 2.42
2.85 190 4.4 29.6 6.8 9.47 10.4 2.20
2.90 165 4.5 27.8 6.9 9.11 10.6 1.98
2.95 146 4.6 26.2 7.0 8.76 10.8 1.78
3.00 131 4.7 24.7 7.1 8.43 11.0 1.58
3.05 118 4.8 23.3 7.2 8.11 11.2 1.40
3.10 108 4.9 22.1 7.3 7.81 11.4 1.22
3.15 99.1 5.0 21.0 7.4 7.52 11.6 1.05
3.20 91.5 5.1 19.9 7.5 7.24 11.8 0.889
3.25 85.0 5.2 18.9 7.6 6.97 12.0 0.734
3.30 79.3 5.3 18.0 7.7 6.71 12.2 0.585
3.35 74.2 5.4 17.2 7.8 6.46 12.4 0.442
3.40 69.8 5.5 16.4 7.9 6.22 12.6 0.305
3.45 65.7 5.6 15.6 8.0 5.99
3.50 62.1 5.7 15.0 8.2 5.55
3.55 58.9 5.8 14.3 8.4 5.14
3.60 55.9 5.9 13.7 8.6 4.76
3.65 53.2 6.0 13.1 8.8 4.40
12 Submit Documentation Feedback Copyright © 2004 – 2008, Texas Instruments Incorporated
Product Folder Link(s): PTN78000W PTN78000H
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...................................................................................................................................... SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008
Table 4. PTN78000H Output Voltage Set-Point Resistor ValuesV
O
(V) R
SET
(k Ω) V
O
(V) R
SET
(k Ω) V
O
(V) R
SET
(k Ω)
11.85 2633 13.50 34.3 17.20 6.12
11.90 896 13.65 30.9 17.40 5.66
11.95 538 13.80 28.1 17.60 5.23
12.00 383 13.95 25.6 17.80 4.83
12.10 242 14.10 23.5 18.00 4.46
12.15 204 14.25 21.6 18.20 4.11
12.20 176 14.40 19.9 18.40 3.79
12.25 154 14.55 18.5 18.60 3.48
12.30 138 14.70 17.2 18.80 3.19
12.35 124 14.85 16.0 19.00 2.91
12.40 113 15.00 14.9 19.20 2.65
12.45 103 15.15 13.9 19.40 2.41
12.50 94.9 15.30 13.1 19.60 2.18
12.55 87.9 15.45 12.3 19.80 1.95
12.60 81.8 15.60 11.5 20.00 1.74
12.65 76.4 15.75 10.8 20.20 1.54
12.70 71.7 15.90 10.2 20.40 1.35
12.75 67.5 16.05 9.59 20.60 1.17
12.80 63.7 16.20 9.03 20.80 0.995
12.85 60.2 16.35 8.51 21.00 0.829
12.90 57.1 16.50 8.03 21.20 0.669
12.95 54.3 16.65 7.57 21.40 0.516
13.00 51.7 16.80 7.14 21.80 0.229
13.05 49.3 17.10 6.36 22.00 0.09
Copyright © 2004 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): PTN78000W PTN78000H
CAPACITOR RECOMMENDATIONS FOR PTN78000 WIDE-OUTPUT
PTN78000W Input Capacitor
PTN78000H Input Capacitor
PTN78000W and PTN78000H Output Capacitors
Ceramic Capacitors
PTN78000W , PTN78000H
SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008 ......................................................................................................................................
www.ti.com
ADJUST POWER MODULES
The minimum requirement for the input of PTN78000W is 2.2 µ F of ceramic capacitance. The dielectric may beeither an X5R or X7R temperature characteristic. Ceramic capacitors should be located within 0.5 inch (1,27 cm)of the regulator input pins. Electrolytic capacitors can be used at the input, but only in addition to the requiredceramic capacitance. The minimum ripple current rating for any nonceramic capacitance must be at least650 mArms. The ripple current rating of electrolytic capacitors is a major consideration when they are used at theinput. This ripple current requirement can be reduced by placing more ceramic capacitors at the input, in additionto the minimum required capacitance.
Tantalum capacitors are not recommended for use at the input bus, as none were found to meet the minimumvoltage rating of 2 x (maximum dc voltage + ac ripple). The 2x rating is standard practice for regular tantalumcapacitors to ensure reliability. Polymer-tantalum capacitors are more reliable and are available with a maximumrating of typically 20 V. These can be used with input voltages up to 16 V.
The minimum requirement for the input of PTN78000H is 2 × 4.7 µ F of ceramic capacitance. The dielectric maybe either an X5R or X7R temperature characteristic. Ceramic capacitors should be located within 0.5 inch(1,27 cm) of the regulator input pins. Electrolytic capacitors can be used at the input, but only in addition to therequired ceramic capacitance. The minimum ripple current rating for any nonceramic capacitance must be atleast 350 mArms. The ripple current rating of electrolytic capacitors is a major consideration when they are usedat the input. This ripple current requirement can be reduced by placing more ceramic capacitors at the input, inaddition to the minimum required capacitance.
Tantalum capacitors are not recommended for use at the input bus, as none were found to meet the minimumvoltage rating of 2 x (maximum dc voltage + ac ripple). The 2 × rating is standard practice for regular tantalumcapacitors to ensure reliability. Polymer-tantalum capacitors are more reliable and are available with a maximumrating of typically 20 V. These can be used with input voltages up to 16 V.
The minimum capacitance required to insure stability is a 100 µ F. Either ceramic or electrolytic-type capacitorscan be used. The minimum ripple current rating for the nonceramic capacitance must be at least 150 mA rms.The stability of the module and voltage tolerances will be compromised if the capacitor is not placed near theoutput bus pins. A high-quality, computer-grade electrolytic capacitor should be adequate. A ceramic capacitorcan be also be located within 0.5 inch (1,27 cm) of the output pin.
For applications with load transients (sudden changes in load current), the regulator response improves withadditional capacitance. Additional electrolytic capacitors should be located close to the load circuit. Thesecapacitors provide decoupling over the frequency range, 2 kHz to 150 kHz. Aluminum electrolytic capacitors aresuitable for ambient temperatures above 0 ° C. For operation below 0 ° C, tantalum or OS-CON type capacitors arerecommended. When using one or more nonceramic capacitors, the calculated equivalent ESR should be nolower than 10 mΩ(17 m Ωusing the manufacturer's maximum ESR for a single capacitor). A list of capacitorsand vendors are identified in Table 5 and Table 6 , the recommended capacitor tables.
Above 150 kHz the performance of aluminum electrolytic capacitors becomes less effective. To further reducethe reflected input ripple current, or the output transient response, multilayer ceramic capacitors must be added.Ceramic capacitors have low ESR and their resonant frequency is higher than the bandwidth of the regulator.When placed at the output, their combined ESR is not critical as long as the total value of ceramic capacitancedoes not exceed 200 µ F.
14 Submit Documentation Feedback Copyright © 2004 – 2008, Texas Instruments Incorporated
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Tantalum Capacitors
Capacitor Table
Designing for Load Transients
PTN78000W , PTN78000H
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...................................................................................................................................... SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008
Tantalum type capacitors may be used at the output, and are recommended for applications where the ambientoperating temperature can be less than 0 ° C. The AVX TPS, Sprague 593D/594/595, and KemetT495/T510/T520 capacitors series are suggested over many other tantalum types due to their rated surge, powerdissipation, and ripple current capability. As a caution, many general-purpose tantalum capacitors haveconsiderably higher ESR, reduced power dissipation, and lower ripple current capability. These capacitors arealso less reliable as they have lower power dissipation and surge current ratings. Tantalum capacitors that do nothave a stated ESR or surge current rating are not recommended for power applications. When specifyingOS-CON and polymer tantalum capacitors for the output, the minimum ESR limit is encountered well before themaximum capacitance value is reached.
The capacitor table, Table 5 and Table 6 , identifies the characteristics of capacitors from various vendors withacceptable ESR and ripple current (rms) ratings. The recommended number of capacitors required at both theinput and output buses is identified for each capacitor type. This is not an extensive capacitor list. Capacitorsfrom other vendors are available with comparable specifications. Those listed are for guidance. The rms ratingand ESR (at 100 kHz) are critical parameters necessary to insure both optimum regulator performance and longcapacitor life.
The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of1 A/ µ s. The typical voltage deviation for this load transient is given in the data sheet specification table using therequired value of output capacitance. As the di/dt of a transient is increased, the response of a converter'sregulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation ofany dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target applicationspecifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional outputcapacitor decoupling. In these cases, special attention must be paid to the type, value, and ESR of thecapacitors selected.
If the transient performance requirements exceed those specified in the data sheet, the selection of outputcapacitors becomes more important. Review the minimum ESR in the characteristic data sheet for details on thecapacitance maximum.
Table 5. Recommended Input/Output Capacitors (PTN78000W)CAPACITOR CHARACTERISTICS QUANTITY
85 ° CCAPACITOR VENDOR/
EQUIVALENT
VENDORWORKING MAXIMUM PHYSICALCOMPONENT
VALUE SERIES INPUT OUTPUT
NUMBERVOLTAGE RIPPLE SIZESERIES
( µ F) RESISTANCE BUS BUS(V) CURRENT (mm)(ESR) ( Ω)
(I
rms
) (mA)
Panasonic
FC (Radial) 50 180 0.119 850 10 x 16 1 1 EEUFC1H181
FC (SMD) 3 100 0.150 670 10 x 10,2 1
(1)
1 EEVFC1V101P
United Chemi-Con
PXA (SMD) 16 180 0.016 4360 8 x 12 1
(1)
1 PXA16VC180MF60
LXZ 50 120 0.160 620 x 2 10 x 12,5 2 1 LXZ50VB121M10X12LL
MVY50VC101M10X10TPMVY (SMD) 50 100 0.300 500 10 x 10 1
(1)
1
(V
O
≤5.5 V)
Nichicon
UWG1H101MNR1GSUWG (SMD) 50 100 0.300 500 10 x 10 1
(1)
1
(V
O
≤5.5 V)
F55 (Tantalum) 10 100 0.055 2000 7,7 x 4,3 N/R
(1)
≤3
(2)
F551A107MN (V
O
≤5 V)
HD (Radial) 50 100 0.074 724 8 x 11,5 1 1 UHD1H101MPR
(1) The voltage rating of the input capacitor must be selected for the desired operating input voltage range of the regulator. To operate theregulator at a higher input voltage, select a capacitor with the next higher voltage rating.(2) The maximum voltage rating of the capacitor must be selected for the desired set-point voltage (V
O
). To operate at a higher outputvoltage, select a capacitor with a higher voltage rating.
Copyright © 2004 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 15
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SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008 ......................................................................................................................................
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Table 5. Recommended Input/Output Capacitors (PTN78000W) (continued)CAPACITOR CHARACTERISTICS QUANTITY
85 ° CCAPACITOR VENDOR/
EQUIVALENT
VENDORWORKING MAXIMUM PHYSICALCOMPONENT
VALUE SERIES INPUT OUTPUT
NUMBERVOLTAGE RIPPLE SIZESERIES
( µ F) RESISTANCE BUS BUS(V) CURRENT (mm)(ESR) ( Ω)
(I
rms
) (mA)
Sanyo OS-CON
20SVP100MSVP (SMD) 20 100 0.024 2500 8 x 12 1
(3)
≤2
(V
I
and V
O
≤16 V)
SP 16 100 0.032 2890 10 × 5 1
(3)
≤2 16SP100M (V
I
and V
O
≤14 V)
7,3 x 4,3 x TPSV107M020R008520 100 0.085 1543 N/R
(4)
≤34,1 (V
O
≤10 V)AVX Tantalum TPS (SMD)
7,3 x 4,3 x TPSE107M020R020020 100 0.200 > 817 N/R
(4)
≤34,1 (V
O
≤10 V)
GRM32ER60J107MMurata X5R Ceramic 6.3 100 0.002 > 1000 3225 N/R
(3)
≤2
(V
O
≤5.5 V)
C3225X5R0J107MTTDK X5R Ceramic 6.3 100 0.002 > 1000 3225 N/R
(3)
≤2
(V
O
≤5.5 V)
GRM32ER61C476MMurata X5R Ceramic 16 47 0.002 > 1000 3225 1
(3)
≤4
(V
I
and V
O
≤13.5 V)
C1210C476K9PACKemet X5R Ceramic 6.3 47 0.002 > 1000 3225 N/R
(3)
≤4
(V
O
≤5.5 V)
C3225X5R0J476MTTDK X5R Ceramic 6.3 47 0.002 > 1000 3225 N/R
(3)
≤4
(V
O
≤5.5 V)
GRM422X5R476M6.3Murata X5R Ceramic 6.3 47 0.002 > 1000 3225 N/R
(3)
≤4
(V
O
≤5.5 V)
C3225X7R1E225KT/MTTDK X7R Ceramic 25 2.2 0.002 > 1000 SMD ≥1
(5)
1
(V
I
and V
O
≤20 V)
GRM32RR71E225KMurata X7R Ceramic 25 2.2 0.002 > 1000 3225 ≥1
(5)
1
(V
I
and V
O
≤20 V)
C1210C225K3RACKermet X7R Ceramic 25 2.2 0.002 > 1000 3225 1≥1
(4)
(V
I
and V
O
≤20 V)
12103C225KAT2AAVX X7R Ceramic 25 2.2 0.002 > 1000 1≥1
(4)
(V
I
and V
O
≤20 V)
Kemet X7R Ceramic 50 1 0.002 > 1000 SMD ≥2
(6)
1 C1210C105K5RAC
Murata X7R Ceramic 50 4.7 0.002 > 1000 ≥1 1 GRM32ER71H475KA88L
TDK X7R Ceramic 50 2.2 0.002 > 1000 ≥1 1 C3225X7R1H225KT
Murata X7R Ceramic 50 1 0.002 > 1000 3225 ≥2
(6)
1 GRM32RR71H105KA01L
TDK X7R Ceramic 50 1 0.002 > 1000 3225 ≥2
(6)
1 C3225X7R1H105KT
5,1 x 7,6 ×Kemet Radial Through-hole 50 1 0.002 > 1000 ≥2
(6)
1 C330C105K5R5CA9,1
Murata Radial Through-hole 50 2.2 0.004 > 1000 10 x 10 1 1 RPER71H2R2KK6F03
(3) The voltage rating of the input capacitor must be selected for the desired operating input voltage range of the regulator. To operate theregulator at a higher input voltage, select a capacitor with the next higher voltage rating.(4) Not reccomended (N/R). The voltage rating does not meet the minimum operating limits in most applications.(5) The maximum rating of the ceramic capacitor limits the regulator ' s operating input voltage to 20 V. Select a alternative ceramiccomponent to operate at a higher input voltage.(6) A total capacitance of 2 µ F is an acceptable replacement value for a single 2.2- µ F ceramic capacitor.
16 Submit Documentation Feedback Copyright © 2004 – 2008, Texas Instruments Incorporated
Product Folder Link(s): PTN78000W PTN78000H
PTN78000W , PTN78000H
www.ti.com
...................................................................................................................................... SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008
Table 6. Recommended Input/Output Capacitors (PTN78000H)CAPACITOR CHARACTERISTICS QUANTITY
85 ° CCAPACITOR VENDOR/
EQUIVALENT
VENDORWORKING MAXIMUM PHYSICALCOMPONENT
VALUE SERIES INPUT OUTPUT
NUMBERVOLTAGE RIPPLE SIZESERIES
( µ F) RESISTANCE BUS BUS(V) CURRENT (mm)(ESR) ( Ω)
(I
rms
) (mA)
Panasonic
FC (Radial) 50 100 0.162 615 10 × 12,5 1 1 EEUFC1H1081
FK (SMD) 50 150 0.180 670 10 × 10,2 1 1 EEVFK1H151P
FC (SMD) 35 100 0.150 670 10 × 10,2 1
(1)
1 EEVFC1V101P (V
I
≤32 V)
United Chemi-Con
25PS100MJ12PS (Radial) 25 100 0.020 4320 8 × 12,5 1
(1)
≤1
(V
I
and V
O
≤22 V)
LXZ 50 120 0.160 620 10 × 12,5 1 1 LXZ50VB121M10X12LL
MVY (SMD) 50 100 0.300 500 10 × 10 1 1 MVY50VC101M10X10TP
Nichicon
UWG (SMD) 50 100 0.300 500 10 × 10 1 1 UWG1H101MNR1GS
F55 (Tantalum) 10 100 0.055 2000 7,7 × 4,3 N/R
(1)
≤3
(2)
F551A107MN (V
O
≤5 V)
HD (Radial) 50 100 0.074 724 8 × 11,5 1 1 UHD1H101MPR
Sanyo OS-CON
20SVP100MSVP (SMD) 20 100 0.024 2500 8 × 12 1
(1)
≤2
(V
I
and V
O
≤16 V)
SP 20 120 0.024 3110 8 × 10,5 1
(1)
≤2 20SP120M (V
I
and V
O
≤16 V)
GRM32ER61C476MMurata X5R Ceramic 16 47 0.002 > 1000 3225 1
(1)
1
(V
O
≤13.5 V)
C3225X7R1E225KT/MTTDK X7R Ceramic 25 2.2 0.002 > 1000 SMD ≥5
(3)
1
(V
I
and V
O
≤20 V)
GRM32RR71E225KMurata X7R Ceramic 25 2.2 0.002 > 1000 3225 ≥5
(3)
1
(V
I
and V
O
≤20 V)
C1210C225K3RACKemet X7R Ceramic 25 2.2 0.002 > 1000 3225 ≥5
(3)
1
(V
I
and V
O
≤20 V)
12103C225KAT2AAVX X7R Ceramic 25 2.2 0.002 > 1000 ≥5
(3)
1
(V
I
and V
O
≤20 V)
Kemet X7R Ceramic 50 1 0.002 > 1000 SMD ≥9
(4)
1 C1210C105K5RAC
Murata X7R Ceramic 50 4.7 0.002 > 1000 ≥2 1 GRM32ER71H475KA88L
TDK X7R Ceramic 50 3.3 0.002 > 1000 ≥3 1 CKG45NX7R1H335M
Kemet Radial 5,1 × 7,6 ×50 4.7 0.003 > 1000 ≥2 1 C350C475K5R5CAThrough-hole 9,1
Murata Radial
50 3.3 0.003 > 1000 12,5 × 12,5 3 1 RPER71H3R3KK6F03Through-hole
(1) The voltage rating of the input capacitor must be selected for the desired operating input voltage range of the regulator. To operate theregulator at a higher input voltage, select a capacitor with the next higher voltage rating.(2) The maximum voltage rating of the capacitor must be selected for the desired set-point voltage (V
O
). To operate at a higher outputvoltage, select a capacitor with a higher voltage rating.(3) The maximum rating of the ceramic capacitor limits the regulator ' s operating input voltage to 20 V. Select a alternative ceramiccomponent to operate at a higher input voltage.(4) A total capacitance of 2 µ F is an acceptable replacement value for a single 2.2- µ F ceramic capacitor
Copyright © 2004 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Link(s): PTN78000W PTN78000H
Power-Up Characteristics
t-Time=5ms/div
V (5V/div)
I
I (0.5 A/div)
I
V (2V/div)
O
Undervoltage Lockout
Current Limit Protection
Overtemperature Protection
PTN78000W , PTN78000H
SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008 ......................................................................................................................................
www.ti.com
When configured per the standard application, the PTN78000 power module produces a regulated output voltagefollowing the application of a valid input source voltage. During power up, internal soft-start circuitry slows therate that the output voltage rises, thereby limiting the amount of in-rush current that can be drawn from the inputsource. The soft-start circuitry introduces a short time delay (typically 5 ms – 10 ms) into the power-upcharacteristic. This is from the point that a valid input source is recognized. Figure 28 shows the power-upwaveforms for a PTN78000W, operating from a 12-V input and with the output voltage adjusted to 5 V. Thewaveforms were measured with a 1.5-A resistive load.
Figure 28. Power-Up Waveforms
The undervoltage lockout (UVLO) circuit prevents the module from attempting to power up until the input voltageis above the UVLO threshold. This prevents the module from drawing excessive current from the input source atpower up. Below the UVLO threshold, the module is held off.
The PTN78000 modules protect against load faults with a continuous current limit characteristic. Under a loadfault condition, the output current cannot exceed the current limit value. Attempting to draw current that exceedsthe current limit value causes the module to progressively reduce its output voltage. Current is continuouslysupplied to the fault until it is removed. On removal of the fault, the output voltage promptly recovers. Whenlimiting output current, the regulator experiences higher power dissipation, which increases its temperature. If thetemperature increase is excessive, the module's overtemperature protection begins to periodically turn the outputvoltage completely off.
A thermal shutdown mechanism protects the module's internal circuitry against excessively high temperatures. Arise in temperature may be the result of a drop in airflow, a high ambient temperature, or a sustained current-limitcondition. If the junction temperature of the internal control IC rises excessively, the module turns off, reducingthe output voltage to zero. The module instantly restarts when the sensed temperature decreases by a fewdegrees.
Note: Overtemperature protection is a last resort mechanism to prevent damage to the module. It should not berelied on as permanent protection against thermal stress. Always operate the module within its temperaturederated limits, for the worst-case operating conditions of output current, ambient temperature, and airflow.Operating the module above these limits, albeit below the thermal shutdown temperature, reduces the long-termreliability of the module.
18 Submit Documentation Feedback Copyright © 2004 – 2008, Texas Instruments Incorporated
Product Folder Link(s): PTN78000W PTN78000H
Output On/Off Inhibit
Inhibit
GND GND
L
O
A
D
1 4
52
3GNDInh Adj
CI
2.2 mF
Ceramic
Q1
BSS138
VI = 12 V PTN78000W
VIVO
VO = 5 V
CO
100 mF
RSET
21 kW
0.05 W
1%
t-Time=5ms/div
VO(2V/div)
II(0.5 A/div)
Q1VGS (10V/div)
PTN78000W , PTN78000H
www.ti.com
...................................................................................................................................... SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008
For applications requiring output voltage on/off control, the PTN78000 power module incorporates an outputon/off Inhibit control (pin 3). The inhibit feature can be used wherever there is a requirement for the outputvoltage from the regulator to be turned off.
The power module functions normally when the Inhibit pin is left open-circuit, providing a regulated outputwhenever a valid source voltage is connected to V
I
with respect to GND. Figure 29 shows the the circuit used todemonstrate the inhibit function. Note the discrete transistor (Q1). Turning Q1 on applies a low voltage to theInhibit control pin and turns the module off. The output voltage decays as the load circuit discharges thecapacitance. The current drawn at the input is reduced to typically 17 mA. If Q1 is then turned off, the moduleexecutes a soft-start power up. A regulated output voltage is produced within 20 ms Figure 30 shows the typicalrise in the output voltage, following the turn off of Q1. The turn off of Q1 corresponds to the fall in the waveform,Q1 V
GS
. The waveforms were measured with a 1.5-A resistive load.
Figure 29. On/Off Inhibit Control Circuit
Figure 30. Power Up Response From Inhibit Control
Copyright © 2004 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): PTN78000W PTN78000H
Optional Input/Output Filters
Input/Output Capacitors
PTN78000W
25
+
4
GND
A B
13
GNDGND
UDG−05086
VO
VIVO
VI
Inhibit
C1
2.2 µF
50 V
Ceramic
C2
2.2 µF
50 V
Ceramic
(Required)
C3
100 µF
(Required)
C4
2.2 µF
Ceramic
RSET
VOAdjust
πFilters
PTN78000W , PTN78000H
SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008 ......................................................................................................................................
www.ti.com
Power modules include internal input and output ceramic capacitors in all their designs. However, someapplications require much lower levels of either input reflected or output ripple/noise. This application notedescribes various filters and design techniques found to be successful in reducing both input and outputripple/noise.
The easiest way to reduce output ripple and noise is to add one or more 1- µ F ceramic capacitors, such as C4shown in Figure 31 . Ceramic capacitors should be placed close to the output power terminals. A single 1- µ Fcapacitor reduces the output ripple/noise by 10% to 30% for modules with a rated output current of less than 3 A.(Note: C3 is recommended to improve the regulators transient response and does not reduce output ripple andnoise.)
Switching regulators draw current from the input line in pulses at their operating frequency. The amount ofreflected (input) ripple/noise generated is directly proportional to the equivalent source impedance of the powersource including the impedance of any input lines. The addition of C1, minimum 1- µ F ceramic capacitor, near theinput power pins, reduces reflected conducted ripple/noise by 30% to 50%.
Figure 31. Adding High-Frequency Bypass Capacitors To The Input and Output
If a further reduction in ripple/noise level is required for an application, higher order filters must be used. A π(pi)filter, employing a ferrite bead (Fair-Rite part number 2673000701 or equivalent) in series with the input or outputterminals of the regulator reduces the ripple/noise by at least 20 db (see Figure 32 and Figure 33 ). In order forthe inductor to be effective in reduction of ripple and noise ceramic capacitors are required. (Note: see CapacitorRecommendations for the PTN78000W for addtional information on vendors and component suggestions.)
These inductors plus ceramic capacitors form an excellent filter because of the rejection at the switchingfrequency (650 kHz - 1 MHz). The placement of this filter is critical. It must be located as close as possible to theinput or output pins to be efffective. The ferrite bead is small (12,5 mm x 3 mm), easy to use, low cost, and haslow dc resistance. Fair-Rite also manufactures a surface-mount bead (part number 2773021447), through hole(part number 2673000701) rated to 5 A, but in this application, it is effective to 5 A on the output bus. Inductorsin the range of 1 µ H to 5 µ H can be used in place of the ferrite inductor bead.
20 Submit Documentation Feedback Copyright © 2004 – 2008, Texas Instruments Incorporated
Product Folder Link(s): PTN78000W PTN78000H
PTN78000W
2 5
+
4 C5
Vo
Inhibit Adjust
Vo
1
3
GNDGND
+
GND
AB
UDG−05087
L2
1 µH to 5 µH
L1
1 µH to 5 µH
C1
2.2 µF
50 V
Ceramic
C2
2.2 µF
50 V
Ceramic
(Required)
RSET C4
2.2 µF
Ceramic
C3
100 µF
(Required)
VI
VI
10
15
20
25
30
35
40
45
0 0.5 1 1.5 2 2.5 3
1 MHz
600 kHz
Attenuation − dB
Load Current − A
PTN78000W , PTN78000H
www.ti.com
...................................................................................................................................... SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008
Figure 32. Adding πFilters (I
O
≤3 A)
Figure 33. π-Filter Attenuation vs. Load Current
Copyright © 2004 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Link(s): PTN78000W PTN78000H
PACKAGE OPTION ADDENDUM
www.ti.com 13-Nov-2010
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
PTN78000HAH ACTIVE Through-
Hole Module EUS 5 56 Pb-Free (RoHS) SN N / A for Pkg Type Request Free Samples
PTN78000HAS ACTIVE Surface
Mount Module EUT 5 49 TBD SNPB Level-1-235C-UNLIM/
Level-3-260C-168HRS Request Free Samples
PTN78000HAST ACTIVE Surface
Mount Module EUT 5 250 TBD SNPB Level-1-235C-UNLIM/
Level-3-260C-168HRS Purchase Samples
PTN78000HAZ ACTIVE Surface
Mount Module EUT 5 49 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR Request Free Samples
PTN78000HAZT ACTIVE Surface
Mount Module EUT 5 250 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR Purchase Samples
PTN78000WAH ACTIVE Through-
Hole Module EUS 5 56 Pb-Free (RoHS) SN N / A for Pkg Type Request Free Samples
PTN78000WAS ACTIVE Surface
Mount Module EUT 5 49 TBD SNPB Level-1-235C-UNLIM/
Level-3-260C-168HRS Request Free Samples
PTN78000WAST ACTIVE Surface
Mount Module EUT 5 250 TBD SNPB Level-1-235C-UNLIM/
Level-3-260C-168HRS Purchase Samples
PTN78000WAZ ACTIVE Surface
Mount Module EUT 5 49 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR Request Free Samples
PTN78000WAZT ACTIVE Surface
Mount Module EUT 5 250 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR Purchase Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
PACKAGE OPTION ADDENDUM
www.ti.com 13-Nov-2010
Addendum-Page 2
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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