PD - 94980 IRF9530NPbF HEXFET(R) Power MOSFET l l l l l l l Advanced Process Technology Dynamic dv/dt Rating 175C Operating Temperature Fast Switching P-Channel Fully Avalanche Rated Lead-Free D VDSS = -100V RDS(on) = 0.20 G ID = -14A S Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry. TO-220AB Absolute Maximum Ratings ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Parameter Max. Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw -14 -10 -56 79 0.53 20 250 -8.4 7.9 -5.0 -55 to + 175 Units A W W/C V mJ A mJ V/ns 300 (1.6mm from case ) 10 lbfin (1.1Nm) C Thermal Resistance Parameter RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Typ. Max. Units 0.50 1.9 62 C/W 02/04/04 IRF9530NPbF Electrical Characteristics @ TJ = 25C (unless otherwise specified) RDS(on) VGS(th) gfs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. -100 -2.0 3.2 Typ. -0.11 15 58 45 46 IDSS Drain-to-Source Leakage Current LD Internal Drain Inductance 4.5 LS Internal Source Inductance 7.5 Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance 760 260 170 V(BR)DSS V(BR)DSS/TJ IGSS Max. Units Conditions V VGS = 0V, ID = -250A V/C Reference to 25C, ID = -1mA 0.20 VGS = -10V, ID = -8.4A -4.0 V VDS = V GS, ID = -250A S VDS = -50V, ID = -8.4A -25 VDS = -100V, VGS = 0V A -250 VDS = -80V, VGS = 0V, TJ = 150C 100 VGS = 20V nA -100 VGS = -20V 58 ID = -8.4A 8.3 nC VDS = -80V 32 VGS = -10V, See Fig. 6 and 13 VDD = -50V ID = -8.4A ns RG = 9.1 RD = 6.2, See Fig. 10 Between lead, 6mm (0.25in.) nH G from package and center of die contact VGS = 0V pF VDS = -25V = 1.0MHz, See Fig. 5 D S Source-Drain Ratings and Characteristics IS I SM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol -14 showing the A G integral reverse -56 p-n junction diode. S -1.6 V TJ = 25C, IS = -8.4A, VGS = 0V 130 190 ns TJ = 25C, I F = -8.4A 650 970 nC di/dt = -100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by ISD -8.4A, di/dt -490A/s, VDD V(BR)DSS, Starting TJ = 25C, L = 7.0mH Pulse width 300s; duty cycle 2%. max. junction temperature. ( See fig. 11 ) RG = 25, IAS = -8.4A. (See Figure 12) TJ 175C IRF9530NPbF 100 100 VGS - 15V - 10V - 8.0V - 7.0V - 6.0V - 5.5V - 5.0V BOTTOM - 4.5V 10 -4.5V 1 20s PULSE WIDTH Tc = 25C A 0.1 0.1 1 10 10 -4.5V 1 2.5 R DS(on) , Drain-to-Source On Resistance (Normalized) -ID , Drain-to-Source Current (A) TJ = 25C TJ = 175C 1 VDS = -50V 20s PULSE WIDTH 5 6 7 8 9 -VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics 10 A 100 Fig 2. Typical Output Characteristics 100 0.1 1 -VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 10 20s PULSE WIDTH TC = 175C 0.1 0.1 100 -VDS , Drain-to-Source Voltage (V) 4 VGS - 15V - 10V - 8.0V - 7.0V - 6.0V - 5.5V - 5.0V BOTTOM - 4.5V TOP -ID , Drain-to-Source Current (A) -ID , Drain-to-Source Current (A) TOP 10 A ID = -14A 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0 VGS = -10V 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature ( C) Fig 4. Normalized On-Resistance Vs. Temperature IRF9530NPbF 2000 1200 -VGS , Gate-to-Source Voltage (V) 1600 C, Capacitance (pF) 20 V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd Ciss 800 Coss Crss 400 0 1 10 100 ID = -8.4A 15 10 5 0 A FOR TEST CIRCUIT SEE FIGURE 13 0 10 20 30 40 50 60 QG , Total Gate Charge (nC) -VDS , Drain-to-Source Voltage (V) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 100 1000 OPERATION IN THIS AREA LIMITED BY RDS(on) TJ = 150C -IID , Drain Current (A) -ISD , Reverse Drain Current (A) VDS =-80V VDS =-50V VDS =-20V 10 100 TJ = 25C 1 10us 100us 10 1ms VGS = 0V 0.1 0.4 0.6 0.8 1.0 1.2 1.4 -VSD , Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage A 1.6 1 TC = 25 C TJ = 175 C Single Pulse 1 10ms 10 100 -VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area 1000 IRF9530NPbF 14 RD V DS -ID , Drain Current (A) 12 VGS D.U.T. RG 10 - + 8 VDD -10V Pulse Width 1 s Duty Factor 0.1 % 6 Fig 10a. Switching Time Test Circuit 4 2 td(on) tr t d(off) tf VGS 0 25 50 75 100 125 150 TC , Case Temperature ( C) 175 10% 90% Fig 9. Maximum Drain Current Vs. Case Temperature VDS Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 1 D = 0.50 0.20 0.10 PDM 0.05 0.1 0.01 0.00001 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1 IRF9530NPbF IAS tp VDD A DRIVER 0.01 15V Fig 12a. Unclamped Inductive Test Circuit I AS EAS , Single Pulse Avalanche Energy (mJ) D.U.T RG -20V 700 L VDS ID -3.4A -5.9A BOTTOM -8.4A TOP 600 500 400 300 200 100 0 25 50 75 100 125 150 Starting TJ , Junction Temperature ( C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current tp V(BR)DSS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. QG 50K 12V -10V QGS .2F .3F QGD D.U.T. +VDS VGS VG -3mA Charge Fig 13a. Basic Gate Charge Waveform IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 175 IRF9530NPbF Peak Diode Recovery dv/dt Test Circuit + D.U.T* Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer + - - + RG * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test VGS * + - V DD Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode [VDD] Forward Drop Inductor Curent Ripple 5% *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For P-Channel HEXFETS [ISD ] IRF9530NPbF TO-220AB Package Outline Dimensions are shown in millimeters (inches) 10.54 (.415) 10.29 (.405) 2.87 (.113) 2.62 (.103) -B- 3.78 (.149) 3.54 (.139) 4.69 (.185) 4.20 (.165) -A- 1.32 (.052) 1.22 (.048) 6.47 (.255) 6.10 (.240) 4 15.24 (.600) 14.84 (.584) LEAD ASSIGNMENTS 1.15 (.045) MIN 1 2 3 4- DRAIN 14.09 (.555) 13.47 (.530) 4- COLLECTOR 4.06 (.160) 3.55 (.140) 3X 3X LEAD ASSIGNMENTS IGBTs, CoPACK 1 - GATE 2 - DRAIN 1- GATE 1- GATE 3 - SOURCE 2- COLLECTOR 2- DRAIN 3- SOURCE 3- EMITTER 4 - DRAIN HEXFET 1.40 (.055) 1.15 (.045) 0.93 (.037) 0.69 (.027) 0.36 (.014) 3X M B A M 0.55 (.022) 0.46 (.018) 2.92 (.115) 2.64 (.104) 2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO-220AB Part Marking Information E XAMPL E : T HIS IS AN IR F 1010 LOT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y LINE "C" Note: "P" in assembly line position indicates "Lead-Free" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE PAR T NU MB E R DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.02/04 Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/