TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com 8-CHANNEL CONSTANT-CURRENT LED SINK DRIVERS Check for Samples: TLC5916, TLC5917 FEATURES 1 * * * * * * * * * * * * * Eight Constant-Current Output Channels Output Current Adjusted Through Single External Resistor Constant Output Current Range: 3 mA to 120 mA per Channel Constant Output Current Invariant to Load Voltage Change Open Load, Short Load and Overtemperature Detection 256-Step Programmable Global Current Gain Excellent Output Current Accuracy: - Between Channels: < 3% (Max) - Between ICs: < 6% (Max) Fast Response of Output Current 30-MHz Clock Frequency Schmitt-Trigger Input 3.3-V or 5-V Supply Voltage Maximum LED Voltage 20-V Thermal Shutdown for Overtemperature Protection ABSTRACT The TLC5916 / TLC5917 Constant-Current LED Sink Drivers are designed to work alone or cascaded. Since each output is independently controlled, they can be programmed to be on or off by the user. The high LED voltage (VLED) allows for the use of a single LED per output or multiple LEDs on a single string. With independently controlled outputs supplied with constant current, the LEDs can be combined in parallel to create higher currents on a single string. The constant sink current for all channels is set through a single external resistor. This allows different LED drivers in the same application to sink various currents which provides optional implementation of multi-color LEDs. An additional advantage of the independent outputs is the ability to leave unused channels floating. The flexibility of the TLC5916 / TLC5917 LED drivers is ideal for applications such as (but not limited to): 7-segment displays, scrolling single color displays, gaming machines, white goods, video billboards and video panels. 3.0V to 5.5V VLED APPLICATIONS SDI SDI CLK CLK LE LE OE OE OUT7 . . . OUT6 OUT1 OUT0 General LED Lighting Applications LED Display Systems LED Signage Automotive LED Lighting White Goods Gaming Machines/Entertainment Controller * * * * * * . . . VDD TLC5917 SDO R-EXT To Controller if Error Detection Used 720 GND Single Driver 26 mA Application Single Implementation of TLC5916/TLC5917 Device 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. (c) 2007-2011, Texas Instruments Incorporated TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. DESCRIPTION/ORDERING INFORMATION The TLC5916/TLC5917 is designed for LED displays and LED lighting applications with constant-current control and open-load, shorted-load, and overtemperature detection. The TLC5916/TLC5917 contains an 8-bit shift register and data latches, which convert serial input data into parallel output format. At the output stage, eight regulated current ports are designed to provide uniform and constant current for driving LEDs within a wide range of LED Forward Voltage (VF) variations. Used in system design for LED display applications, e.g., LED panels, it provides great flexibility and device performance. Users can adjust the output current from 3 mA to 120 mA per channel through an external resistor, Rext, which gives flexibility in controlling the light intensity of LEDs. The devices are designed for up to 20 V at the output port. The high clock frequency, 30 MHz, also satisfies the system requirements of high-volume data transmission. The TLC5916/TLC5917 provides two operation modes: Normal Mode and Special Mode. Normal mode is used for shifting LED data into and out of the driver. Special Mode includes two functions: Error Detection and Current Gain Control. The two operation modes include three phases: Normal Mode phase, Mode Switching transition phase, and Special Mode phase. The signal on the multiple function pin OE(ED2) is monitored to determine the mode. When a one-clock-wide pulse appears on OE(ED2), the device enters the Mode Switching phase. At this time, the voltage level on LE(ED1) determines which mode the TLC5916/TLC5917 switches to. In the Normal Mode phase, the serial data can be transferred into TLC5916/TLC5917 via the pin SDI, shifted in the shift register, and transferred out via the pin SDO. LE(ED1) can latch the serial data in the shift register to the output latch. OE(ED2) enables the output drivers to sink current. In the Special Mode phase, the low-voltage-level signal on OE(ED2) can enable output channels and detect the status of the output current to determine if the driving current level is sufficient. The detected Error Status is loaded into the 8-bit shift register and shifted out via the pin SDO, synchronous to the CLK signal. The system controller can read the error status and determine if the LEDs are properly lit. In the Special Mode phase, the TLC5916/TLC5917 allows users to adjust the output current level by setting a runtime-programmable Configuration Code. The code is sent into the TLC5916/TLC5917 via SDI. The positive pulse of LE(ED1) latches the code in the shift register into a built-in 8-bit configuration latch, instead of the output latch. The code affects the voltage at the terminal R-EXT and controls the output-current regulator. The output current can be finely adjusted by a gain ranging from 1/12 to 127/128 in 256 steps. Therefore, the current skew between ICs can be compensated within less than 1%. This feature is suitable for white balancing in LED color display panels. Table 1. ORDERING INFORMATION (1) TA SHORT TO VLED DETECTION PACKAGE (2) PDIP - N No SOIC - D TSSOP - PW -40C to 125C PDIP - N Yes SOIC - D TSSOP - PW (1) (2) 2 ORDERABLE PART NUMBER Tube of 25 TLC5916IN Tube of 40 TLC5916ID Reel of 2500 TLC5916IDR Tube of 90 TLC5916IPW Reel of 2000 TLC5916IPWR Tube of 25 TLC5917IN Tube of 40 TLC5917ID Reel of 2500 TLC5917IDR Tube of 90 TLC5917IPW Reel of 2000 TLC5917IPWR TOP-SIDE MARKING TLC5916IN TLC5916I Y5916 TLC5917IN TLC5917I Y5917 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com BLOCK DIAGRAM OUT0 OUT1 OUT6 OUT7 I/O Regulator R-EXT 8 OE(ED2) Output Driver and Error Detection Control Logic 8 8 VDD 8-Bit Output Latch LE(ED1) Configuration Latches 8 CLK 8 SDI 8-Bit Shift Register SDO 8 Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 3 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com D, N, OR PW PACKAGE (TOP VIEW) GND SDI CLK LE(ED1) OUT0 OUT1 OUT2 OUT3 1 16 2 15 3 14 4 5 13 12 6 11 7 10 8 9 VDD R-EXT SDO OE(ED2) OUT7 OUT6 OUT5 OUT4 Terminal Descriptions TERMINAL NAME DESCRIPTION CLK Clock input for data shift on rising edge GND Ground for control logic and current sink LE(ED1) Data strobe input Serial data is transferred to the respective latch when LE(ED1) is high. The data is latched when LE(ED1) goes low. Also, a control signal input for an Error Detection Mode and Current Adjust Mode (see Timing Diagram). LE(ED1) has an internal pulldown. OE(ED2) Output enable. When OE(ED2) is active (low), the output drivers are enabled; when OE(ED2) is high, all output drivers are turned OFF (blanked). Also, a control signal input for an Error Detection Mode and Current Adjust Mode (see Figure 1). OE(ED2) has an internal pullup. OUT0-OUT7 Constant-current outputs R-EXT External Resistor - Connect an external resistor to ground to set the current for all outputs SDI Serial-data input to the Shift register SDO Serial-data output to the following SDI of next driver IC or to the microcontroller VDD Supply voltage Table 2. Diagnostic Features OVERTEMPERATURE DETECTION OPEN-LOAD DETECTION SHORT TO GND DETECTION TLC5916 X X X TLC5917 X X X DEVICE (1) (1) 4 SHORT TO VLED DETECTION X The device has one single error register for all these conditions (one error bit per channel). Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com Timing Diagram 0 1 2 3 4 5 6 7 CLK OE(ED2) 1 LE(ED1) 0 SDI off OUT0 on off OUT1 on off OUT2 on off OUT3 on off OUT7 on Don't care SDO Figure 1. Normal Mode Table 3. Truth Table in Normal Mode CLK LE(ED1) OE(ED2) SDI OUT0...OUT7 SDO H L Dn Dn...Dn - 7 Dn - 7 L L Dn + 1 No change Dn - 6 H L Dn + 2 Dn + 2...Dn - 5 Dn - 5 X L Dn + 3 Dn + 2...Dn - 5 Dn - 5 X H Dn + 3 Off Dn - 5 The signal sequence shown in Figure 2 makes the TLC5916/TLC5917 enter Current Adjust and Error Detection Mode. 1 2 3 4 5 OE(ED2) 1 0 1 1 1 LE(ED1) 0 0 0 1 0 CLK Figure 2. Switching to Special Mode Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 5 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com In the Current Adjust Mode, sending the positive pulse of LE(ED1), the content of the shift register (a current adjust code) is written to the 8-bit configuration latch (see Figure 3). 0 1 2 6 3 7 CLK OE(ED2) 1 LE(ED1) 0 8-bit Configuration Code SDI Figure 3. Writing Configuration Code When the TLC5916/TLC5917 is in the Error Detection Mode, the signal sequence shown in Figure 4 enables a system controller to read error status codes through SDO. 1 2 3 CLK >2 s OE(ED2) 1 LE(ED1) 0 SDO Error Status Code Figure 4. Reading Error Status Code The signal sequence shown in Figure 5 makes TLC5916/TLC5917 resume the Normal Mode. Switching to Normal Mode resets all internal Error Status registers. OE(ED2) always enables the output port, whether the TLC5916/TLC5917 enters Current Adjust Mode or not. 1 2 3 4 5 OE(ED2) 1 0 1 1 1 LE(ED1) 0 0 0 0 0 CLK Figure 5. Switching to Normal Mode 6 Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VDD Supply voltage range 0 7 V VI Input voltage range -0.4 VDD + 0.4 V VO Output voltage range -0.5 20 V fclk Clock frequency 25 MHz IOUT Output current 120 mA IGND GND terminal current 960 mA TA Operating free-air temperature range -40 125 C TJ Operating junction temperature range -40 150 C Tstg Storage temperature range -55 150 C ESD Electrostatic discharge capability, V(HBMESD) 1.5 kV 100 pF, 1.5 k THERMAL INFORMATION TLC5916 THERMAL METRIC (1) TLC5917 16 PINS 16 PINS UNITS D N PW D N PW JA Junction-to-ambient thermal resistance 87.4 51.8 113.9 87.4 51.8 114.8 JCtop Junction-to-case (top) thermal resistance 48.1 39.1 35.2 48.1 39.1 35.9 JB Junction-to-board thermal resistance 44.4 31.8 59.2 44.4 31.8 59.8 JT Junction-to-top characterization parameter 12.5 23.9 1.3 12.5 23.9 1.3 JB Junction-to-board characterization parameter 44.2 31.7 58.5 44.2 31.7 59.2 JCbot Junction-to-case (bottom) thermal resistance n/a n/a n/a n/a n/a n.a (1) C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 7 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com Recommended Operating Conditions CONDITIONS VDD Supply voltage VO Supply voltage to output pins MIN MAX 3 5.5 V 20 V OUT0-OUT7 VO 0.6 V 3 UNIT IO Output current DC test circuit IOH High-level output current source SDO shorted to GND -1 IOL Low-level output current sink SDO shorted to VCC 1 VIH High-level input voltage CLK, OE(ED2), LE(ED1), and SDI 0.7 x VDD VDD V VIL Low-level input voltage CLK, OE(ED2), LE(ED1), and SDI 0 0.3 x VDD V VO 1 V 120 mA mA mA Recommended Timing VDD = 3 V to 5.5 V (unless otherwise noted) CONDITIONS tw(L) LE(ED1) pulse duration Normal Mode tw(CLK) CLK pulse duration Normal Mode MIN MAX UNIT 20 ns 20 ns Normal Mode, IOUT < 60 mA 500 Normal Mode, IOUT > 60 mA 700 tw(OE) OE(ED2) pulse duration tsu(D) Setup time for SDI Normal Mode 3 ns th(D) Hold time for SDI Normal Mode 2 ns tsu(L) Setup time for LE(ED1) Normal Mode 15 ns th(L) Hold time for LE(ED1) Normal Mode 15 ns tw(CLK) CLK pulse duration Error Detection Mode 20 ns tw(ED2) OE(ED2) pulse duration Error Detection Mode 2000 ns tsu(ED1) Setup time for LE(ED1) Error Detection Mode 4 ns th(ED1) Hold time for LE(ED1) Error Detection Mode 10 ns tsu(ED2) Setup time for OE(ED2) Error Detection Mode 6 ns th(ED2) Hold time for OE(ED2) Error Detection Mode 10 ns fCLK Clock frequency Cascade operation 8 Submit Documentation Feedback ns 30 MHz (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com Electrical Characteristics VDD = 3 V, TJ = -40C to 125C (unless otherwise noted) PARAMETER TEST CONDITIONS VDD Input voltage VO Supply voltage to the output pins MIN TYP (1) 3 VO 0.6 V IO Output current IOH High-level output current, source IOL Low-level output current, sink VIH High-level input voltage VIL Low-level input voltage MAX 5.5 V 20 V 3 VO 1 V UNIT 120 -1 mA mA 1 mA 0.7 x VDD VDD V GND 0.3 x VDD V TJ = 25C 0.5 A Ileak Output leakage current VOH = 17 V VOH High-level output voltage SDO, IOL = -1 mA VOL Low-level output voltage SDO, IOH = 1 mA Output current 1 VOUT = 0.6 V, Rext = 720 , CG = 0.992 26 Output current error, die-die IOL = 26 mA, VO = 0.6 V, Rext = 720 , TJ = 25C 3 6 % Output current skew, channel-to-channel IOL = 26 mA, VO = 0.6 V, Rext = 720 , TJ = 25C 1.5 3 % Output current 2 VO = 0.8 V, Rext = 360 , CG = 0.992 52 Output current error, die-die IOL = 52 mA, VO = 0.8 V, Rext = 360 , TJ = 25C 2 6 % Output current skew, channel-to-channel IOL = 52 mA, VO = 0.8 V, Rext = 360 , TJ = 25C 1.5 3 % VO = 1 V to 3 V, IO = 26 mA 0.1 IO(1) IO(2) IOUT vs VOUT Output current vs output voltage regulation TJ = 125C 2 VDD - 0.4 VDD = 3.0 V to 5.5 V, IO = 26 mA/120 mA %/V OE(ED2) 500 k Pulldown resistance LE(ED1) 500 k (2) Overtemperature shutdown Restart temperature hysteresis (2) IOUT,Th Threshold current for open error detection IOUT,target = 3 mA to 120 mA VOUT,TTh Trigger threshold voltage for short-error detection (TLC5917 only) IOUT,target = 3 mA to 120 mA 2.5 VOUT, RTh Return threshold voltage for short-error detection (TLC5917 only) IOUT,target = 3 mA to 120 mA 2.2 150 Rext = Open (2) mA Pullup resistance Thys (1) V mA 1 Tsd IDD V 0.4 Supply current 175 200 C 15 C 0.5 x Itarget % 2.7 3.1 V V 5 10 Rext = 720 8 14 Rext = 360 11 18 Rext = 180 16 22 mA Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the application and configuration and may vary over time. Typical values are not ensured on production material. Specified by design. Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 9 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com Electrical Characteristics VDD = 5.5 V, TJ = -40C to 125C (unless otherwise noted) PARAMETER TEST CONDITIONS VDD Input voltage VO Supply voltage to the output pins MIN TYP (1) 3 VO 0.6 V IO Output current IOH High-level output current, source IOL Low-level output current, sink VIH High-level input voltage VIL Low-level input voltage MAX 5.5 V 20 V 3 VO 1 V UNIT 120 -1 mA mA 1 mA 0.7 x VDD VDD V GND 0.3 x VDD V TJ = 25C 0.5 A Ileak Output leakage current VOH = 17 V VOH High-level output voltage SDO, IOL = -1 mA VOL Low-level output voltage SDO, IOH = 1 mA Output current 1 VOUT = 0.6 V, Rext = 720 , CG = 0.992 26 Output current error, die-die IOL = 26 mA, VO = 0.6 V, Rext = 720 , TJ = 25C 3 6 % Output current skew, channel-to-channel IOL = 26 mA, VO = 0.6 V, Rext = 720 , TJ = 25C 1.5 3 % Output current 2 VO = 0.8 V, Rext = 360 , CG = 0.992 52 Output current error, die-die IOL = 52 mA, VO = 0.8 V, Rext = 360 , TJ = 25C 2 6 % Output current skew, channel-to-channel IOL = 52 mA, VO = 0.8 V, Rext = 360 , TJ = 25C 1.5 3 % VO = 1 V to 3 V , IO = 26 mA 0.1 IO(1) IO(2) IOUT vs VOUT Output current vs output voltage regulation TJ = 125C 2 VDD - 0.4 VDD = 3.0 V to 5.5 V, IO = 26 mA/120 mA OE(ED2), 500 k LE(ED1), 500 k (2) Restart temperature hysteresis (2) IOUT,Th Threshold current for open error detection IOUT,target = 3 mA to 120 mA VOUT,TTh Trigger threshold voltage for short-error detection (TLC5917 only) IOUT,target = 3 mA to 120 mA 2.5 VOUT, RTh Return threshold voltage for short-error detection (TLC5917 only) IOUT,target = 3 mA to 120 mA 2.2 10 %/V Pulldown resistance Overtemperature shutdown (2) mA Pullup resistance Thys (1) V mA 1 Tsd IDD V 0.4 Supply current 150 175 200 C 15 C 0.5 x Itarget % 2.7 3.1 V V Rext = Open 6 10 Rext = 720 11 14 Rext = 360 13 18 Rext = 180 19 24 mA Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the application and configuration and may vary over time. Typical values are not ensured on production material. Specified by design. Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com Switching Characteristics VDD = 3 V, TJ = -40C to 125C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT tPLH1 Low-to-high propagation delay time, CLK to OUTn 40 65 95 ns tPLH2 Low-to-high propagation delay time, LE(ED1) to OUTn 40 65 95 ns tPLH3 Low-to-high propagation delay time, OE(ED2) to OUTn 40 65 95 ns tPLH4 Low-to-high propagation delay time, CLK to SDO 12 20 30 ns tPHL1 High-to-low propagation delay time, CLK to OUTn 300 365 ns tPHL2 High-to-low propagation delay time, LE(ED1) to OUTn 300 365 ns tPHL3 High-to-low propagation delay time, OE(ED2) to OUTn 300 365 ns tPHL4 High-to-low propagation delay time, CLK to SDO 12 20 30 ns tw(CLK) Pulse duration, CLK 20 ns tw(L) Pulse duration, LE(ED1) 20 ns tw(OE) Pulse duration, OE(ED2) tw(ED2) Pulse duration, OE(ED2) in Error Detection Mode th(ED1,ED2) Hold time, LE(ED1) and OE(ED2) th(D) Hold time, SDI tsu(D,ED1) Setup time, SDI, LE(ED1) tsu(ED2) Setup time, OE(ED2) th(L) Hold time, LE(ED1), Normal Mode 15 ns tsu(L) Setup time, LE(ED1), Normal Mode 15 tr Rise time, CLK (2) 500 ns tf Fall time, CLK (2) 500 ns tor Rise time, outputs (off) 85 105 ns tor Rise time, outputs (off), TJ = 25C 83 100 ns tof Rise time, outputs (on) 280 370 ns tof Rise time, outputs (on), TJ = 25C 170 225 ns fCLK Clock frequency 30 MHz (1) (2) VIH = VDD, VIL = GND, Rext = 360 , VL = 4 V, RL = 44 , CL = 10 pF, CG = 0.992 500 ns 2 s 10 ns 2 ns 3 ns 8.5 ns 40 100 Cascade operation ns Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the application and configuration and may vary over time. Typical values are not ensured on production material. If the devices are connected in cascade and tr or tf is large, it may be critical to achieve the timing required for data transfer between two cascaded devices. Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 11 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com Switching Characteristics VDD = 5.5 V, TJ = -40C to 125C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT tPLH1 Low-to-high propagation delay time, CLK to OUTn 40 65 95 ns tPLH2 Low-to-high propagation delay time, LE(ED1) to OUTn 40 65 95 ns tPLH3 Low-to-high propagation delay time, OE(ED2) to OUTn 40 65 95 ns tPLH4 Low-to-high propagation delay time, CLK to SDO 8 20 30 ns tPHL1 High-to-low propagation delay time, CLK to OUTn 300 365 ns tPHL2 High-to-low propagation delay time, LE(ED1) to OUTn 300 365 ns tPHL3 High-to-low propagation delay time, OE(ED2) to OUTn 300 365 ns tPHL4 High-to-low propagation delay time, CLK to SDO 20 30 ns tw(CLK) Pulse duration, CLK 20 ns tw(L) Pulse duration, LE(ED1) 20 ns tw(OE) Pulse duration, OE(ED2) tw(ED2) Pulse duration, OE(ED2) in Error Detection Mode th(D,ED1,ED2) Hold time, SDI, LE(ED1), and OE(ED2) th(D) Hold time, SDI tsu(D,ED1) Setup time, SDI, LE(ED1) tsu(ED2) Setup time, OE(ED2) th(L) Hold time, LE(ED1), Normal Mode 15 ns tsu(L) Setup time, LE(ED1), Normal Mode 15 tr Rise time, CLK (2) 500 ns tf Fall time, CLK (2) 500 ns tor Rise time, outputs (off) 85 105 ns tor Rise time, outputs (off), TJ = 25C 83 100 ns tof Rise time, outputs (on) 280 370 ns tof Rise time, outputs (on), TJ = 25C 170 225 ns fCLK Clock frequency 30 MHz (1) (2) 12 8 VIH = VDD, VIL = GND, Rext = 360 , VL = 4 V, RL = 44 , CL = 10 pF, CG = 0.992 500 ns 2 s 10 ns 2 ns 3 ns 8.5 ns 40 100 Cascade operation ns Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the application and configuration and may vary over time. Typical values are not ensured on production material. If the devices are connected in cascade and tr or tf is large, it may be critical to achieve the timing required for data transfer between two cascaded devices. Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION IDD VDD OE(ED2) IIH, IIL IOUT OUT0 CLK LE(ED1) OUT7 SDI VIH, VIL R-EXT GND SDO Iref Figure 6. Test Circuit for Electrical Characteristics IDD IOUT VDD VIH, VIL OE(ED2) CLK LE(ED1) Function Generator OUT0 OUT7 RL CL SDI Logic Input Waveform VIH = 5 V VIL = 0V R-EXT GND SDO Iref CL VL Figure 7. Test Circuit for Switching Characteristics Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 13 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) tw(CLK) 50% CLK 50% tsu(D) SDI 50% 50% th(D) 50% 50% tPLH4, tPHL4 50% SDO tw(L) 50% LE(ED1) tsu(L) th(L) OE(ED2) LOW tPLH2, tPHL2 Output off OUTn 50% Output on tPLH1, tPHL1 tw(OE) OE(ED2) HIGH 50% 50% tPLH3 tPHL3 Output off OUTn 80% 80% 50% 50% 20% tof 20% tor Figure 8. Normal Mode Timing Waveforms 14 Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) tw(CLK) 50% CLK tsu(ED2) OE(ED2) th(ED2) 50% tsu(ED1) LE(ED1) th(ED1) 50% 2 CLK Figure 9. Switching to Special Mode Timing Waveforms CLK OE(ED2) 50% 50% tw(ED2) Figure 10. Reading Error Status Code Timing Waveforms Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 15 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS LE = 5 V (active) OE = GND (active) CLK OUTn Figure 11. Response Time, CLK to OUTn Turn on only one channel Channel 1 OE OUT1 Figure 12. Response Time, OE to OUT1 16 Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) Turn on only one channel Channel 8 OE OUT7 Figure 13. Response Time, OE to OUT7 150 Temperature = 25C IO = 120 mA 125 Output Current (mA) IO = 100 mA 100 IO = 80 mA 75 IO = 60 mA 50 IO = 40 mA IO = 20 mA 25 IO = 5 mA 0 0 0.5 1 1.5 2 2.5 3 Output Voltage (V) Figure 14. Output Current vs Output Voltage Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 17 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com APPLICATION INFORMATION Operating Principles Constant Current In LED display applications, TLC5916/TLC5917 provides nearly no current variations from channel to channel and from IC to IC. While 5 mA IOUT 100 mA, the maximum current skew between channels is less than 3% and between ICs is less than 6%. Adjusting Output Current TLC5916/TLC5917 scales up the reference current, Iref, set by the external resistor Rext to sink a current, Iout, at each output port. Users can follow the below formulas to calculate the target output current IOUT,target in the saturation region. In the equations, Rext is the resistance of the external resistor connected between the R-EXT terminal and ground and VR-EXT is the voltage of R-EXT, which is controlled by the programmable voltage gain (VG). VG is defined by the Configuration Code. VR-EXT = 1.26 V x VG Iref = VR-EXT/Rext, IOUT,target = Iref x 15 x 3CM - 1 The Current Multiplier (CM) determines that the ratio IOUT,target/Iref is 15 or 5. After power on, the default value of VG is 127/128 = 0.992, and the default value of CM is 1, so that the ratio IOUT,target/Iref = 15. Based on the default VG and CM: VR-EXT = 1.26 V x 127/128 = 1.25 V IOUT,target = (1.25 V/Rext) x 15 Therefore, the default current is approximately 52 mA at 360 and 26 mA at 720 . The default relationship after power on between IOUT,target and Rext is shown in Figure 15. 140 120 IOUT (mA) 100 80 60 40 20 0 0 1000 2000 3000 4000 5000 6000 Rext () Figure 15. Default Relationship Curve Between IOUT,target and Rext After Power Up Typical Applications Figure 16 shows implementation of a single TLC5916/TLC5917 device. Figure 17 shows a cascaded driver implementation. 18 Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com 3.0V to 5.5V VLED Controller SDI SDI CLK CLK LE LE OE OE . . . OUT7 OUT6 OUT1 OUT0 . . . VDD TLC5917 To Controller if Error Detection Used SDO 720 R-EXT GND Single Driver 26 mA Application Figure 16. Single Implementation of TLC5916/TLC5917 Device VLED ... ... ... R-EXT SDI 720 R-EXT OUT7 SDO 720 R-EXT LE GND CLK OE LE GND CLK OE LE SDO OE SDI 720 VDD ... TLC5917 SDO GND CLK ... VDD TLC5917 SDI TLC5917 VDD OUT0 ... OUT7 OUT0 ... OUT7 OUT0 VDD: 3.0V to 5.5V Controller SDI CLK LE OE Read Back Multiple Cascaded Drivers 26mA Application Figure 17. Cascading Implementation of TLC5916/TLC5917 Device Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 19 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com Operation Phases Operation Mode Switching To switch between its two modes, TLC5916/TLC5917 monitors the signal OE(ED2). When an one-clock-wide pulse of OE(ED2) appears, TLC5916/TLC5917 enters the two-clock-period transition phase, the Mode Switching phase. After power on, the default operation mode is the Normal Mode (see Figure 18). Switching to Special Mode 1 2 3 Switching to Normal Mode 4 5 1 CLK 2 3 4 5 CLK OE(ED2) 1 0 1 1 1 OE(ED2) 1 0 1 1 1 LE(ED1) 0 0 0 1 0 LE(ED1) 0 0 0 0 0 Actual Mode Phase (Normal or Special) Mode Switching Special Mode Actual Mode Phase (Normal or Special) Mode Switching Normal Mode Figure 18. Mode Switching As shown in Figure 18, once a one-clock-wide short pulse (101) of OE(ED2) appears, TLC5916/TLC5917 enters the Mode Switching phase. At the fourth rising edge of CLK, if LE(ED1) is sampled as voltage high, TLC5916/TLC5917 switches to Special Mode; otherwise, it switches to Normal Mode. The signal LE(ED1) between the third and the fifth rising edges of CLK cannot latch any data. Its level is used only to determine into which mode to switch. However, the short pulse of OE(ED2) can still enable the output ports. During mode switching, the serial data can still be transferred through SDI and shifted out from SDO. NOTES: 1. The signal sequence for the mode switching may be used frequently to ensure that TLC5916/TLC5917 is in the proper mode. 2. The 1 and 0 on the LE(ED1) signal are sampled at the rising edge of CLK. The X means its level does not affect the result of mode switching mechanism. 3. After power on, the default operation mode is Normal Mode. Normal Mode Phase Serial data is transferred into TLC5916/TLC5917 via SDI, shifted in the Shift Register, and output via SDO. LE(ED1) can latch the serial data in the Shift Register to the Output Latch. OE(ED2) enables the output drivers to sink current. These functions differ only as described in Operation Mode Switching, in which case, a short pulse triggers TLC5916/TLC5917 to switch the operation mode. However, as long as LE(ED1) is high in the Mode Switching phase, TLC5916/TLC5917 remains in the Normal Mode, as if no mode switching occurred. Special Mode Phase In the Special Mode, as long as OE(ED2) is not low, the serial data is shifted to the Shift Register via SDI and shifted out via SDO, as in the Normal Mode. However, there are two differences between the Special Mode and the Normal Mode, as shown in the following sections. 20 Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com Reading Error Status Code in Special Mode When OE(ED2) is pulled low while in Special Mode, error detection and load error status codes are loaded into the Shift Register, in addition to enabling output ports to sink current. Figure 19 shows the timing sequence for error detection. The 0 and 1 signal levels are sampled at the rising edge of each CLK. At least three zeros must be sampled at the voltage low signal OE(ED2). Immediately after the second zero is sampled, the data input source of the Shift Register changes to the 8-bit parallel Error Status Code register, instead of from the serial data on SDI. Normally, the error status codes are generated at least 2 s after the falling edge of OE(ED2). The occurrence of the third or later zero saves the detected error status codes into the Shift Register. Therefore, when OE(ED2) is low, the serial data cannot be shifted into TLC5916/TLC5917 via SDI. When OE(ED2) is pulled high, the data input source of the Shift Register is changed back to SDI. At the same time, the output ports are disabled and the error detection is completed. Then, the error status codes saved in the Shift Register can be shifted out via SDO bit by bit along with CLK, as well as the new serial data can be shifted into TLC5916/TLC5917 via SDI. While in Special Mode, the TLC5916/TLC5917 cannot simultaneously transfer serial data and detect LED load error status. 1 2 3 CLK >2 s OE(ED2) 1 0 0 0 0 0 1 1 1 1 LE(ED1) 0 0 0 0 0 0 0 0 0 0 Error Status Code SDO Bit 7 Data source of shift register Error Detection SDI Bit 6 Bit 5 Bit 4 SDI Figure 19. Reading Error Status Code Writing Configuration Code in Special Mode When in Special Mode, the active high signal LE(ED1) latches the serial data in the Shift Register to the Configuration Latch, instead of the Output Latch. The latched serial data is used as the Configuration Code. The code is stored until power off or the Configuration Latch is rewritten. As shown in Figure 20, the timing for writing the Configuration Code is the same as the timing in the Normal Mode to latching output channel data. Both the Configuration Code and Error Status Code are transferred in the common 8-bit Shift Register. Users must pay attention to the sequence of error detection and current adjustment to avoid the Configuration Code being overwritten by Error Status Code. 0 1 2 3 4 5 6 7 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 CLK OE(ED2) 1 LE(ED1) 0 Bit 7 Bit 6 SDI 8-Bit Configuration Code Figure 20. Writing Configuration Code Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 21 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com Open-Circuit Detection Principle The LED Open-Circuit Detection compares the effective current level Iout with the open load detection threshold current IOUT,Th. If IOUT is below the IOUT,Th threshold, the TLC5916/TLC5917 detects an open-load condition. This error status can be read as an error status code in the Special Mode. For open-circuit error detection, a channel must be on. Table 4. Open-Circuit Detection STATE OF OUTPUT PORT CONDITION OF OUTPUT CURRENT ERROR STATUS CODE MEANING IOUT = 0 mA Off On (1) 0 Detection not possible IOUT < IOUT,Th (1) 0 Open circuit IOUT IOUT,Th (1) Channel n error status bit 1 Normal IOUT,Th = 0.5 x IOUT,target (typical) Short-Circuit Detection Principle (TLC5917 Only) The LED short-circuit detection compares the effective voltage level (VOUT) with the shorted-load detection threshold voltages VOUT,TTh and VOUT,RTh. If VOUT is above the VOUT,TTh threshold, the TLC5917 detects an shorted-load condition. If VOUT is below the VOUT,RTh threshold, no error is detected/error bit is reset. This error status can be read as an error status code in the Special Mode. For short-circuit error detection, a channel must be on. Table 5. Shorted-Load Detection STATE OF OUTPUT PORT CONDITION OF OUTPUT VOLTAGE ERROR STATUS CODE MEANING Off IOUT = 0 mA 0 Detection not possible VOUT VOUT,TTh 0 Short circuit VOUT < VOUT,RTh 1 Normal On Minimum Return Threshold Minimum Trigger Threshold Maximum Trigger Threshold 2.2 V 2.5 V 3.1 V No Fault Short Fault VOUT,RTh VOUT,TTh VOUT Figure 21. Short-Circuit Detection Principle 22 Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com Overtemperature Detection and Shutdown TLC5916/TLC5917 is equipped with a global overtemperature sensor and eight individual, channel-specific, overtemperature sensors. * When the global sensor reaches the trip temperature, all output channels are shut down, and the error status is stored in the internal Error Status register of every channel. After shutdown, the channels automatically restart after cooling down, if the control signal (output latch) remains on. The stored error status is not reset after cooling down and can be read out as the error status code in the Special Mode. * When one of the channel-specific sensors reaches trip temperature, only the affected output channel is shut down, and the error status is stored only in the internal Error Status register of the affected channel. After shutdown, the channel automatically restarts after cooling down, if the control signal (output latch) remains on. The stored error status is not reset after cooling down and can be read out as error status code in the Special Mode. For channel-specific overtemperature error detection, a channel must be on. The error status code is reset when TLC5916/TLC5917 returns to Normal Mode. Table 6. Overtemperature Detection (1) (1) STATE OF OUTPUT PORT CONDITION ERROR STATUS CODE Off IOUT = 0 mA 0 MEANING On On all channels Off Tj < Tj,trip global 1 Normal Tj > Tj,trip global All error status bits = 0 Global overtemperature On On Off Tj < Tj,trip channel n 1 Normal Tj > Tj,trip channel n Channel n error status bit = 0 Channel n overtemperature The global shutdown threshold temperature is approximately 170C. Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 23 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com 8-Bit Configuration Code and Current Gain Bit definition of the Configuration Code in the Configuration Latch is shown in Table 7. Table 7. Bit Definition of 8-Bit Configuration Code Meaning Default Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 CM HC CC0 CC1 CC2 CC3 CC4 CC5 1 1 1 1 1 1 1 1 Bit 7 is first sent into TLC5916/TLC5917 via SDI. Bits 1 to 7 {HC, CC[0:5]} determine the voltage gain (VG) that affects the voltage at R-EXT and indirectly affects the reference current, Iref, flowing through the external resistor at R-EXT. Bit 0 is the Current Multiplier (CM) that determines the ratio IOUT,target/Iref. Each combination of VG and CM gives a specific Current Gain (CG). * VG: the relationship between {HC,CC[0:5]} and the voltage gain is calculated as shown below: VG = (1 + HC) x (1 + D/64) / 4 D = CC0 x 25 + CC1 x 24 + CC2 x 23 + CC3 x 22 + CC4 x 21 + CC5 x 20 Where HC is 1 or 0, and D is the binary value of CC[0:5]. So, the VG could be regarded as a floating-point number with 1-bit exponent HC and 6-bit mantissa CC[0:5]. {HC,CC[0:5]} divides the programmable voltage gain VG into 128 steps and two sub-bands: Low voltage sub-band (HC = 0): VG = 1/4 ~ 127/256, linearly divided into 64 steps High voltage sub-band (HC = 1): VG = 1/2 ~ 127/128, linearly divided into 64 steps * CM: In addition to determining the ratio IOUT,target/Iref, CM limits the output current range. High Current Multiplier (CM = 1): IOUT,target/Iref = 15, suitable for output current range IOUT = 10 mA to 120 mA. Low Current Multiplier (CM = 0): IOUT,target/Iref = 5, suitable for output current range IOUT = 3 mA to 40 mA * CG: The total Current Gain is defined as the following. VR-EXT = 1.26 V x VG Iref = VR-EXT/Rext, if the external resistor, Rext, is connected to ground. IOUT,target = Iref x 15 x 3CM - 1 = 1.26 V/Rext x VG x 15 x 3CM - 1 = (1.26 V/Rext x 15) x CG CG = VG x 3CM - 1 Therefore, CG = (1/12) to (127/128), and it is divided into 256 steps. If CG = 127/128 = 0.992, the IOUT,target-Rext. Examples * Configuration Code {CM, HC, CC[0:5]} = {1,1,111111} VG = 127/128 = 0.992 and CG = VG x 30 = VG = 0.992 * Configuration Code = {1,1,000000} VG = (1 + 1) x (1 + 0/64)/4 = 1/2 = 0.5, and CG = 0.5 * Configuration Code = {0,0,000000} VG = (1 + 0) x (1 + 0/64)/4 = 1/4, and CG = (1/4) x 3-1 = 1/12 After power on, the default value of the Configuration Code {CM, HC, CC[0:5]} is {1,1,111111}. Therefore, VG = CG = 0.992. The relationship between the Configuration Code and the Current Gain is shown in Figure 22. 24 Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com 1.00 CM = 0 (Low Current Multiplier) Current Gain (CG) 0.75 HC = 1 (High Voltage SubBand) 0.50 HC = 0 (Low Voltage SubBand) HC = 0 (Low Voltage SubBand) HC = 1 (High Voltage SubBand) 0.25 CM = 1 (High Current Multiplier) 0.00 Configuration Code (CM, HC, CC[0:5]) in Binary Format Figure 22. Current Gain vs Configuration Code Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 25 TLC5916, TLC5917 SLVS695C - JUNE 2007 - REVISED FEBRUARY 2011 www.ti.com REVISION HISTORY Changes from Revision A (November 2010) to Revision B Page * Added Maximum LED Voltage 20-V to Features. ................................................................................................................. 1 * Added Abstract section. ........................................................................................................................................................ 1 * Changed resistor value in Single Implementation diagram from 840 to 720. ................................................................. 1 * Changed Default Relationship Curve to reflect correct data. ............................................................................................. 18 * Changed resistor value in Single Implementation diagram from 840 to 720. ............................................................... 19 * Changed resistor value in Cascading Implementation diagram from 840 to 720. ........................................................ 19 Changes from Revision B (February 2011) to Revision C * 26 Page Replaced the Power Dissipation and Thermal Impedance table with the Thermal Information tables ................................ 7 Submit Documentation Feedback (c) 2007-2011, Texas Instruments Incorporated Product Folder Link(s): TLC5916 TLC5917 PACKAGE OPTION ADDENDUM www.ti.com 15-Feb-2011 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp TLC5916ID ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC5916IDG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC5916IDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC5916IDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC5916IN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC5916INE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC5916IPW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC5916IPWG4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC5916IPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC5916IPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC5917ID ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC5917IDG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC5917IDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC5917IDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC5917IN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC5917INE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLC5917IPW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC5917IPWG4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 (3) Samples (Requires Login) PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 15-Feb-2011 Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp TLC5917IPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC5917IPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (3) Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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OTHER QUALIFIED VERSIONS OF TLC5916, TLC5917 : * Automotive: TLC5916-Q1, TLC5917-Q1 NOTE: Qualified Version Definitions: * Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 10.3 2.1 8.0 16.0 Q1 TLC5916IDR SOIC D 16 2500 330.0 16.4 6.5 TLC5916IPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TLC5917IDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 TLC5917IPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLC5916IDR SOIC D 16 2500 333.2 345.9 28.6 TLC5916IPWR TSSOP PW 16 2000 367.0 367.0 35.0 TLC5917IDR SOIC D 16 2500 333.2 345.9 28.6 TLC5917IPWR TSSOP PW 16 2000 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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