. . .
720 Ω
VLED
GND
SDO
R-EXT
VDD
LE
CLK
SDI
LE
CLK
OE OE
SDI
Controller
Single Driver
26 mA Application
OUT0
. . .
3.0V to 5.5V
OUT1
OUT6
OUT7
TLC5917 To Controller if Error
Detection Used
TLC5916, TLC5917
www.ti.com
SLVS695C JUNE 2007REVISED FEBRUARY 2011
8-CHANNEL CONSTANT-CURRENT LED SINK DRIVERS
Check for Samples: TLC5916,TLC5917
1FEATURES ABSTRACT
Eight Constant-Current Output Channels
Output Current Adjusted Through Single The TLC5916 / TLC5917 Constant-Current LED Sink
Drivers are designed to work alone or cascaded.
External Resistor Since each output is independently controlled, they
Constant Output Current Range: can be programmed to be on or off by the user. The
3 mA to 120 mA per Channel high LED voltage (VLED) allows for the use of a
Constant Output Current Invariant to Load single LED per output or multiple LEDs on a single
Voltage Change string. With independently controlled outputs supplied
with constant current, the LEDs can be combined in
Open Load, Short Load and Overtemperature parallel to create higher currents on a single string.
Detection The constant sink current for all channels is set
256-Step Programmable Global Current Gain through a single external resistor. This allows
Excellent Output Current Accuracy: different LED drivers in the same application to sink
various currents which provides optional
Between Channels: < ±3% (Max) implementation of multi-color LEDs. An additional
Between ICs: < ±6% (Max) advantage of the independent outputs is the ability to
Fast Response of Output Current leave unused channels floating. The flexibility of the
TLC5916 / TLC5917 LED drivers is ideal for
30-MHz Clock Frequency applications such as (but not limited to): 7-segment
Schmitt-Trigger Input displays, scrolling single color displays, gaming
3.3-V or 5-V Supply Voltage machines, white goods, video billboards and video
panels.
Maximum LED Voltage 20-V
Thermal Shutdown for Overtemperature
Protection
APPLICATIONS
General LED Lighting Applications
LED Display Systems
LED Signage
Automotive LED Lighting
White Goods
Gaming Machines/Entertainment
Single Implementation of TLC5916/TLC5917
Device
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. ©20072011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TLC5916, TLC5917
SLVS695C JUNE 2007REVISED FEBRUARY 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
DESCRIPTION/ORDERING INFORMATION
The TLC5916/TLC5917 is designed for LED displays and LED lighting applications with constant-current control
and open-load, shorted-load, and overtemperature detection. The TLC5916/TLC5917 contains an 8-bit shift
register and data latches, which convert serial input data into parallel output format. At the output stage, eight
regulated current ports are designed to provide uniform and constant current for driving LEDs within a wide range
of LED Forward Voltage (VF) variations. Used in system design for LED display applications, e.g., LED panels, it
provides great flexibility and device performance. Users can adjust the output current from 3 mA to 120 mA per
channel through an external resistor, Rext, which gives flexibility in controlling the light intensity of LEDs. The
devices are designed for up to 20 V at the output port. The high clock frequency, 30 MHz, also satisfies the
system requirements of high-volume data transmission.
The TLC5916/TLC5917 provides two operation modes: Normal Mode and Special Mode. Normal mode is used
for shifting LED data into and out of the driver. Special Mode includes two functions: Error Detection and Current
Gain Control. The two operation modes include three phases: Normal Mode phase, Mode Switching transition
phase, and Special Mode phase. The signal on the multiple function pin OE(ED2) is monitored to determine the
mode. When a one-clock-wide pulse appears on OE(ED2), the device enters the Mode Switching phase. At this
time, the voltage level on LE(ED1) determines which mode the TLC5916/TLC5917 switches to.
In the Normal Mode phase, the serial data can be transferred into TLC5916/TLC5917 via the pin SDI, shifted in
the shift register, and transferred out via the pin SDO. LE(ED1) can latch the serial data in the shift register to the
output latch. OE(ED2) enables the output drivers to sink current.
In the Special Mode phase, the low-voltage-level signal on OE(ED2) can enable output channels and detect the
status of the output current to determine if the driving current level is sufficient. The detected Error Status is
loaded into the 8-bit shift register and shifted out via the pin SDO, synchronous to the CLK signal. The system
controller can read the error status and determine if the LEDs are properly lit.
In the Special Mode phase, the TLC5916/TLC5917 allows users to adjust the output current level by setting a
runtime-programmable Configuration Code. The code is sent into the TLC5916/TLC5917 via SDI. The positive
pulse of LE(ED1) latches the code in the shift register into a built-in 8-bit configuration latch, instead of the output
latch. The code affects the voltage at the terminal R-EXT and controls the output-current regulator. The output
current can be finely adjusted by a gain ranging from 1/12 to 127/128 in 256 steps. Therefore, the current skew
between ICs can be compensated within less than 1%. This feature is suitable for white balancing in LED color
display panels.
Table 1. ORDERING INFORMATION(1)
SHORT TO VLED
TAPACKAGE(2) ORDERABLE PART NUMBER TOP-SIDE MARKING
DETECTION
PDIP N Tube of 25 TLC5916IN TLC5916IN
Tube of 40 TLC5916ID
SOIC D TLC5916I
No Reel of 2500 TLC5916IDR
Tube of 90 TLC5916IPW
TSSOP PW Y5916
Reel of 2000 TLC5916IPWR
40°C to 125°CPDIP N Tube of 25 TLC5917IN TLC5917IN
Tube of 40 TLC5917ID
SOIC D TLC5917I
Yes Reel of 2500 TLC5917IDR
Tube of 90 TLC5917IPW
TSSOP PW Y5917
Reel of 2000 TLC5917IPWR
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
2Submit Documentation Feedback ©20072011, Texas Instruments Incorporated
Product Folder Link(s): TLC5916 TLC5917
VDD
8
8
8
8
8
8
I/O Regulator
Control
Logic
OUT0 OUT1 OUT6 OUT7
Output Driver and
Error Detection
8-Bit Output
Latch
SDO
SDI
CLK
LE(ED1)
OE(ED2)
R-EXT
8-Bit Shift
Register
Configuration
Latches
TLC5916, TLC5917
www.ti.com
SLVS695C JUNE 2007REVISED FEBRUARY 2011
BLOCK DIAGRAM
©20072011, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): TLC5916 TLC5917
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
SDI
CLK
LE(ED1)
OUT0
OUT1
OUT2
OUT3
VDD
R-EXT
SDO
OE(ED2)
OUT7
OUT6
OUT5
OUT4
D, N, OR PW PACKAGE
(TOP VIEW)
TLC5916, TLC5917
SLVS695C JUNE 2007REVISED FEBRUARY 2011
www.ti.com
Terminal Descriptions
TERMINAL DESCRIPTION
NAME
CLK Clock input for data shift on rising edge
GND Ground for control logic and current sink
Data strobe input
Serial data is transferred to the respective latch when LE(ED1) is high. The data is latched when LE(ED1) goes low.
LE(ED1) Also, a control signal input for an Error Detection Mode and Current Adjust Mode (see Timing Diagram). LE(ED1) has
an internal pulldown.
Output enable. When OE(ED2) is active (low), the output drivers are enabled; when OE(ED2) is high, all output drivers
OE(ED2) are turned OFF (blanked). Also, a control signal input for an Error Detection Mode and Current Adjust Mode (see
Figure 1). OE(ED2) has an internal pullup.
OUT0OUT7 Constant-current outputs
R-EXT External Resistor - Connect an external resistor to ground to set the current for all outputs
SDI Serial-data input to the Shift register
SDO Serial-data output to the following SDI of next driver IC or to the microcontroller
VDD Supply voltage
Table 2. Diagnostic Features
OVERTEMPERATURE OPEN-LOAD SHORT TO GND SHORT TO VLED
DEVICE(1) DETECTION DETECTION DETECTION DETECTION
TLC5916 X X X
TLC5917 X X X X
(1) The device has one single error register for all these conditions (one error bit per channel).
4Submit Documentation Feedback ©20072011, Texas Instruments Incorporated
Product Folder Link(s): TLC5916 TLC5917
1 2 30 4 6 75
0
1
off
on
off
on
off
on
off
on
off
on
Don't care
CLK
OE(ED2)
LE(ED1)
SDI
OUT0
OUT1
OUT2
OUT3
OUT7
SDO
1 2 3 4 5
1 0 1 1 1
10 0 0 0
CLK
OE(ED2)
LE(ED1)
TLC5916, TLC5917
www.ti.com
SLVS695C JUNE 2007REVISED FEBRUARY 2011
Timing Diagram
Figure 1. Normal Mode
Table 3. Truth Table in Normal Mode
CLK LE(ED1) OE(ED2) SDI OUT0...OUT7 SDO
H L Dn Dn...Dn 7 Dn 7
L L Dn + 1 No change Dn 6
H L Dn + 2 Dn + 2...Dn 5 Dn 5
X L Dn + 3 Dn + 2...Dn 5 Dn 5
X H Dn + 3 Off Dn 5
The signal sequence shown in Figure 2 makes the TLC5916/TLC5917 enter Current Adjust and Error Detection
Mode.
Figure 2. Switching to Special Mode
©20072011, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): TLC5916 TLC5917
1 2 30 67
1
0
8-bit Configuration Code
CLK
OE(ED2)
LE(ED1)
SDI
1 2 3
0
1>2 µs
CLK
OE(ED2)
LE(ED1)
SDO Error Status Code
1 2 3 4 5
1 0 1 1 1
0 0 0 0
0
CLK
OE(ED2)
LE(ED1)
TLC5916, TLC5917
SLVS695C JUNE 2007REVISED FEBRUARY 2011
www.ti.com
In the Current Adjust Mode, sending the positive pulse of LE(ED1), the content of the shift register (a current
adjust code) is written to the 8-bit configuration latch (see Figure 3).
Figure 3. Writing Configuration Code
When the TLC5916/TLC5917 is in the Error Detection Mode, the signal sequence shown in Figure 4 enables a
system controller to read error status codes through SDO.
Figure 4. Reading Error Status Code
The signal sequence shown in Figure 5 makes TLC5916/TLC5917 resume the Normal Mode. Switching to
Normal Mode resets all internal Error Status registers. OE(ED2) always enables the output port, whether the
TLC5916/TLC5917 enters Current Adjust Mode or not.
Figure 5. Switching to Normal Mode
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SLVS695C JUNE 2007REVISED FEBRUARY 2011
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT
VDD Supply voltage range 0 7 V
VIInput voltage range 0.4 VDD + 0.4 V
VOOutput voltage range 0.5 20 V
fclk Clock frequency 25 MHz
IOUT Output current 120 mA
IGND GND terminal current 960 mA
TAOperating free-air temperature range 40 125 °C
TJOperating junction temperature range 40 150 °C
Tstg Storage temperature range 55 150 °C
ESD Electrostatic discharge capability, V(HBMESD) 100 pF, 1.5 k1.5 kV
THERMAL INFORMATION TLC5916 TLC5917
THERMAL METRIC(1) 16 PINS 16 PINS UNITS
D N PW D N PW
θJA Junction-to-ambient thermal resistance 87.4 51.8 113.9 87.4 51.8 114.8
θJCtop Junction-to-case (top) thermal resistance 48.1 39.1 35.2 48.1 39.1 35.9
θJB Junction-to-board thermal resistance 44.4 31.8 59.2 44.4 31.8 59.8 °C/W
ψJT Junction-to-top characterization parameter 12.5 23.9 1.3 12.5 23.9 1.3
ψJB Junction-to-board characterization parameter 44.2 31.7 58.5 44.2 31.7 59.2
θJCbot Junction-to-case (bottom) thermal resistance n/a n/a n/a n/a n/a n.a
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
©20072011, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): TLC5916 TLC5917
TLC5916, TLC5917
SLVS695C JUNE 2007REVISED FEBRUARY 2011
www.ti.com
Recommended Operating Conditions
CONDITIONS MIN MAX UNIT
VDD Supply voltage 3 5.5 V
VOSupply voltage to output pins OUT0OUT7 20 V
VO0.6 V 3
IOOutput current DC test circuit mA
VO1 V 120
IOH High-level output current source SDO shorted to GND 1 mA
IOL Low-level output current sink SDO shorted to VCC 1 mA
VIH High-level input voltage CLK, OE(ED2), LE(ED1), and SDI 0.7 ×VDD VDD V
VIL Low-level input voltage CLK, OE(ED2), LE(ED1), and SDI 0 0.3 ×VDD V
Recommended Timing
VDD = 3 V to 5.5 V (unless otherwise noted) CONDITIONS MIN MAX UNIT
tw(L) LE(ED1) pulse duration Normal Mode 20 ns
tw(CLK) CLK pulse duration Normal Mode 20 ns
Normal Mode, IOUT <60 mA 500
tw(OE) OE(ED2) pulse duration ns
Normal Mode, IOUT >60 mA 700
tsu(D) Setup time for SDI Normal Mode 3 ns
th(D) Hold time for SDI Normal Mode 2 ns
tsu(L) Setup time for LE(ED1) Normal Mode 15 ns
th(L) Hold time for LE(ED1) Normal Mode 15 ns
tw(CLK) CLK pulse duration Error Detection Mode 20 ns
tw(ED2) OE(ED2) pulse duration Error Detection Mode 2000 ns
tsu(ED1) Setup time for LE(ED1) Error Detection Mode 4 ns
th(ED1) Hold time for LE(ED1) Error Detection Mode 10 ns
tsu(ED2) Setup time for OE(ED2) Error Detection Mode 6 ns
th(ED2) Hold time for OE(ED2) Error Detection Mode 10 ns
fCLK Clock frequency Cascade operation 30 MHz
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TLC5916, TLC5917
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SLVS695C JUNE 2007REVISED FEBRUARY 2011
Electrical Characteristics
VDD = 3 V, TJ=40°C to 125°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VDD Input voltage 3 5.5 V
VOSupply voltage to the output pins 20 V
VO0.6 V 3
IOOutput current mA
VO1 V 120
IOH High-level output current, source 1 mA
IOL Low-level output current, sink 1 mA
VIH High-level input voltage 0.7 ×VDD VDD V
VIL Low-level input voltage GND 0.3 ×VDD V
TJ= 25°C 0.5
Ileak Output leakage current VOH = 17 V μA
TJ= 125°C 2
VOH High-level output voltage SDO, IOL =1 mA VDD 0.4 V
VOL Low-level output voltage SDO, IOH = 1 mA 0.4 V
VOUT = 0.6 V, Rext = 720 ,
Output current 1 26 mA
CG = 0.992
IOL = 26 mA, VO= 0.6 V, Rext = 720 ,
IO(1) Output current error, die-die ±3±6 %
TJ= 25°C
Output current skew, IOL = 26 mA, VO= 0.6 V, Rext = 720 ,±1.5 ±3 %
channel-to-channel TJ= 25°C
Output current 2 VO= 0.8 V, Rext = 360 , CG = 0.992 52 mA
IOL = 52 mA, VO= 0.8 V, Rext = 360 ,
Output current error, die-die ±2±6 %
IO(2) TJ= 25°C
Output current skew, IOL = 52 mA, VO= 0.8 V, Rext = 360 ,±1.5 ±3 %
channel-to-channel TJ= 25°C
VO= 1 V to 3 V, IO= 26 mA ±0.1
IOUT vs Output current vs %/V
VDD = 3.0 V to 5.5 V,
VOUT output voltage regulation ±1
IO= 26 mA/120 mA
Pullup resistance OE(ED2) 500 k
Pulldown resistance LE(ED1) 500 k
Tsd Overtemperature shutdown(2) 150 175 200 °C
Thys Restart temperature hysteresis(2) 15 °C
Threshold current for open error
IOUT,Th IOUT,target = 3 mA to 120 mA 0.5 ×Itarget %
detection
Trigger threshold voltage for
VOUT,TTh short-error detection IOUT,target = 3 mA to 120 mA 2.5 2.7 3.1 V
(TLC5917 only)
Return threshold voltage for
VOUT, RTh short-error detection IOUT,target = 3 mA to 120 mA 2.2 V
(TLC5917 only) Rext = Open 5 10
Rext = 720 8 14
IDD Supply current mA
Rext = 360 11 18
Rext = 180 16 22
(1) Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the
application and configuration and may vary over time. Typical values are not ensured on production material.
(2) Specified by design.
©20072011, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): TLC5916 TLC5917
TLC5916, TLC5917
SLVS695C JUNE 2007REVISED FEBRUARY 2011
www.ti.com
Electrical Characteristics
VDD = 5.5 V, TJ=40°C to 125°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VDD Input voltage 3 5.5 V
VOSupply voltage to the output pins 20 V
VO0.6 V 3
IOOutput current mA
VO1 V 120
IOH High-level output current, source 1 mA
IOL Low-level output current, sink 1 mA
VIH High-level input voltage 0.7 ×VDD VDD V
VIL Low-level input voltage GND 0.3 ×VDD V
TJ= 25°C 0.5
Ileak Output leakage current VOH = 17 V μA
TJ= 125°C 2
VOH High-level output voltage SDO, IOL =1 mA VDD 0.4 V
VOL Low-level output voltage SDO, IOH = 1 mA 0.4 V
VOUT = 0.6 V, Rext = 720 ,
Output current 1 26 mA
CG = 0.992
IOL = 26 mA, VO= 0.6 V, Rext = 720 ,
IO(1) Output current error, die-die ±3±6 %
TJ= 25°C
Output current skew, IOL = 26 mA, VO= 0.6 V, Rext = 720 ,±1.5 ±3 %
channel-to-channel TJ= 25°C
Output current 2 VO= 0.8 V, Rext = 360 , CG = 0.992 52 mA
IOL = 52 mA, VO= 0.8 V, Rext = 360 ,
Output current error, die-die ±2±6 %
IO(2) TJ= 25°C
Output current skew, IOL = 52 mA, VO= 0.8 V, Rext = 360 ,±1.5 ±3 %
channel-to-channel TJ= 25°C
VO= 1 V to 3 V , IO= 26 mA ±0.1
IOUT vs Output current vs %/V
VDD = 3.0 V to 5.5 V,
VOUT output voltage regulation ±1
IO= 26 mA/120 mA
Pullup resistance OE(ED2), 500 k
Pulldown resistance LE(ED1), 500 k
Tsd Overtemperature shutdown(2) 150 175 200 °C
Thys Restart temperature hysteresis(2) 15 °C
Threshold current for open error
IOUT,Th IOUT,target = 3 mA to 120 mA 0.5 ×Itarget %
detection
Trigger threshold voltage for
VOUT,TTh short-error detection IOUT,target = 3 mA to 120 mA 2.5 2.7 3.1 V
(TLC5917 only)
Return threshold voltage for
VOUT, RTh short-error detection IOUT,target = 3 mA to 120 mA 2.2 V
(TLC5917 only) Rext = Open 6 10
Rext = 720 11 14
IDD Supply current mA
Rext = 360 13 18
Rext = 180 19 24
(1) Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the
application and configuration and may vary over time. Typical values are not ensured on production material.
(2) Specified by design.
10 Submit Documentation Feedback ©20072011, Texas Instruments Incorporated
Product Folder Link(s): TLC5916 TLC5917
TLC5916, TLC5917
www.ti.com
SLVS695C JUNE 2007REVISED FEBRUARY 2011
Switching Characteristics
VDD = 3 V, TJ=40°C to 125°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
tPLH1 Low-to-high propagation delay time, CLK to OUTn 40 65 95 ns
tPLH2 Low-to-high propagation delay time, LE(ED1) to OUTn 40 65 95 ns
tPLH3 Low-to-high propagation delay time, OE(ED2) to OUTn 40 65 95 ns
tPLH4 Low-to-high propagation delay time, CLK to SDO 12 20 30 ns
tPHL1 High-to-low propagation delay time, CLK to OUTn 300 365 ns
tPHL2 High-to-low propagation delay time, LE(ED1) to OUTn 300 365 ns
tPHL3 High-to-low propagation delay time, OE(ED2) to OUTn 300 365 ns
tPHL4 High-to-low propagation delay time, CLK to SDO 12 20 30 ns
tw(CLK) Pulse duration, CLK 20 ns
tw(L) Pulse duration, LE(ED1) 20 ns
tw(OE) Pulse duration, OE(ED2) 500 ns
VIH = VDD, VIL = GND,
tw(ED2) Pulse duration, OE(ED2) in Error Detection Mode 2 μs
Rext = 360 , VL= 4 V,
RL= 44 , CL= 10 pF,
th(ED1,ED2) Hold time, LE(ED1) and OE(ED2) 10 ns
CG = 0.992
th(D) Hold time, SDI 2 ns
tsu(D,ED1) Setup time, SDI, LE(ED1) 3 ns
tsu(ED2) Setup time, OE(ED2) 8.5 ns
th(L) Hold time, LE(ED1), Normal Mode 15 ns
tsu(L) Setup time, LE(ED1), Normal Mode 15 ns
trRise time, CLK(2) 500 ns
tfFall time, CLK(2) 500 ns
tor Rise time, outputs (off) 40 85 105 ns
tor Rise time, outputs (off), TJ= 25°C 83 100 ns
tof Rise time, outputs (on) 100 280 370 ns
tof Rise time, outputs (on), TJ= 25°C 170 225 ns
fCLK Clock frequency Cascade operation 30 MHz
(1) Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the
application and configuration and may vary over time. Typical values are not ensured on production material.
(2) If the devices are connected in cascade and tror tfis large, it may be critical to achieve the timing required for data transfer between two
cascaded devices.
©20072011, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): TLC5916 TLC5917
TLC5916, TLC5917
SLVS695C JUNE 2007REVISED FEBRUARY 2011
www.ti.com
Switching Characteristics
VDD = 5.5 V, TJ=40°C to 125°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
tPLH1 Low-to-high propagation delay time, CLK to OUTn 40 65 95 ns
tPLH2 Low-to-high propagation delay time, LE(ED1) to OUTn 40 65 95 ns
tPLH3 Low-to-high propagation delay time, OE(ED2) to OUTn 40 65 95 ns
tPLH4 Low-to-high propagation delay time, CLK to SDO 8 20 30 ns
tPHL1 High-to-low propagation delay time, CLK to OUTn 300 365 ns
tPHL2 High-to-low propagation delay time, LE(ED1) to OUTn 300 365 ns
tPHL3 High-to-low propagation delay time, OE(ED2) to OUTn 300 365 ns
tPHL4 High-to-low propagation delay time, CLK to SDO 8 20 30 ns
tw(CLK) Pulse duration, CLK 20 ns
tw(L) Pulse duration, LE(ED1) 20 ns
tw(OE) Pulse duration, OE(ED2) 500 ns
VIH = VDD, VIL = GND,
tw(ED2) Pulse duration, OE(ED2) in Error Detection Mode 2 μs
Rext = 360 , VL= 4 V,
RL= 44 , CL= 10 pF,
th(D,ED1,ED2) Hold time, SDI, LE(ED1), and OE(ED2) 10 ns
CG = 0.992
th(D) Hold time, SDI 2 ns
tsu(D,ED1) Setup time, SDI, LE(ED1) 3 ns
tsu(ED2) Setup time, OE(ED2) 8.5 ns
th(L) Hold time, LE(ED1), Normal Mode 15 ns
tsu(L) Setup time, LE(ED1), Normal Mode 15 ns
trRise time, CLK(2) 500 ns
tfFall time, CLK(2) 500 ns
tor Rise time, outputs (off) 40 85 105 ns
tor Rise time, outputs (off), TJ= 25°C 83 100 ns
tof Rise time, outputs (on) 100 280 370 ns
tof Rise time, outputs (on), TJ= 25°C 170 225 ns
fCLK Clock frequency Cascade operation 30 MHz
(1) Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the
application and configuration and may vary over time. Typical values are not ensured on production material.
(2) If the devices are connected in cascade and tror tfis large, it may be critical to achieve the timing required for data transfer between two
cascaded devices.
12 Submit Documentation Feedback ©20072011, Texas Instruments Incorporated
Product Folder Link(s): TLC5916 TLC5917
V , V
IH IL
Logic Input
Waveform
V = 5 V
IH
V = 0V
IL
IOUT
RL
CL
Iref
VDD
OE(ED2)
CLK
LE(ED1)
SDI
R-EXT GND SDO
OUT7
OUT0
IDD
Function
Generator
VL
CL
TLC5916, TLC5917
www.ti.com
SLVS695C JUNE 2007REVISED FEBRUARY 2011
PARAMETER MEASUREMENT INFORMATION
Figure 6. Test Circuit for Electrical Characteristics
Figure 7. Test Circuit for Switching Characteristics
©20072011, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): TLC5916 TLC5917
50%
LOW
Out fput of
Outp t onu
t , t
PLH1 PHL1
t , t
LH2 H 2P LP
CLK
SDI
SDO
LE(ED1)
OE(ED2)
OUTn
t , t
PLH4 PHL4
tw(CLK)
50%
50% 50%
50% 50%
50%
50%
50%
tsu(L)
th(L)
tw(L)
tsu(D) th(D)
50%
tw(OE)
tPHL3
tof tor
Output off
tPLH3
50%
20%
80%
OE(ED2)
OUTn 50%
80%
50%
20%
HIGH
TLC5916, TLC5917
SLVS695C JUNE 2007REVISED FEBRUARY 2011
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 8. Normal Mode Timing Waveforms
14 Submit Documentation Feedback ©20072011, Texas Instruments Incorporated
Product Folder Link(s): TLC5916 TLC5917
tw(CLK)
tsu(ED2) th(ED2)
OE(ED2)
LE(ED1)
CLK
tsu(ED1) th(ED1)
2 CLK
50%
50%
50%
50%
50%
tw(ED2)
OE(ED2)
CLK
TLC5916, TLC5917
www.ti.com
SLVS695C JUNE 2007REVISED FEBRUARY 2011
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 9. Switching to Special Mode Timing Waveforms
Figure 10. Reading Error Status Code Timing Waveforms
©20072011, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): TLC5916 TLC5917
LE = 5 V (active)
= GND (active)OE
CLK
OUTn
OE
OUT1
Turn on only one channel
Channel 1
TLC5916, TLC5917
SLVS695C JUNE 2007REVISED FEBRUARY 2011
www.ti.com
TYPICAL CHARACTERISTICS
Figure 11. Response Time, CLK to OUTn
Figure 12. Response Time, OE to OUT1
16 Submit Documentation Feedback ©20072011, Texas Instruments Incorporated
Product Folder Link(s): TLC5916 TLC5917
OE
OUT7
Turn on only one channel
Channel 8
0
25
50
75
100
125
150
0 0.5 1 1.5 2 2.5 3
Output Voltage (V)
Output Current (mA)
Temperature = 25°C
IO= 80 mA
IO= 40 mA
IO= 20 mA
IO= 60 mA
IO= 5 mA
IO= 100 mA
IO= 120 mA
TLC5916, TLC5917
www.ti.com
SLVS695C JUNE 2007REVISED FEBRUARY 2011
TYPICAL CHARACTERISTICS (continued)
Figure 13. Response Time, OE to OUT7
Figure 14. Output Current vs Output Voltage
©20072011, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Link(s): TLC5916 TLC5917
TLC5916, TLC5917
SLVS695C JUNE 2007REVISED FEBRUARY 2011
www.ti.com
APPLICATION INFORMATION
Operating Principles
Constant Current
In LED display applications, TLC5916/TLC5917 provides nearly no current variations from channel to channel
and from IC to IC. While 5 mA IOUT 100 mA, the maximum current skew between channels is less than ±3%
and between ICs is less than ±6%.
Adjusting Output Current
TLC5916/TLC5917 scales up the reference current, Iref, set by the external resistor Rext to sink a current, Iout, at
each output port. Users can follow the below formulas to calculate the target output current IOUT,target in the
saturation region. In the equations,
Rext is the resistance of the external resistor connected between the R-EXT terminal and ground and VR-EXT is
the voltage of R-EXT, which is controlled by the programmable voltage gain (VG). VG is defined by the
Configuration Code.
VR-EXT = 1.26 V ×VG
Iref = VR-EXT/Rext,
IOUT,target = Iref ×15 ×3CM 1
The Current Multiplier (CM) determines that the ratio IOUT,target/Iref is 15 or 5. After power on, the default value of
VG is 127/128 = 0.992, and the default value of CM is 1, so that the ratio IOUT,target/Iref = 15. Based on the default
VG and CM:
VR-EXT = 1.26 V ×127/128 = 1.25 V
IOUT,target = (1.25 V/Rext)×15
Therefore, the default current is approximately 52 mA at 360 and 26 mA at 720 . The default relationship
after power on between IOUT,target and Rext is shown in Figure 15.
Figure 15. Default Relationship Curve Between IOUT,target and Rext After Power Up
Typical Applications
Figure 16 shows implementation of a single TLC5916/TLC5917 device. Figure 17 shows a cascaded driver
implementation.
18 Submit Documentation Feedback ©20072011, Texas Instruments Incorporated
Product Folder Link(s): TLC5916 TLC5917
. . .
720 Ω
VLED
GND
SDO
R-EXT
VDD
LE
CLK
SDI
LE
CLK
OE OE
SDI
Controller
Single Driver
26 mA Application
OUT0
. . .
3.0V to 5.5V
OUT1
OUT6
OUT7
TLC5917 To Controller if Error
Detection Used
...
720Ω
VLED
GND
OE
SDO
R-EXT
VDD
LE
CLK
SDI
LE
CLK
OE
SDI
Controller
Multiple Cascaded Drivers
26mA Application
VDD: 3.0V to 5.5V
...
OUT0
OUT7
TLC5917
...
720Ω
GND
OE
SDO
R-EXT
VDD
LE
CLK
SDI
...
OUT0
OUT7
TLC5917
...
720Ω
GND
OE
SDO
R-EXT
VDD
LE
CLK
SDI
...
OUT0
OUT7
TLC5917
...
Read Back
TLC5916, TLC5917
www.ti.com
SLVS695C JUNE 2007REVISED FEBRUARY 2011
Figure 16. Single Implementation of TLC5916/TLC5917 Device
Figure 17. Cascading Implementation of TLC5916/TLC5917 Device
©20072011, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): TLC5916 TLC5917
1 2 3 4 5
1 0 1 1 1
00 0 0 0
Actual Mode
(Normal or Special) Mode
Switching Normal
Mode
CLK
OE(ED2)
LE(ED1)
Phase
1 2 3 4 5
1 0 1 1 1
10 0 0 0
Actual Mode
(Normal or Special) Mode
Switching Special
Mode
CLK
OE(ED2)
LE(ED1)
Phase
Switching to Special Mode Switching to Normal Mode
TLC5916, TLC5917
SLVS695C JUNE 2007REVISED FEBRUARY 2011
www.ti.com
Operation Phases
Operation Mode Switching
To switch between its two modes, TLC5916/TLC5917 monitors the signal OE(ED2). When an one-clock-wide
pulse of OE(ED2) appears, TLC5916/TLC5917 enters the two-clock-period transition phase, the Mode Switching
phase. After power on, the default operation mode is the Normal Mode (see Figure 18).
Figure 18. Mode Switching
As shown in Figure 18, once a one-clock-wide short pulse (101) of OE(ED2) appears, TLC5916/TLC5917 enters
the Mode Switching phase. At the fourth rising edge of CLK, if LE(ED1) is sampled as voltage high,
TLC5916/TLC5917 switches to Special Mode; otherwise, it switches to Normal Mode. The signal LE(ED1)
between the third and the fifth rising edges of CLK cannot latch any data. Its level is used only to determine into
which mode to switch. However, the short pulse of OE(ED2) can still enable the output ports. During mode
switching, the serial data can still be transferred through SDI and shifted out from SDO.
NOTES:
1. The signal sequence for the mode switching may be used frequently to ensure that TLC5916/TLC5917 is in
the proper mode.
2. The 1 and 0 on the LE(ED1) signal are sampled at the rising edge of CLK. The X means its level does not
affect the result of mode switching mechanism.
3. After power on, the default operation mode is Normal Mode.
Normal Mode Phase
Serial data is transferred into TLC5916/TLC5917 via SDI, shifted in the Shift Register, and output via SDO.
LE(ED1) can latch the serial data in the Shift Register to the Output Latch. OE(ED2) enables the output drivers to
sink current. These functions differ only as described in Operation Mode Switching, in which case, a short pulse
triggers TLC5916/TLC5917 to switch the operation mode. However, as long as LE(ED1) is high in the Mode
Switching phase, TLC5916/TLC5917 remains in the Normal Mode, as if no mode switching occurred.
Special Mode Phase
In the Special Mode, as long as OE(ED2) is not low, the serial data is shifted to the Shift Register via SDI and
shifted out via SDO, as in the Normal Mode. However, there are two differences between the Special Mode and
the Normal Mode, as shown in the following sections.
20 Submit Documentation Feedback ©20072011, Texas Instruments Incorporated
Product Folder Link(s): TLC5916 TLC5917
1 2 3
1 0 0 0 1
0 0 0 0
0
0 0
0 0 0 0
1 1 1
0
CLK
OE(ED2)
LE(ED1)
SDO
Data source of
shift register Error Detection
SDI SDI
Error Status Code
Bit 7 Bit 6 Bit 5 Bit 4
>2 µs
1 2 30 4 56 7
1
0
CLK
OE(ED2)
LE(ED1)
SDI 8-Bit Configuration Code
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
TLC5916, TLC5917
www.ti.com
SLVS695C JUNE 2007REVISED FEBRUARY 2011
Reading Error Status Code in Special Mode
When OE(ED2) is pulled low while in Special Mode, error detection and load error status codes are loaded into
the Shift Register, in addition to enabling output ports to sink current. Figure 19 shows the timing sequence for
error detection. The 0 and 1 signal levels are sampled at the rising edge of each CLK. At least three zeros must
be sampled at the voltage low signal OE(ED2). Immediately after the second zero is sampled, the data input
source of the Shift Register changes to the 8-bit parallel Error Status Code register, instead of from the serial
data on SDI. Normally, the error status codes are generated at least 2 μs after the falling edge of OE(ED2). The
occurrence of the third or later zero saves the detected error status codes into the Shift Register. Therefore,
when OE(ED2) is low, the serial data cannot be shifted into TLC5916/TLC5917 via SDI. When OE(ED2) is pulled
high, the data input source of the Shift Register is changed back to SDI. At the same time, the output ports are
disabled and the error detection is completed. Then, the error status codes saved in the Shift Register can be
shifted out via SDO bit by bit along with CLK, as well as the new serial data can be shifted into
TLC5916/TLC5917 via SDI.
While in Special Mode, the TLC5916/TLC5917 cannot simultaneously transfer serial data and detect LED load
error status.
Figure 19. Reading Error Status Code
Writing Configuration Code in Special Mode
When in Special Mode, the active high signal LE(ED1) latches the serial data in the Shift Register to the
Configuration Latch, instead of the Output Latch. The latched serial data is used as the Configuration Code.
The code is stored until power off or the Configuration Latch is rewritten. As shown in Figure 20, the timing for
writing the Configuration Code is the same as the timing in the Normal Mode to latching output channel data.
Both the Configuration Code and Error Status Code are transferred in the common 8-bit Shift Register. Users
must pay attention to the sequence of error detection and current adjustment to avoid the Configuration Code
being overwritten by Error Status Code.
Figure 20. Writing Configuration Code
©20072011, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Link(s): TLC5916 TLC5917
NoFault
ShortFault
Minimum
Return
Threshold
Maximum
Trigger
Threshold
3.1V
2.5V
2.2V VOUT
Minimum
Trigger
Threshold
VOUT,TTh
VOUT,RTh
TLC5916, TLC5917
SLVS695C JUNE 2007REVISED FEBRUARY 2011
www.ti.com
Open-Circuit Detection Principle
The LED Open-Circuit Detection compares the effective current level Iout with the open load detection threshold
current IOUT,Th. If IOUT is below the IOUT,Th threshold, the TLC5916/TLC5917 detects an open-load condition. This
error status can be read as an error status code in the Special Mode. For open-circuit error detection, a channel
must be on.
Table 4. Open-Circuit Detection
CONDITION OF OUTPUT
STATE OF OUTPUT PORT ERROR STATUS CODE MEANING
CURRENT
Off IOUT = 0 mA 0 Detection not possible
IOUT <IOUT,Th (1) 0 Open circuit
On IOUT IOUT,Th (1) Channel n error status bit 1 Normal
(1) IOUT,Th = 0.5 ×IOUT,target (typical)
Short-Circuit Detection Principle (TLC5917 Only)
The LED short-circuit detection compares the effective voltage level (VOUT) with the shorted-load detection
threshold voltages VOUT,TTh and VOUT,RTh. If VOUT is above the VOUT,TTh threshold, the TLC5917 detects an
shorted-load condition. If VOUT is below the VOUT,RTh threshold, no error is detected/error bit is reset. This error
status can be read as an error status code in the Special Mode. For short-circuit error detection, a channel must
be on.
Table 5. Shorted-Load Detection
CONDITION OF OUTPUT
STATE OF OUTPUT PORT ERROR STATUS CODE MEANING
VOLTAGE
Off IOUT = 0 mA 0 Detection not possible
VOUT VOUT,TTh 0 Short circuit
On VOUT <VOUT,RTh 1 Normal
Figure 21. Short-Circuit Detection Principle
22 Submit Documentation Feedback ©20072011, Texas Instruments Incorporated
Product Folder Link(s): TLC5916 TLC5917
TLC5916, TLC5917
www.ti.com
SLVS695C JUNE 2007REVISED FEBRUARY 2011
Overtemperature Detection and Shutdown
TLC5916/TLC5917 is equipped with a global overtemperature sensor and eight individual, channel-specific,
overtemperature sensors.
When the global sensor reaches the trip temperature, all output channels are shut down, and the error status
is stored in the internal Error Status register of every channel. After shutdown, the channels automatically
restart after cooling down, if the control signal (output latch) remains on. The stored error status is not reset
after cooling down and can be read out as the error status code in the Special Mode.
When one of the channel-specific sensors reaches trip temperature, only the affected output channel is shut
down, and the error status is stored only in the internal Error Status register of the affected channel. After
shutdown, the channel automatically restarts after cooling down, if the control signal (output latch) remains
on. The stored error status is not reset after cooling down and can be read out as error status code in the
Special Mode.
For channel-specific overtemperature error detection, a channel must be on.
The error status code is reset when TLC5916/TLC5917 returns to Normal Mode.
Table 6. Overtemperature Detection(1)
STATE OF OUTPUT PORT CONDITION ERROR STATUS CODE MEANING
Off IOUT = 0 mA 0
On Tj<Tj,trip global 1 Normal
On all channels Tj>Tj,trip global All error status bits = 0 Global overtemperature
Off Tj<Tj,trip channel n 1 Normal
On
On Off Tj>Tj,trip channel n Channel n error status bit = 0 Channel n overtemperature
(1) The global shutdown threshold temperature is approximately 170°C.
©20072011, Texas Instruments Incorporated Submit Documentation Feedback 23
Product Folder Link(s): TLC5916 TLC5917
TLC5916, TLC5917
SLVS695C JUNE 2007REVISED FEBRUARY 2011
www.ti.com
8-Bit Configuration Code and Current Gain
Bit definition of the Configuration Code in the Configuration Latch is shown in Table 7.
Table 7. Bit Definition of 8-Bit Configuration Code
Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
Meaning CM HC CC0 CC1 CC2 CC3 CC4 CC5
Default 11111111
Bit 7 is first sent into TLC5916/TLC5917 via SDI. Bits 1 to 7 {HC, CC[0:5]} determine the voltage gain (VG) that
affects the voltage at R-EXT and indirectly affects the reference current, Iref, flowing through the external resistor
at R-EXT. Bit 0 is the Current Multiplier (CM) that determines the ratio IOUT,target/Iref. Each combination of VG and
CM gives a specific Current Gain (CG).
VG: the relationship between {HC,CC[0:5]} and the voltage gain is calculated as shown below:
VG = (1 + HC) ×(1 + D/64) / 4
D = CC0 ×25+ CC1 ×24+ CC2 ×23+ CC3 ×22+ CC4 ×21+ CC5 ×20
Where HC is 1 or 0, and D is the binary value of CC[0:5]. So, the VG could be regarded as a floating-point
number with 1-bit exponent HC and 6-bit mantissa CC[0:5]. {HC,CC[0:5]} divides the programmable voltage
gain VG into 128 steps and two sub-bands:
Low voltage sub-band (HC = 0): VG = 1/4 ~ 127/256, linearly divided into 64 steps
High voltage sub-band (HC = 1): VG = 1/2 ~ 127/128, linearly divided into 64 steps
CM: In addition to determining the ratio IOUT,target/Iref, CM limits the output current range.
High Current Multiplier (CM = 1): IOUT,target/Iref = 15, suitable for output current range IOUT = 10 mA to 120 mA.
Low Current Multiplier (CM = 0): IOUT,target/Iref = 5, suitable for output current range IOUT = 3 mA to 40 mA
CG: The total Current Gain is defined as the following.
VR-EXT = 1.26 V ×VG
Iref = VR-EXT/Rext, if the external resistor, Rext, is connected to ground.
IOUT,target = Iref ×15 ×3CM 1= 1.26 V/Rext ×VG ×15 ×3CM 1= (1.26 V/Rext ×15) ×CG
CG = VG ×3CM 1
Therefore, CG = (1/12) to (127/128), and it is divided into 256 steps. If CG = 127/128 = 0.992, the
IOUT,target-Rext.
Examples
Configuration Code {CM, HC, CC[0:5]} = {1,1,111111}
VG = 127/128 = 0.992 and CG = VG ×30= VG = 0.992
Configuration Code = {1,1,000000}
VG = (1 + 1) ×(1 + 0/64)/4 = 1/2 = 0.5, and CG = 0.5
Configuration Code = {0,0,000000}
VG = (1 + 0) ×(1 + 0/64)/4 = 1/4, and CG = (1/4) ×31= 1/12
After power on, the default value of the Configuration Code {CM, HC, CC[0:5]} is {1,1,111111}. Therefore,
VG = CG = 0.992. The relationship between the Configuration Code and the Current Gain is shown in Figure 22.
24 Submit Documentation Feedback ©20072011, Texas Instruments Incorporated
Product Folder Link(s): TLC5916 TLC5917
1.00
0.00
0.50
0.25
0.75
CM = 0 (Low Current Multiplier)
HC = 1 (High
Voltage SubBand)
HC = 0 (Low
Voltage SubBand)
HC = 0 (Low
Voltage SubBand)
HC = 1 (High
Voltage SubBand)
CM = 1 (High Current Multiplier)
Configuration Code (CM, HC, CC[0:5]) in Binary Format
Current Gain (CG)
TLC5916, TLC5917
www.ti.com
SLVS695C JUNE 2007REVISED FEBRUARY 2011
Figure 22. Current Gain vs Configuration Code
©20072011, Texas Instruments Incorporated Submit Documentation Feedback 25
Product Folder Link(s): TLC5916 TLC5917
TLC5916, TLC5917
SLVS695C JUNE 2007REVISED FEBRUARY 2011
www.ti.com
REVISION HISTORY
Changes from Revision A (November 2010) to Revision B Page
Added Maximum LED Voltage 20-V to Features. ................................................................................................................. 1
Added Abstract section. ........................................................................................................................................................ 1
Changed resistor value in Single Implementation diagram from 840Ωto 720Ω. ................................................................. 1
Changed Default Relationship Curve to reflect correct data. ............................................................................................. 18
Changed resistor value in Single Implementation diagram from 840Ωto 720Ω. ............................................................... 19
Changed resistor value in Cascading Implementation diagram from 840Ωto 720Ω. ........................................................ 19
Changes from Revision B (February 2011) to Revision C Page
Replaced the Power Dissipation and Thermal Impedance table with the Thermal Information tables ................................ 7
26 Submit Documentation Feedback ©20072011, Texas Instruments Incorporated
Product Folder Link(s): TLC5916 TLC5917
PACKAGE OPTION ADDENDUM
www.ti.com 15-Feb-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TLC5916ID ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC5916IDG4 ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC5916IDR ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC5916IDRG4 ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC5916IN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC5916INE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC5916IPW ACTIVE TSSOP PW 16 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC5916IPWG4 ACTIVE TSSOP PW 16 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC5916IPWR ACTIVE TSSOP PW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC5916IPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC5917ID ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC5917IDG4 ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC5917IDR ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC5917IDRG4 ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC5917IN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC5917INE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC5917IPW ACTIVE TSSOP PW 16 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC5917IPWG4 ACTIVE TSSOP PW 16 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 15-Feb-2011
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TLC5917IPWR ACTIVE TSSOP PW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC5917IPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLC5916, TLC5917 :
Automotive: TLC5916-Q1, TLC5917-Q1
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TLC5916IDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
TLC5916IPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TLC5917IDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
TLC5917IPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TLC5916IDR SOIC D 16 2500 333.2 345.9 28.6
TLC5916IPWR TSSOP PW 16 2000 367.0 367.0 35.0
TLC5917IDR SOIC D 16 2500 333.2 345.9 28.6
TLC5917IPWR TSSOP PW 16 2000 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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