Product Folder Sample & Buy Support & Community Tools & Software Technical Documents Reference Design LM2765 SNVS070D - MARCH 2000 - REVISED SEPTEMBER 2016 LM2765 Switched-Capacitor Voltage Converter 1 Features 3 Description * * * * * The LM2765 CMOS charge-pump voltage converter operates as a voltage doubler for an input voltage in the range of 1.8 V to 5.5 V. Two low-cost capacitors and a diode are used in this circuit to provide up to 20 mA of output current. 1 Doubles Input Supply Voltage SOT-23 6-Pin Package 20- Typical Output Impedance 90% Typical Conversion Efficiency at 20 mA 0.1-A Typical Shutdown Current 2 Applications * * * * * * Cellular Phones Pagers PDAs Operational Amplifier Power Supplies Interface Power Supplies Handheld Instruments The LM2765 operates at 50-kHz switching frequency to reduce output resistance and voltage ripple. With an operating current of only 130 A (operating efficiency greater than 90% with most loads) and 0.1A typical shutdown current, the LM2765 provides ideal performance for battery powered systems. The device is manufactured in a 6-pin SOT-23 package. Device Information(1) PART NUMBER LM2765 PACKAGE SOT-23 (6) BODY SIZE (NOM) 2.90 mm x 1.60 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. space space space space Voltage Doubler 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM2765 SNVS070D - MARCH 2000 - REVISED SEPTEMBER 2016 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 4 4 4 4 5 5 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics ............................................. 7 Parameter Measurement Information .................. 7 8 Detailed Description .............................................. 8 7.1 Test Circuit ................................................................ 7 8.1 Overview ................................................................... 8 8.2 Functional Block Diagram ......................................... 8 8.3 Feature Description................................................... 8 8.4 Device Functional Modes.......................................... 8 9 Application and Implementation .......................... 9 9.1 Application Information.............................................. 9 9.2 Typical Applications .................................................. 9 10 Power Supply Recommendations ..................... 12 11 Layout................................................................... 13 11.1 Layout Guidelines ................................................. 13 11.2 Layout Example .................................................... 13 12 Device and Documentation Support ................. 14 12.1 12.2 12.3 12.4 12.5 12.6 Device Support...................................................... Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 14 14 14 14 14 14 13 Mechanical, Packaging, and Orderable Information ........................................................... 14 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (May 2013) to Revision D Page * Added Pin Configuration and Functions section, ESD Rating table, Feature Description , Device Functional Modes, Application and Implementation, Power Supply Recommendations, Layout, Device and Documentation Support, and Mechanical, Packaging, and Orderable Information sections; change pin name "VOUT" to "OUT"...................................... 1 * Added top nav icon for TI design .......................................................................................................................................... 1 * Changed RJA value from 210C/W to 185.2C/W; add additional thermal values ................................................................ 4 Changes from Revision B (May 2013) to Revision C * 2 Page Changed layout of National Semiconductor data sheet to TI format.................................................................................... 12 Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM2765 LM2765 www.ti.com SNVS070D - MARCH 2000 - REVISED SEPTEMBER 2016 5 Pin Configuration and Functions DBV Package 6-Pin SOT-23 Top View 1 6 2 5 3 4 Pin Functions PIN NO. 1 TYPE NAME DESCRIPTION V+ Power Power supply positive voltage input 2 GND Ground Power supply ground input 3 CAP- Power Connect this pin to the negative terminal of the charge-pump capacitor. 4 SD Input 5 OUT Power Positive voltage output 6 CAP+ Power Connect this pin to the positive terminal of the charge-pump capacitor. Shutdown control pin; tie this pin to ground in normal operation. Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM2765 3 LM2765 SNVS070D - MARCH 2000 - REVISED SEPTEMBER 2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) MIN Supply voltage (V+ to GND or V+ to OUT) (GND - 0.3 V) SD MAX UNIT 5.8 V (V+ + 0.3 V) OUT continuous output current 40 mA Output short-circuit duration to GND (3) 1 sec Continuous power dissipation (TA = 25C) (4) 600 mW TJ-MAX (4) 150 C 150 C -65 Storage temperature, Tstg (1) (2) (3) (4) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/ Distributors for availability and specifications. OUT may be shorted to GND for one second without damage. However, shorting OUT to V+ may damage the device and must be avoided. Also, for temperatures above 85C, OUT must not be shorted to GND or V+, or device may be damaged. The maximum allowable power dissipation is calculated by using PD-MAX = (TJ-MAX - TA)/RJA, where TJ-MAX is the maximum junction temperature, TA is the ambient temperature, and RJA is the junction-to-ambient thermal resistance of the specified package. 6.2 ESD Ratings V(ESD) (1) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 VALUE UNIT 2000 V 200 V (1) Machine model JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT Ambient temperature -40 85 C Junction temperature -40 100 C 6.4 Thermal Information LM2765 THERMAL METRIC (1) DBV (SOT-23) UNIT 6 PINS RJA Junction-to-ambient thermal resistance 185.2 C/W RJC(top) Junction-to-case (top) thermal resistance 131.5 C/W RJB Junction-to-board thermal resistance 34.8 C/W JT Junction-to-top characterization parameter 21.6 C/W JB Junction-to-board characterization parameter 34.1 C/W (1) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM2765 LM2765 www.ti.com SNVS070D - MARCH 2000 - REVISED SEPTEMBER 2016 6.5 Electrical Characteristics MIN and MAX limits apply over the full operating temperature range. Unless otherwise specified: TJ = 25C, V+ = 5 V, C1 = C2 = 3.3 F. (1) PARAMETER TEST CONDITIONS MIN V+ Supply voltage IQ Supply current ISD Shutdown supply current VSD Shutdown pin input voltage IL Output current ROUT Output resistance (2) IL = 20 mA OSC Oscillator frequency See (3) 40 SW Switching frequency See (3) 20 PEFF Power efficiency RL (1 k) between GND and OUT VOEFF Voltage conversion efficiency No load (1) (2) (3) TYP MAX 5.5 V 130 450 A 0.1 0.5 1.8 No load TA = 85C 0.2 Shutdown mode 2 Normal operation 0.6 2.5 V VIN 5.5 V 20 1.8 V VIN 2.5 V 10 UNIT A V mA 20 40 100 200 kHz 50 100 kHz 92% 99.96% In the test circuit, capacitors C1 and C2 are 3.3-F, 0.3- maximum ESR capacitors. Capacitors with higher ESR increase output resistance, reduce output voltage, and efficiency. Specified output resistance includes internal switch resistance and capacitor ESR. See the details in Application and Implementation for simple negative voltage converter. The output switches operate at one half of the oscillator frequency, OSC = 2SW. 6.6 Typical Characteristics (Circuit of Test Circuit, VIN = 5V, TA = 25C unless otherwise specified) Figure 1. Supply Current vs Supply Voltage Figure 2. Output Resistance vs Capacitance Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM2765 5 LM2765 SNVS070D - MARCH 2000 - REVISED SEPTEMBER 2016 www.ti.com Typical Characteristics (continued) (Circuit of Test Circuit, VIN = 5V, TA = 25C unless otherwise specified) 6 Figure 3. Output Resistance vs Supply Voltage Figure 4. Output Resistance vs Temperature Figure 5. Output Voltage vs Load Current Figure 6. Switching Frequency vs Supply Voltage Figure 7. Switching Frequency vs Temperature Figure 8. Output Ripple vs Load Current Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM2765 LM2765 www.ti.com SNVS070D - MARCH 2000 - REVISED SEPTEMBER 2016 7 Parameter Measurement Information 7.1 Test Circuit Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM2765 7 LM2765 SNVS070D - MARCH 2000 - REVISED SEPTEMBER 2016 www.ti.com 8 Detailed Description 8.1 Overview The LM2765 CMOS charge-pump voltage converter operates as a voltage doubler for an input voltage in the range of 1.8 V to 5.5 V. Two low-cost capacitors and a diode (needed during start-up) are used in this circuit to provide up to 20 mA of output current. 8.2 Functional Block Diagram LM2765 V+ SD OUT OSCILLATOR CAP+ Switch Array Switch Drivers CAPGND Copyright (c) 2016, Texas Instruments Incorporated 8.3 Feature Description 8.3.1 Circuit Description The LM2765 contains four large CMOS switches which are switched in a sequence to double the input supply voltage. Energy transfer and storage are provided by external capacitors. Figure 9 shows the voltage conversion scheme. When S2 and S4 are closed, C1 charges to the supply voltage V+. During this time interval, switches S1 and S3 are open. In the next time interval, S2 and S4 are open; at the same time, S1 and S3 are closed, the sum of the input voltage V+ and the voltage across C1 gives the 2 V+ output voltage when there is no load. The output voltage drop when a load is added is determined by the parasitic resistance (Rds(on) of the MOSFET switches and the ESR of the capacitors) and the charge transfer loss between capacitors. See Application and Implementation for more details. Figure 9. Voltage Doubling Principle 8.4 Device Functional Modes 8.4.1 Shutdown Mode A shutdown (SD) pin is available to disable the device and reduce the quiescent current to 1 A. In normal operating mode, the SD pin is connected to ground. The device can be brought into the shutdown mode by applying to the SD pin a voltage greater than 40% of the V+ pin voltage. 8 Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM2765 LM2765 www.ti.com SNVS070D - MARCH 2000 - REVISED SEPTEMBER 2016 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes. Customers must validate and test their design implementation to confirm system functionality. 9.1 Application Information The LM2765 provides a simple and efficient means of creating an output voltage level equal to twice that of the input voltage. Without the need of an inductor, the application solution size can be reduced versus the magnetic DC-DC converter solution. 9.2 Typical Applications 9.2.1 Voltage Doubler The main application of the LM2765 is to double the input voltage. The range of the input supply voltage is 1.8 V to 5.5 V. Figure 10. Voltage Doubler 9.2.1.1 Design Requirements Example requirements for LM2765 device applications: DESIGN PARAMETER EXAMPLE VALUE Input voltage range 1.8 V to 5.5 V Output current 0 mA to 20 mA Boost switching frequency 20 kHz Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM2765 9 LM2765 SNVS070D - MARCH 2000 - REVISED SEPTEMBER 2016 www.ti.com 9.2.1.2 Detailed Design Requirements 9.2.1.2.1 Positive Voltage Doubler The output characteristics of this circuit can be approximated by an ideal voltage source in series with a resistance. The voltage source equals 2 V+. The output resistance ROUT is a function of the ON resistance of the internal MOSFET switches, the oscillator frequency, the capacitance and equivalent series resistance (ESR) of C1 and C2. Since the switching current charging and discharging C1 is approximately twice as the output current, the effect of the ESR of the pumping capacitor C1 will be multiplied by four in the output resistance. The output capacitor C2 is charging and discharging at a current approximately equal to the output current, therefore, its ESR only counts when in the output resistance. A good approximation of ROUT is: 4176 2459 + 2 + 4'54%1 + '54%2 &15% x %1 where * RSW is the sum of the ON resistance of the internal MOSFET switches shown in Figure 9. RSW is typically 8 for the LM2765. (1) The peak-to-peak output voltage ripple is determined by the oscillator frequency, the capacitance and ESR of the output capacitor C2: 84+22.' = +. + 2 x +. x '54%2 &15% x %2 (2) High capacitance, low-ESR capacitors can reduce both the output resistance and the voltage ripple. The Schottky diode D1 is only needed for start-up. The internal oscillator circuit uses the OUT pin and the GND pin. Voltage across OUT and GND must be larger than 1.8 V to insure the operation of the oscillator. During start-up, D1 is used to charge up the voltage at the OUT pin to start the oscillator; also, it protects the device from turning-on its own parasitic diode and potentially latching-up. Therefore, the Schottky diode D1 must have enough current carrying capability to charge the output capacitor at start-up, as well as a low forward voltage to prevent the internal parasitic diode from turning-on. A Schottky diode such as 1N5817 can be used for most applications. If the input voltage ramp is less than 10 V/ms, a smaller Schottky diode such as MBR0520LT1 can be used to reduce the circuit size. 9.2.1.2.2 Capacitor Selection As discussed in Positive Voltage Doubler, the output resistance and ripple voltage are dependent on the capacitance and ESR values of the external capacitors. The output voltage drop is the load current times the output resistance, and the power efficiency is: 2176 +. 2 4. = = 2 2 2+0 +. 4. + +. 4176 + +3 (8+) where * * IQ(V+) is the quiescent power loss of the device; and IL2Rout is the conversion loss associated with the switch on-resistance, the two external capacitors and their ESRs. (3) The selection of capacitors is based on the specifications of the dropout voltage (which equals IOUT ROUT), the output voltage ripple, and the converter efficiency. Low ESR capacitors are recommended to maximize efficiency, reduce the output voltage drop and voltage ripple. 9.2.1.2.3 Paralleling Devices Any number of LM2765 devices can be paralleled to reduce the output resistance. Each device must have its own pumping capacitor C1, while only one output capacitor, COUT, is required as shown in Figure 11. The composite output resistance is: ROUT = ROUT of each LM2765 / number of devices 10 Submit Documentation Feedback (4) Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM2765 LM2765 www.ti.com SNVS070D - MARCH 2000 - REVISED SEPTEMBER 2016 Figure 11. Lowering Output Resistance by Paralleling Devices 9.2.1.2.4 Cascading Devices Cascading the LM2765 devices is an easy way to produce a greater voltage (a two-stage cascade circuit is shown in Figure 12). The effective output resistance is equal to the weighted sum of each individual device, shown in Equation 5: ROUT = 1.5 ROUT_1 + ROUT_2 (5) Note that the increasing of the number of cascading stages is practically limited since it significantly reduces the efficiency, increases the output resistance and output voltage ripple. Figure 12. Increasing Output Voltage by Cascading Devices 9.2.1.2.5 Regulating VOUT It is possible to regulate the output of the LM2765 by use of a low dropout regulator (such as LP2980-5.0). The whole converter is depicted in Figure 13. A different output voltage is possible by use of LP2980-3.3, LP2980-3.0, or LP2980-ADJ. Note that the following conditions must be satisfied simultaneously for worst-case design: 2Vin_min > Vout_min + Vdrop_max (LP2980) + Iout_max x Rout_max (LM2765) 2Vin_max < Vout_max + Vdrop_min (LP2980) + Iout_min x Rout_min (LM2765) (6) (7) Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM2765 11 LM2765 SNVS070D - MARCH 2000 - REVISED SEPTEMBER 2016 www.ti.com Figure 13. Generating a Regulated +5-V From +3-V Input Voltage 9.2.1.3 Application Curve Figure 14. Efficiency vs Load Current 10 Power Supply Recommendations The LM2765 is designed to operate from as an inverter over an input voltage supply range between 1.8 V and 5.5 V. This input supply must be well regulated and capable to supply the required input current. If the input supply is located far from the device, additional bulk capacitance may be required in addition to the ceramic bypass capacitors. 12 Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM2765 LM2765 www.ti.com SNVS070D - MARCH 2000 - REVISED SEPTEMBER 2016 11 Layout 11.1 Layout Guidelines The high switching frequency and large switching currents of the LM2765 make the choice of layout important. Use the following steps as a reference to ensure the device is stable and maintains proper LED current regulation across its intended operating voltage and current range. * Place CIN on the top layer (same layer as the LM2765) and as close as possible to the device. Connecting the input capacitor through short, wide traces to both the V+ and GND pins reduces the inductive voltage spikes that occur during switching which can corrupt the V+ line. * Place COUT on the top layer (same layer as the LM2765) and as close as possible to the OUT and GND pin. The returns for both CIN and COUT must come together at one point, as close as possible to the GND pin. Connecting COUT through short, wide traces reduce the series inductance on the OUT and GND pins that can corrupt the VOUT and GND lines and cause excessive noise in the device and surrounding circuitry. * Place C1 on the top layer (same layer as the LM2765 device) and as close as possible to the device. Connect the flying capacitor through short, wide traces to both the CAP+ and CAP- pins. 11.2 Layout Example LM2765 V+ CAP+ GND OUT CAP- SD Figure 15. Typical Layout for LM2765 Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM2765 13 LM2765 SNVS070D - MARCH 2000 - REVISED SEPTEMBER 2016 www.ti.com 12 Device and Documentation Support 12.1 Device Support 12.1.1 Third-Party Products Disclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE. 12.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2ETM Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.4 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.5 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.6 Glossary SLYZ022 -- TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 14 Submit Documentation Feedback Copyright (c) 2000-2016, Texas Instruments Incorporated Product Folder Links: LM2765 PACKAGE OPTION ADDENDUM www.ti.com 29-Aug-2016 PACKAGING INFORMATION Orderable Device Status (1) LM2765M6X/NOPB ACTIVE Package Type Package Pins Package Drawing Qty SOT-23 DBV 6 3000 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM Op Temp (C) Device Marking (4/5) -40 to 85 S15B (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. 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Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 29-Aug-2016 Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device LM2765M6X/NOPB Package Package Pins Type Drawing SPQ SOT-23 3000 DBV 6 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 178.0 8.4 Pack Materials-Page 1 3.2 B0 (mm) K0 (mm) P1 (mm) 3.2 1.4 4.0 W Pin1 (mm) Quadrant 8.0 Q3 PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM2765M6X/NOPB SOT-23 DBV 6 3000 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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