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QS5807/A
GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE
JANUARY 2001
2001 Integrated Device Technology, Inc. DSC-5231/2c
QS5807/A
INDUSTRIAL TEMPERATURE RANGE
GUARANTEED LOW SKEW
CMOS CLOCK
DRIVER/BUFFER
FUNCTIONAL BLOCK DIAGRAM
IN
O1
O2
O3
O4
O5
O6
O7
O8
O9
O10
DESCRIPTION:
The QS5807 clock driver/buffer circuits can be used for clock buffering
schemes where low skew is a key parameter. The Q S5807 offers ten
non-inverting outputs. Designed in IDT's proprietary QCMOS process,
these devices provide low propagation delay buffering with on-chip
skew of 0.3ns for same-transition signals.
The QS5807 is characterized for operation at -40°C to +85°C.
FEATURES:
− 10 outputs
− Rail-to-rail output voltage swing
− Input hysteresis for better noise margin
− Guaranteed low skew:
• 0.3ns output skew (same bank)
• 0.6ns output skew (different bank)
• 1ns part-to-part skew
− Std. and A speed grades
− Available in QSOP packages
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INDUSTRIAL TEMPERATURE RANGE
QS5807/A
GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
PIN CONFIGURATION
QSOP/ SOIC
TOP VIEW
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
IN
GND
O1
GND
VCC
GND
GND
GND
O2
O3
O4
O5
O6
O7
O8
O9
O10
VCC
VCC
VCC
SO20-8
ABSOLUTE MAXIMUM RATINGS (1)
Symbol Description Max. Unit
V
TERM(2) Supply Voltage to Ground – 0.5 to +7 V
DC Output Voltage VOUT – 0.5 to +7 V
V
TERM(3) DC Input Voltage VIN – 0.5 to +7 V
VAC AC Input Voltage (pulse width ≤20ns) -3 V
IOUT DC Output Current VIN < 0 -20 mA
DC Output Current Max. Sink Current/Pin 120 mA
TSTG Storage Temperature – 65 to +150 °C
TJJunction Temperature +150 °C
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other c onditions above t hose indicated in the operational s ections
of this specification is not implied. Exposure to absolute maximum
rating condit i ons for extended periods may affec t reliability.
2. Vc c Terminals .
3. All terminals except Vcc.
CAPACITANCE (TA = +25OC, f = 1.0MHz, VIN = 0V)
Pins Typ. Max. (1) Unit
CIN 36 pF
NOTE:
1. This paramet er i s guaranteed but not producti on tested.
PIN DESCRIPTION
Pin Names I/O Description
IN I Clock Input
Ox O Clock Outputs
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QS5807/A
GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = -40°C to +85°C, VCC = 5.0V ± 10%, VHC = VCC - 0.2V, VLC = 0.2V
Symbol Parameter Test Conditions Min. Typ.(1) Max. Unit
VIH Input HIGH Voltage Guaranteed Logic HIGH for All Inputs 2 — — V
VIL Input LOW Voltage Guaranteed Logic LOW for All Inputs — — 0.8 V
VIC Clamp Diode Voltage (3) Vcc = Min., IIN = -18mA — –0.7 –1.2 V
VOH Output HIGH Voltage Vcc = Min., VIN = VIH or VIL, IOH = -300µAV
HC Vcc —
Vcc = Min., VIN = VIH or VIL, IOH = -15mA 3.6 4.3 — V
Vcc = Min., VIN = VIH or VIL, IOH = -24mA 2.4 3.8 —
VOL Output LOW Voltage Vcc = Min., VIN = VIH or VIL, IOL = 300µA—GNDV
LC V
Vcc = Min., VIN = VIH or VIL, IOL = 64mA — 0.3 0.55
IIN Input Leakage Current Vcc = Max., VIN = VCC or GND — — ±1 µA
IOFF Input Power Off Leakage Vcc = 0V, VIN = VCC or GND — — ±1 µA
IOS Short Circuit Current (2,3) Vcc = Max., VOUT = GND –60 ——mA
∆V
TInput Hysteresis VTLH - VTHL for All Inputs — 0.2 — V
NOTES:
1. Typical values are at V CC = 5. 0V, TA = 25°C.
2. Not m ore t han one output shoul d be used to tes t this hi gh power condition. Duration is l ess than one second.
3. Guaranteed by design but not tested.
POWER SUPPLY CHARACTERISTICS
Symbol Parameter Test Conditions Typ. Max. Unit
ICC Quiescent Power Supply Current VCC = Max., VIN = GND or Vcc 0.005 0.5 mA
∆ICC Supply Current per Input HIGH VCC = Max., VIN = 3.4V
Input toggling at 50% duty cycle 0.5 2.5 mA
ICCD Dynamic Power Supply Current per Output (1) VCC = Max., outputs Enabled 0.12 0.2 mA/MHz
ICTotal Power Supply Current Examples (2) VCC = Max.,
Input at 50% duty cycle VIN = GND or Vcc 12 21 mA
fI = 10MHz VIN = GND or 3V 12 2.2
VCC = Max.,
Input at 50% duty cycle VIN = GND or Vcc 3 6
fI = 2.5MHz VIN = GND or 3V 3.5 7
NOTES:
1. Guaranteed by des i gn but not tested. CL = 0pF.
2. IC = ICC + (∆ICC)(DH)(NT) + ICCD (fO)(NO)
where:
DH = Input Dut y Cycle
NT = Number of TTL HIGH inputs at DH
fO = Output Frequency
NO = Number of output s at fO
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INDUSTRIAL TEMPERATURE RANGE
QS5807/A
GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
TA = -40°C to +85°C, VCC = 5.0V ± 10%
CLOAD = 50pF, RLOAD = 500Ω unless otherwise noted. QS5807 QS5807A
Symbol Parameter (1) Min. Max. Min. Max. Unit
tSK(01) Skew between all outputs, same transition — 0.5 — 0.35 ns
tSK(P) Pulse Skew; skew between opposite transitions of the same output (tPHL - tPLH)—1—1ns
tSK(T) Part-to-part skew (2) —1.5 — 1.5 ns
tPLH
tPHL Propagation Delay (2)
IN to Ox 1.5 5.6 1.5 5.3 ns
tROutput Rise Time, 0.8V to 2V (3) — 1.5 — 1.5 ns
tFOutput Fall Time, 0.2Vcc to 0.8Vcc (3) —3—3 ns
NOTES:
1. Sk ew param eters are guaranteed across temperature range, but not tested. S kew parameters are m easured at 0.5V cc.
2. tSK(T) only applies to devic es of the same transi tion, part type, t em perature, power suppl y volt age, l oadi ng, package, and speed grade.
3. The propagation del ay range indic at ed by Min. and Max. s pecifications results f rom process and environmental variables. Thes e propagat i on del ays
do not imply limi t skew.
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QS5807/A
GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE
50pF 500Ω
VIN
Pulse
Generator DUT
50Ω
VCC
VOUT
Pulse ge n erato r for a ll pu ls e s : f ≤ 1.0MH z; tF ≤ 2.5ns; tR ≤ 2.5ns
INPUT
PART 1 OUTPUT
PART 2 OUTPUT
tPLH1 tPHL1
tPLH2 tPHL2
tSK(t)
tSK(t)
1.5V
3V
0V
VOH
0.5VCC
0.5VCC
VOH
VOL
VOL
tSK(p) = tPLH2 - tPLH1 or tPHL2 - tPHL1
INPUT
OUTPUT 2.0V
0.8V
1.5V
3V
0V
VOH
0.5VCC
VOL
tPLH tPHL
tRtF
INPUT
OUTPUT
tPLH tPHL
1.5V
3V
0V
VOH
0.5VCC
VOL
tSK(p) = tPHL - tPLHL
INPUT
OUTPUT 1
tPLH1
1.5V
3V
0V
VOH
0.5VCC
0.5VCC
VOH
VOL
VOL
OUTPUT 2
tPHL1
tSK(O1) tSK(O1)
tPLH2 tPHL2
tSK(01) = tPLH2 - tPLH1 or tPHL2 - tPHL1
TEST CIRCUITS AND WAVEFORMS
PROPAGATION DELAY PULSE SKEW — tSK(P)
OUTPUT SKEW — tSK(O1) PART-TO-PART SKEW — tSK(T)
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INDUSTRIAL TEMPERATURE RANGE
QS5807/A
GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
ORDERING INFORMATION
CORPORATE HEADQUARTERS for SALES:
2975 Stender Way 800-345-7015 or 408-727-6116
Santa Clara, CA 95054 fax: 408-492-8674
www.idt.com*
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The IDT logo, QuickSwitch, and SynchroSwitch are registered trademarks of Integrated Device Technology, Inc.
QS XXXX
D evice T ype X
Package
Q
5807
5807A Guaranteed Low Skew C M OS Clock D river/Buffer
Quarter-size Sm all Ou tline Package (SO20-8)
