MK1491-06
AMD GEODE™ CLOCK SOURCE CLOCK SYNTHESIZER
IDT™ / ICS™
AMD GEODE™ CLOCK SOURCE 5
MK1491-06 REV J 110204
External Components
The MK1491-06 requires some inexpensive external
components f o r proper operat ion. Deco upling capacitors of
0.1µF should be connect ed on each VDD pi n to g ro und, as
close to the MK1491-06 as possible. A series termination
resistor of 33Ω ma y be used for each clock output . See t he
discussion below for other e xternal resistors required for
proper I/O operation. The 14.3 MHz oscillator has internal
caps that provide the proper load for a parallel resonant
crystal with CL=18 pF. For tuning with other values of CL, the
formula 2*(CL-18) gives the value of each capa cito r th at
should be connected between X1 and ground and X2 and
ground.
I/O Structure
The MK1491-06 provides more functionality in a 28-pin
package by using a unique I/O technique. The device
chec ks the status of all I /O pins during pow er-up and at e xit
from the P ower Do wn state. This status (pulled high, low, or
mid-level) then determines the frequency selections and
power down modes (see the tables on pages 2 and 4).
Within 10ms after power up, the inputs change to outputs
and the clocks start up. In the diagrams to the right, the 33Ω
resistors are the normal output termination resistors. The
10kΩ resistor pulls low to generate a logic zero. Weak
internal pull-up resistors ar e present on SEL24, EPCI# , FS,
LE#, PCISTP#, and SLOW#. These pins should be
connected directly to VDD or GND if not under active
control. Internal resistors on PEN, SEL A UDIO, and TS pull
to a mid-lev el (M).
*Note: Do not use a TTL load. This will ov ercome the 10 kΩ
pull-down and force the input to a logic 1.
33
To load*
10 k
I/O
For select
= 0 (low) Do not stuff for
“1” selection