Alliance Semiconductor
Production
March 2003 P1818/19/20/21/22
Low Power Mobile VGA EMI Reduction IC
2575 Augustine Drive • Santa Clara, CA 95054 • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com
®
Notice: The information in this document is subject to change without notice.
Features
• FCC approved method of EMI attenuation
• Provides up to 15 dB EMI reduction
• Generates a lo w EMI spr ead spe ctrum clo ck and a
non-spread reference clock of the input frequency
• Optimized for freque ncy range from 10 MHz to 160
MHz
P1818: 10 to 20 MHz
P1819: 20 to 40 MHz
P1820: 40 to 80 MHz
P1821: 10 to 40 MHz
P1822: 80 to 160 MHz
• Internal loop filter minimizes external components
and board space
• Selectable spread options: Down Spread and Cen-
ter Spread
• Low inherent cycle-to-cycle jitter
• Eight spread % selections: +/-0.625% to –3.5%
• 3.3V operating voltage
• CMOS/TTL compatible inputs and ou tputs
• Low power CMOS de sig n
• Supports notebook VGA and other LCD timing
controller applications
• Power down function for mobile application
• Products are available for industrial temperature
range.
• Availabl e in 8-pin SOIC and TSSOP
Product Description
The P18xx is a versatile spread spectrum frequency
modulator designed specifically for a wide range of input
clock frequencies from 10 to 160 MHz (see Input Fre-
quency and Modulation Ra te Selections). The P18xx
can generate an EMI reduced clock from crystal,
ceramic resonator, or system clock. The P18xx-A to
P18xx-H offer various combinations of spread options
and percentage deviations (see Spread Deviation Selec-
tions). These combinations include Down Spread,
Center Spread and percentage deviation range from
±0.625% to -3.50%.
The P18xx reduces electromagnetic inter ference (EMI)
at the clock source, allowing a system wide EMI
reduction for all the down stream clocks and data
dependent signals. The P18xx allows significant system
cost savings by reducing the number of circuit board
layers, ferrite beads, shielding, and other passive
components that are traditionally required to pass EMI
regulations.
The P18xx modulates the output of a single PLL in
order to “spread” the band width of a synthesized clock,
thereby decreasing the peak amplitudes of its
harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal
produced by oscillators and most clock generators.
Lowering EMI by increasing a signal’s bandwidth is
called “spread spectrum clock generation”.
The P18xx uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all-digital method.
Applications
The P18xx is targeted toward EMI management for
memory and LVDS interfaces in mobile graphic
chipsets and high-speed digital applications such as
PC peripheral device s, cons um e r electr on ics , and
embedded contro ller systems.
®
Low Power Mobile VGA EMI Reduction IC 2 of 8March 2003
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Notice: The information in this document is subject to change without notice.
Pin Diagrams
Block Diagram
P1818A/B/C/D
P1819A/B/C/D
P1820A/B/C/D
1 8
6
4
3
2 7
5
XIN
VSS
SRS
ModOut
XOUT
VDD
PD#
REF
P1821A/B/C/D
1 8
6
4
3
2 7
5
XIN
VSS
SRS
ModOut
XOUT
VDD
FRS
REF
1 8
6
4
3
2 7
5
XIN
VSS
D_C
ModOut
XOUT
VDD
PD#
REF
P1818E /F/G /H
P1819E /F/G /H
P1820E /F/G /H
P1822A
1 8
6
4
3
2 7
5
XIN
VSS
SRS
ModOut
MRS
VDD
SSON#
SR0
P1818/19/20/21/22 Block Diagram
Output
Divider
XIN
VSS
ModOUT
XOUT
Crystal
Oscillator
Modulation
Phase
Detector
Frequency
Divider
Feedback
Divider
Loop
Filter VCO
PLL
D_C PD# MRS FRS SRS VDD
REF
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Low Power Mobile VGA EMI Reduction IC 3 of 8March 2003
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Notice: The information in this document is subject to change without notice.
Input Frequency and Modulation Rate
Spread Deviation Selections
Part number Input
frequency range Output
frequency range Modulation rate
P1818 10 MHz to 20 MHz 10 MHz to 20 MHz Input frequency / 256
P1819 20 MHz to 40 MHz 20 MHz to 40 MHz Input frequency / 512
P1820 40 MHz to 80 MHz 40 MHz to 80 MHz Input frequency / 2048
P1821 FRS=0 10 MHz to 20 MHz 10 MHz to 20 MHz Input frequency / 256
FRS=1 20 MHz to 40 MHz 20 MHz to 40 MHz Input frequency / 512
P1822 80 MHz to 160 MHz 80 MHz to 160 MHz Input frequency / 3584
Part number1
1. A through H represents various combinations of spread deviations, options, and modulation rates.
SRS SR0 D_C Spread deviation
P18182/19/20/21A
2. Refer to Frequency vs. Deviation ( P1818A and P1818H).
0 N/A N/A -2.50% (Down)
1 -3.50% (Down)
P1818/19/20/21B0 N/A N/A -1.25% (Down)
1 -1.75% (Down)
P1818/19/20/21C0 N/A N/A +/-1.25% (Center)
1 +/-1.75% (Center)
P1818/19/20/21D0 N/A N/A +/-0.625% (Center)
1 +/-0.875% (Center)
P1818/19/20EN/A N/A 0 -1.25% (Down)
1 +/-0.625% (Center)
P1818/19/20FN/A N/A 0 -2.5% (Down)
1 +/-1.25% (Center)
P1818/19/20GN/A N/A 0 -1.75% (Down)
1 +/-0.875% (Center)
P18182/19/20HN/A N/A 0 -3.5% (Down)
1 +/-1.75% (Center)
P1822A
0 0 N/A -1.25% (Down)
0 1 -2.50% (Down)
1 0 -1.75% (Down)
1 1 -3.50% (Down)
P1822B
0 0 N/A + /-0.625% (Center)
0 1 +/-1.25% (Center)
1 0 +/-0.875% (Center)
1 1 +/-1.75% (Center)
®
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Notice: The information in this document is subject to change without notice.
Frequency vs. Deviation (P1818A and P1818H)
Pin Description
Frequency Deviation in P1818A Deviation in P1818H
SRS = 1 SRS = 0 D_C = 1 D_C = 0
10 MHz -4.4% -3.3% -4.4% ±2.2%
15 MHz -1.8% -1.26% -1.8% ±0.9%
20 MHz -0.8% -0.6% -0.8% ±0.4%
Pin
number Name Type Description
1 XIN I Connect to externally genera ted clock signal or crystal.
2 VSS P Ground Connectio n. Connect to system ground.
3 SRS I Spread Range Select. Digital logic input used to select frequency devi-
ation (see Spread Deviation Selections). This pin has an internal pull-
up resi stor.
31
1. Please refer to Figure 1 for pin assignment.
D_C I Digital logic input used to select Down (LOW) or Center (HIGH) Spread
Options (see Spread Deviation Selections). This pin has an internal
pull-up resistor.
4 ModOut O Spread Spectrum clock output (see Input Frequency and Modulation
Rate Selections and Spread Deviation Selections).
5 REF O Non-modulated reference output clock of the input frequency.
5/61FRS I Frequency Range Select. Digital logic input used to select input fre-
quency range (see Input Frequency and Modulation Rate Selections).
This pin has an internal pull-up resistor.
61PD# I Power-Down control pin. Pull LOW to enable Power-Down mode. This
pin has an internal pu ll-up resistor.
7 VDD P Connect to +3.3V
8 XOUT I Connect to crystal. No connect if externally generated clock signal is
used.
81MRS I Modulation Rate Select. Digital logic input used to select Modulation
Rate (see Spread Deviation Selections). This pin has an internal pull-
up resi stor.
®
Low Power Mobile VGA EMI Reduction IC 5 of 8March 2003
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Notice: The information in this document is subject to change without notice.
Absolute Maximum Ratings
DC Electrical Characteristics
3.3 V, 25° C
Symbol Parameter Rating Unit
VDD, VIN Voltage on any pin with respect to GND -0.5 to +7.0 V
TSTG Storage temperature -65 to +125 º C
TAOperating temperature 0 to +70 º C
Symbol Parameter Min Typ Max Unit
VIL Input low voltage GND – 0.3 – 0.8 V
VIH Input high voltage 2.00 – VDD + 0.3 V
IIL Input low curr ent (inpu ts D_C,
PD#, MRS, FRS, SRS) -60.0 – -20.00 µA
IIH Input high curren t – – 1 .0 0 µA
IXOL XOUT output low current
(@ 0.4 V, VDD = 3.3 V) 2.00 – 12.00 mA
IXOH XOUT output high current
(@ 2.5 V, VDD = 3.3 V) ––12.00mA
VOL Output low voltage
(VDD=3.3 V, IOL = 20 mA) ––0.4V
VOH Output high voltage
(VDD=3.3 V, IOH = 20 mA) ––2.8V
IDD Static supply current
Standby mode –4.5–mA
ICC Dynamic supply current
Normal mode (3.3 V and 25 pF
probe load i ng )
7.1
fIN-min
–26.9
fIN-max
mA
VDD Operating voltage – 3.3 – V
tON Power up time
(first locked clock cycle after
power up)
–0.18– mS
ZOUT Clock output impedance – 50 – Ω
®
Low Power Mobile VGA EMI Reduction IC 6 of 8March 2003
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Notice: The information in this document is subject to change without notice.
AC Electrical Characteristics
3.3 V, 25° C
Symbol Parameter Min Typ Max Unit
fIN Input frequency 10 – 160 MHz
fOUT Output frequency 10 – 160 MHz
tLH1
1. tLH and tHL are measured into a capacitive load of 15 pF
Output rise time
(measured at 0.8 V to 2.0 V) –0.66– ns
tHL1Output fall time
(measured at 2.0 V to 0.8 V) –0.65– ns
tJC Jitter (cycle to cycle) at 20 MHz -200 – 200 ps
tDOutput duty cycle 45 50 55 %
®
Low Power Mobile VGA EMI Reduction IC 7 of 8March 2003
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Notice: The information in this document is subject to change without notice.
Mechanical Package Outline (8-Pin SOIC)
Mechanical Package Outline (8-Pin TSSOP)
Symbol Inches Millimeters
Min Nor Max Min Nor Max
A 0.057 0.064 0.071 1.45 1.63 1.80
A1 0.004 0.007 0.010 0.10 0.18 0.25
A2 0.053 0.061 0.069 1.35 1.55 1.75
B 0.012 0.016 0.020 0.31 0.41 0.51
C 0.004 0.006 0.01 0.10 0.15 0.25
D 0.186 0.194 0.202 4.72 4.92 5.12
E 0.148 0.156 0.164 3.75 3.95 4.15
e 0.050 BSC 1.27 BSC
H 0.224 0.236 0.248 5.70 6.00 6.30
L 0.012 0.020 0.028 0.30 0.50 0.70
a 0°5°8°0°5°8°
Note: Controlling dimensions are millimeters.
SOIC: 0.074 grams unit weight.
D
A1
eB
A
A2
P18xxx
LOT NUMBER
YYWW H
a
C
L
E
Symbol Inches Millimeters
Min Nor Max Min Nor Max
A – – 0.047 – – 1.10
A1 0.002 – 0.006 0.05 – 0.15
A2 0.031 0.039 0.041 0.80 1.00 1.05
B 0.007 – 0.012 0.19 – 0.30
C 0.004 – 0.008 0.09 – 0.20
D 0.114 0.118 0.122 2.90 3.00 3.10
E 0.169 0.173 0.177 4.30 4.40 4.50
e 0.026 BSC 0.65 BSC
H 0.244 0.252 0.260 6.20 6.40 6.60
L 0.018 0.024 0.030 0.45 0.60 0.75
a 0° – 8° 0° – 8°
Note: Controlling dimensions are millimeters.
TSSOP: 0.034 grams unit weight.
D
A1
eB
A
A2
H
a
C
L
E
P
18xxx
Lot #
YYWW
®
© Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product
names may be the trademarks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility
for any errors that may appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this
data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to
be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or custom er. Alliance does not assume any
responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products including
liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in Alliance's Terms and Conditions of Sale
(which are available from Alliance). All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not convey a
license under any patent rights, copyrights, mask works rights, trademarks, or any other intellectual property rights of Alliance or th ird parties. Alliance does not authorize its products for use as critical
components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting
systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use.
Low Power Mobile VGA EMI Reduction IC 8 of 8March 2003
P1818/19/20/21/22
Notice: The information in this document is subject to change without notice.
Ordering Information
1. Flow prefix:
I = industrial temperature range (-40° C to 85° C)
P = commercial temperature range (0° C to 70° C)
2. Device number
3. Deviation (%) and spread option identifier
4. Device pin count
5. Package identifier:
ST = SOIC in tube
SR = SOIC in tape and reel
TT = TSSOP in tube
TR = TSSOP in tape and reel
Example:
Licensed under U.S. patent numbers 5,488,627 and 5,631,920.
X18XXX -08XX
12345
Ordering
number Marking Input
frequency
(MHz)
Frequency
deviation
(%)
Package
type Qty. /
reel Temp1
1. Products are available for industrial temperature range operation. Please contact factory for more information.
P1818A-08ST P1818A 10 – 20 -2.5, -3.5 8 PIN SOIC, TUBE 0°C to 70°C
P1818A-08SR P1818A 10 – 20 -2.5, -3.5 8 PIN SOIC, TAPE &
REEL 2,500 0°C to 70°C
P1818A-08TT P1818A 10 – 20 -2.5, -3.5 8 PIN TSSOP, TUBE 0°C to 70°C
P1818A-08TR P1818A 10 – 20 -2.5, -3.5 8 PIN TSSOP, TAPE &
REEL 2,500 0°C to 70°C
