LHE DO a 0257528 OO0e?3be2 ti T-Ub- (3 - 29 ct ADV MICRO MEMORY Advanced Am27C1 23 Micro 16,384 x 8-Bit CMOS EPROM Devices DISTINCTIVE CHARACTERISTICS @ Fast access time 55 ns @ Low power consumption: - 100 pA maximum standby current Programming voltage: 12.5 V Single +5-V power supply e@ JEDEC-approved pinout @ 410% power supply tolerance available @ One-Time Programmable (OTP) Flashrite program- ming @ Latch-up protected to 100 mA from -1 V to Veg +1 V GENERAL DESCRIPTION The Am27C128 is a 128K-bit, ultraviolet erasable program- mable read-only memory. It is organized as 16,384 words by 8 bits per word, operates from a single + 5-V supply, has a static standby mode, and features fast single address location programming. Products. are available in windowed ceramic DIP and LCC packages, as well as-plastic one-time programmable (OTP) packages. Typically, any byte can be accessed in less than 55 ns, allowing operation with high-performance microprocessors without any WAIT states. The Am27C128 offers separate Output Enable (OE) and Chip Enable (CE) controls, thus eliminating bus contention in a multiple bus microprocessor system. AMD's CMOS process technology provides high speed, low power, and high noise: immunity. Typical power con- sumption is only 100 mW in active mode, and 250 pW in standby mode. All signals are TTL levels, including programming signals. Bit tocations may be programmed singly, in blocks, or at random. The Am27C128 supports AMD's interactive pro- gramming algorithm (1-ms pulses) resulting in typical pro- gramming times of less than two minutes. BLOCK DIAGRAM DATA OUTPUTS O- Veo DQo-0Q7 O GND SE -] ou TPUT ENABLE CHIP ENABLE = AND =e pron sere pH} OUTPUT BUFFERS Pou ] Y = DcoDER -GATING -] po Ag-Ais aporness { -4 -} a PUTS | oJ x : 131972-81T -| DECODER : CELL MATRIX : - = BD008360. PRODUCT SELECTOR GUIDE 3-18 Flashrite is a. trademark of Advanced Micro Devices Inc. Family Part No. Am27C128 Ordering Part No: 45% Voc Tolerance -55 -75 -95 -125 ~155 ~205 ~255 ~305 410% Voc Tolerance - - 70 -+90 -120 -150 -200 -250 -300 Max. Access Time- (ns) 55 70 90 120 150 200 250 300 CE (E) Access (ns) 55 70 90 120 150 200 250 300 OE (G) Access (ns) 35 40 40 50 65 75 100 120 Publication # Rey. Amendment 11420 A Issue Date: January 1989 10ADV MICRO MEMORY LHE D ; 02575246 OO0e?3b3 iff CONNECTION DIAGRAMS Top View DIP Lcc* L- op (1 28 [} Voc Ae ([} 2 27 [] BGM a, (C3 26] Ay A C44 2st} A & 4; (Js 24f J A - As A (6 23 [TJ Ay A All? 2D ee AEs at [Aw " aC] 2 [7] cee . Ao FJ 10 19 [7] 00, ne oo, ([} 11 18 [-] 00, oa oa, ((] 12 17 F"] 00, oa, (7413 16 [7] 00, GND (_} 14 15 {J 00, CD011610 CD011820 Notes: 1. JEDEG nomenclature is in parentheses * Also available in 32-pin rectangular plastic 2. Don't use (DU) for PLCC. leaded chip carrier. LOGIC SYMBOL 14 Ag-Aig 8 DQ9-DQ7 >| CE) LS003360 PIN DESCRIPTION Ao -A43 = Address Inputs cE ) = Chip Enable Input DQ - DQ7 = Data inputs/Outputs OE (G) = Output Enable Input PGM (P) = Program Enable Input Voc = Vcc Supply Voltage Vep = Program Supply Voltage. GND = Ground NG. = No Internal. Connection DU = No External Connection Am27C128 3-19ADV MICRO MEMORY LYE of 02S5?S24 OO0e?73b4 afj , T-46-13-29 ORDERING INFORMATION Standard Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of: a. Device Number b. Speed Option c. Package Type d. Temperature Range e. Optional) Processing DB Cc 55 B |, OPTIONAL PROCESSING Slank = Standard processing B= Bum-in d. TEMPERATURE RANGE C= Commercial (0 to + 70C) |= Industral (-40 to +85C) E = Extended Commercial (-55 to + 125C) . PACKAGE TYPE D = 28-Pin Ceramic DIP (CDV028) : L =92-Pin Rectangular Ceramic Leadtess Chip Carrier (CLV032) b. SPEED OPTION a. DEVICE NUMBER/DESCRIPTION Am27C128 16K x 8-Bit CMOS UV EPROM Valid Combinations AM27G128-55 AM27C128-70. AM27C128-75 AM27C128-95 AM27C128-125 AM27C126-155 AM27C128-205 AM27C 128-255 AM27C128-305 Dc, DCB, LC, LCB oc, OCB, Di, DIB, LO, LCB, Li, LIB AM27G128-90 AM27G128-120 AM27C128-150 DC, DCB, DI, DIB, DE, DEB, LC, LCB, AM27C126-200 Li, LIB, LE, LEB AM27G128-250 AM27G128-300 See Product Selector Guide and Valid Combinations Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations, to check on newly released valid combinations, and to obtain additional data on AMD's standard military grade products. 3-20 Am27C128a eee ADV MICRO MEMORY ue o ff o2s7sea ooazaes s &f T-46-13-29 ORDERING INFORMATION (Cont'd.) OTP Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of: a. Device Number b. Speed Option c. Package Type d. Temperature Range e. Optional Processing AM27C128 -120 P & |, OPTIONAL PROCESSING Blank = Standard processing d. TEMPERATURE RANGE C= Commercial (0 to + 70C) c, PACKAGE TYPE P = 28-Pin Plastic DIP (PD 028) J =92-Pin Rectangular Plastic Leaded Chip Carrier (PL 032) b. SPEED OPTION See Product Selector Guide and Valid Combinations a. DEVICE NUMBER/DESCRIPTION Am270128 16K x 8-Bit CMOS OTP EPROM Vaild Combinations Valid Combinations AM27C128-120 Valid Combinations list configurations planned to be AM270128-125 supported in volume for this device. Consult the focal AMD AM27C128-150 sales office to confirm availability of specific valid AM27C128-155 combinations, to check on newly released valid combinations, and to obtain additional data on AMD's standard military AM27C128-200 JC, PC aayolbeOR | grade products. AM27C128-205 AM27G128-250 AM27C128-255: AM27C128-300 AM27G128-305 Am27C128 3-21 A ECAMTRVAREREI FEA CTIMMRRR ANTERIOR PR EREa ee ADV MICRO MEMORY LHE oj 0257526 O0e?sbb 7 T-46-13-29 MILITARY ORDERING INFORMATION APL Products AMD products for Aerospace and Defense applications are available in several packages and operating ranges. APL (Approved Products List) products are fully compliant with MIL-STD-883C requirements. The order number (Valid Combination) is formed by a Combination of: a. Device Number. b. Speed Option c. Device Class d. Package Type e. Lead Finish AM27C128 =90. /B x A |, LEAD FINISH A= Hot Solder Dip d. PACKAGE TYPE X = 28-Pin Ceramic DIP (CDV028) U'= 32-Pin Rectangular Ceramic Leadiess Chip Carrier (CLV032) c. DEVICE CLASS /B= Class 8 b. SPEED OPTION See Product Selector Guide and Valid Combinations a. DEVICE NUMBER/DESCRIPTION Am27C128 16K x 8-Bit CMOS UV EPROM Valid Combinations Valid Combinations AM27C128-90 Valid Combinations list configurations planned to be AM27C128-120. supported in volume for this device. Consult the local AMD AM27C 128-150 JBXA, [BUA sales office to confirm availability of specific valid AM27C128-200 combinations, or to check for newly released valid AM27C128-250 combinations. AM27C128-300 Group A Tests Group A tests consist of Subgroups 1, 2, 3, 7, 8, 9, 10, 11. 3-22 Am27C128 SRN Le mye eeeRa, ALR RY CSARATIn: AAT Ur ym OE STUER, ORAL ADV MICRO MEMORY LHE D i g25752e4 O02?3b? T-46-13-29 FUNCTIONAL DESCRIPTION Erasing the Am27C128 In order to clear all locations of their programmed contents, it is. necessary to expose the Am27C128 to an ultraviolet light source. A dosage of 15 W seconds/cm* is required to completely erase.an Am27C128. This dosage can be obtained by exposure fo an ultraviolet lamp wavelength of 2537 Angstroms (A) with intensity of 12,000 pW/om? for 15 to 20 minutes. The Am27C128 should be directly under and about one inch from the source and all filters should be removed from the UV light source prior to erasure. {t is important to note that the Am27C128, and similar devices, will erase with light sources having wavelengths shorter than 4000 A. Although erasure times will be much longer than with UV sources at 25378, nevertheless the exposure to fluores- cent light and sunlight will eventually erase the Am27C128 and exposure to them. should be prevented to realize maxi- mum system reliability. If used in such an environment, the package window should be covered by an opaque label or substance. Programming the Am27C128 Upon delivery, or after each erasure, the Am27C128 has all 131,072 bits in the "ONE", or HIGH state. "ZEROs" are loaded into the Am27C128 through the procedure of program- ming. The programming mode is entered when 12.5 10.5 V is applied to the Vpp pin, CE is at Vi_, and PGM is at Vit. For programming, the data to be programmed is applied 8 bits in parallel to the data output pins. The flowchart in Figure 1 shows AMD's interactive algorithm. Interactive algorithm reduces programming time by using short Programming pulses and giving each address only as many pulses as is necessary in order to reliably program the data. After each pulse is applied to a given address, the data in that address is verified. If the data does not verify, additional pulses are given until it verifies or the maximum is reached. This process is repeated while sequencing through each address of the Am27C128. This part of the algorithm is done at Vcc = 6.0 V to assure that each EPROM bitis programmed to a sufficiently high threshold voitage. After the interactive programming is completed, an overprogram pulse is given to each memory location; this ensures that all bits have sufficient margin. After the final address is completed, the entire EPROM memory is verified at Voc =5 V + 5%. Flashrite The OTP EPROM Flashrite programming algorithm (shown in Figure 2) reduces programming time by using initial 100 ys pulses followed by a byte verification to deterniine whether the byte has been successfully programmed. if the data does not verify, an additional pulse is applied for a maximum of 25 pulses. This process is repeated while sequencing, through each address of the OTP EPROM. The Flashrite programming algorithm programs and verifies at Vcc = 6.25 V and Vpp = 12.75 V. After the final address is completed, all bytes are compared to the original data with Voc = Vpp = 5.25 V. Program [nhibit Programming of multiple Am27C128s in parallel with different data is also easily accomplished. Except for CE, all like inputs of the parallel Am27C128 may be common. A TTL low-level program pulse applied to an Am27C128 PGM input with Vpp = 12.5 0.5 V and CE LOW will program that Am27C128. A high-level CE input inhibits the other Am27C128s from being programmed. Program Verify A verify should be performed on the programmed bits to determine that they were correctly programmed. The verify should be performed with OE and CE at Vi_, PGM at Vin, and Vpp between 12.0 V to 13.0 V. Auto Select Mode The auto select mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This. mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding programming algorithm. This mode Is functional in the 25C 5C ambient tempera- ture range that is required when programming the Am27C128. To activate this moda, the programming equipment must force 42.0 + 0.5 V on address line Ag of the Am27C128. Two identifier bytes may then be sequenced from the device outputs by toggling address line Ag from Vit to Vin. All other address lines must be held at Vi_ during auto select mode. Byte 0 (Ag = ViL) represents the manufacturer code, and byte 1 (Ag = Vin), the device identifier code. For the Am27C128, these two identifier bytes are given in the Mode Select table. All identifiers for manufacturer and device codes will possess odd parity, with the MSB (DQ7) defined as the parity bit. Read Mode The Am27C128 has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. Chip Enable (GE) isthe power control and should be used for device selection. Output Enable (OE) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that addresses are stable, address access time (tacc) is equal to the delay from CE to output (tce). Data is available at the outputs tog after the falling edge of OE, assuming that CE has been LOW and addresses have been stable for at least tacc toe. Standby Mode The Am27C128 has a CMOS standby mode which reduces the maximum Vcc current to 100 pA. It is placed in CMOS- standby when CE is at Vcc + 0.3 V, The Am27C128 also has a TTL-standby mode which reduces the maximum Vcc current to 1.0 mA. It is placed in TTL-standby when CE is at Vin. When in standby mode, the outputs are in a high-impedance state, independent of the OE input. Output OR-Tieing To accomodate multiple memory connections, a two-line control function is provided to allow for: 1. Low memory power dissipation, and 2. Assurance that output bus contention will not occur. It is recommended that CE be decoded and used as the primary device-selecting function, while OE be made a com- men connection to all devices in the array and connected to the READ line from the system contro! bus. This assures that all deselected memory devices are in their low-power standby mode and that the output pins are only active when data is desired from a particular memory device. System Applications During the switch between active and standby conditions, transient current peaks are produced on the rising and falling edges of Chip Enable. The magnitude of these transient current peaks is dependent on the output capacitance loading of the device. At a minimum, a 0.1-yF ceramic capacitor (high Am27C128 3-23 ag EOEOEOEeeeeeeEOewweeeeeADV MICRO MEMORY ue o ff oas7s2a ooe73b8 off , T-46-13-29 frequency, low inherent inductance) should be used on each device between Vcc and GND to minimize transient effects. In addition, to overcome the voltage drop caused by the induc- tive effects of the printed circuit board traces on EPROM afrays, a 4.7-yF bulk electrolytic capacitor should be used between Vcc and GND for each eight devices. The location of the capacitor should be close to where the power supply is connected to the array. MODE SELECT TABLE Pins Mode CE OE PGM Ao Ag Vpp Outputs Read Vit Vit xX x x Voc Dout Output Disable ViL VIH x X xX Voc High Z Standby (TTL) Vin x X x x Voc High Z Standby (CMOS) Voc + 0.3 V X Xx Xx Xx Voc High Z Program Vin. x VIL x xX Vpp Din Program Verify VIL Vit Vin xX xX Vep Dout Program Inhibit Vin xX xX x x Vpp High Z Auto Select Manufacturer Vit Vit X Vit Vi Veo O1H {Notes 3 & 4) Device Code Vit VIL xX ViH Vu Voc 16H Notes: 1, X can be either ViL or Vin 2. VH=120VtiO05V 3. Ay -Ag =Ajo-At2 = Vit 4. Aig=X 5. See DC Programming characteristics for Vpp voltage during programming. 3-24 Am27C128ADV MICRO MEMORY L4HE D B 02575246 00273649 f ABSOLUTE MAXIMUM RATINGS OPERATING RANGES Storage Temperature: Commercial (C) Devices OTP Products .......cc:ccecevecseeecetseeeeeers -65 to + 125C Case Temperature (TQ) ........seserescereeeenene 0 to +70C A ae moorature a eaneresecesceeseeeeteeens -65 to +150C Industrial (1) Devices with Power Applied. ........c:sccseceseeter sees -55 to + 125C Case Temperature (TC) s.csrserseessserssrees ~49 to +85C Voltage with Respect to Ground: Extended Commercial (E) Devices All pins except Ag, Vpp, and Case Temperature (TC) ..:.cceeceeeeeeereees -55 to + 125C an oe seteeeeeeeee 0.6 to wor oe y Military (M) Devices 9 PP vreevarerecccneereenerrsereseesntonnes -0. . _ 9, VGC ssesecsectscsssavssucesencsscasecsecseaneeneeeeees -0.6 to 7.0 V Case Temperature (TC) --r-eereserrssesssee 55 to +125C . " . Supply Read Voltage: Stresses above those listed under Apsene Maximum Rat- Vec/Vpp for Am27C128-XX5......6.++ 44.75 to +5.25 V ings" may cause permanent damage to the device. Ilis Is a Voc/Vpp for Am27G128-XX0...........+4.50 to +5.50 V stress rating only; functional operation of the device at these or any other conditions above those indicated in the operation- Operating ranges define those limits between which the al sections of this specification is not implied. Exposure of the functionality of the device is guaranteed. device to absolute maximum rating conditions for extended periods may affect device reliability. Notes: 1. Minimum DC voltage on input or 1/O is -0.5 V. During transitions, the inputs may undershoot GND to -2.0 V for periods of up to 20 ns. Maximum DC voltage on input and I/O is Vec +0.5 V which may overshoot to Voc +2.0 V for periods up to 20 ns. 2. For Ag and Vpp the minimum DC input is -0.5 V. During transitions, Ag and Vpp may undershoot GND to 2.0 V for periods of up to 20 ns. Ag and Vpp must not exceed 13.5 V for any period of time. DC CHARACTERISTICS over operating range unless otherwise specified (Notes 1, 4, 5 & 8) TTL and NMOS inputs Parameter Parameter Symbol Description Test Conditions Min, | = Max. Unit VoH Output HIGH Voltage lon = -400 yA 24 v VoL Output LOW Voltage lol = 2.1 mA 0,45 v Vin Input HIGH Voltage 2.0 Voc +0.5 Vv Vit Input LOW Voitage -0.3 +0.8 Vv C/| Devices 7.0 f Input Load Current VIN =9 V to V u P IN ce E/M Devices 5.0 HA C/| Devices 10 ILo Output Leakage Current Vout =0 V to Voc E/M Devi 10 vA levices CE = Vir i |! Voc Active {=5 MHz, CA Devices 30 mA cot Current (Notes 5 & 9) lout =O mA E/ : (Open Outputs) M Devices 50 Voc Standby Current CE = Vin, C/i Devices 1.0 I ~ mA Cee (Note 9) OE = Vit E/M Devices 1.0 Vpp Supply Current (Read) FE -~DE= = lppt (Notes 6 & 9) & = OE = Vit. Vpp = Veo 100 pA CMOS Inputs Parameter Parameter Symbol Description Test Conditions Min. Max. Unit Vou Output HIGH Voltage foH =-400 vA 2.4 Vv VoL Output LOW Voltage lol = 2.1 mA 0.45 Vv Vin Input HIGH Voltage Voc-0.3 | Voc +0.3 Vv Vie Input LOW Voltage -0.3 +0.8 v C/I Devices 1.0 Tu Input Load Current Vin = 0 V to Voc E/M D 50 BA evices A Am27C128 3-25ADV MICRO MEMORY LYE off 0257524 0027320 af T-46-13-29 DC CHARACTERISTICS over operating range unless otherwise specified (Cont'd.) Parameter Parameter Symbol Description Test Conditions Min. Max. Unit | Output Leakage Current 7 OV to V CA Devices 10 uA eakage Curren = lo Lo Pu g OUT cc E/M Devices 10 CE=Vi, /\ Devi 5 ' Voc Active f=5 MHz, Gi Devices 2 mA ci Current (Notes 5 & 9) lout =O mA /M Devi 25 (Open Outputs) E evices Voc Standby Current ae G/| Devices 100 I CE=Vcoct 0.3 V cee (Nate 9) ce E/M Devices 120 uA Vpp Supply Current (Read) CE RDE- = lppt (Notes 6 & 9) & = OF = Vit, Vpp = Voc 100 BA CAPACITANCE (Notes 2, 3, & 7) Parameter Parameter . Symbol Description Test. Conditions Typ. Max. Unit Cint Address Input Capacitance Vin=0 V 8 12 pF Cine OE Input Capacitance Vin =0 V 12 20 pF Cina CE Input. Capacitance Vin =0 V 9 12 pF Cour Output Capacitance Vout =0 V 8 : 12 pF Notes: 1. Vcc must be applied simultaneously or before Vpp, and removed simultaneously or after Vpp. 2. Typical values are for nominal supply voltages. This parameter is only sampled and not 100% tested. Caution: The Am27C128 must not be removed from, or inserted into, a socket or board when Vpp or Voc is applied. Icct is tested with OE = Vy to simulate open outputs. Maximum active power usage is the sum of Ico and Ipp. Ta = 25C, f= 1 MHz. Minimum DC input voltage Is -0.6 V. During transitions, the inputs may undershoot to -2.0 V for periods less than 20 ns. Maximum DC voltage on output pins is Voc +0.5 V which may overshoot to Vcc +2.0 V for periods less than 20 ns. For Am27C128-305, Ioc; = 50mA, Icce (TTL) = 5mA, Icc2 (CMOS) = 500pnA, and Ippy (Read) = 1mA maximum. PNogae SWITCHING CHARACTERISTICS over operating ranges unless otherwise specified (Notes 1, 3, & 4) Parameter Symbols Am27128 Parameter - -70, -90, -120, | -150, | -200, | -250, | -300, JEDEC Standard Description Test Conditions 55 <75 -95 9125 -155 -205 255 -305 Unit Address to. a Min. t t CE =OE=V, - ns AvaV ACG | Output Delay Max. | 55 | 70 | 90 | 120 | 150 | 200 | 250 | 300 Chip Enable to Min. ; t OE=V ns FLQy cE | Output Delay |max.| 58 | 70 | 90 | 120 | 150 | 200 | 250 | 300 Output Enable to | = Min. E = V ns stav OE | Output Delay tt Max.|-35 | 40 40 50 65 75 [| 100 | 120 Output Enable Min teHOZ: HIGH to Output ij tgHaz 'oF Float ns (Note 2) ; Max. | 25 25 25 35 50 5 60 76 Output Hold . from Addresses, Min. | 0 0 Q Qo 0 0 0 0 faxax toH CE, or se - ns OE, whichever Max occurred first Notes: 1. Voc must be applied simultaneously or before Vpp, and removed simultaneously or after Vpp. 2. This parameter is only sampted and not 100% tested. 3. Caution: The Am27C128 must not be removed from, or inserted into, a socket or board when Vpp or Vcc is applied. 4, For the ~55, -70, ~75: Output Load: 1 TTL gate and Cy = 30 pF, Input Rise. and Fall Times: 20 ns, input Pulse Levels: 0 to 3 V, Timing Measurement Reference Level -1.5 V inputs and outputs. For all other Versions: ; Output Load: 1 TTL gate and C;, = 100 pF, Input Rise and Fall Times: 20 ns, Input Pulse Levels: 0.45 to 2.4 V, Timing Measurement Reference Level: 0.8 V and 2 V for inputs and outputs. 3-26 Am27C128ga oe , ~ ADV MICRO MEMORY LYE off 0257526 OOe73?) O i T-46-13-29 SWITCHING TEST CIRCUIT , DEVICE 2.7 kQ UNDER +5 V TEST s= oO DIODES = IN3084 OR EQUIVALENT FC003193 Cy = 100 pF including jig capacitance (30 pF for -55, ~70, and -75) SWITCHING TEST WAVEFORMS PAV oT 20V 3v y > Test poms TEST POINTS > 08 : 045 OB INPUT OUTPUT ov INPUT OUTPUT THQ0-001A 11420-0024, WF026820 AC Testing: Inputs are driven at 2.4 V for a WF026830 logic "'1'' and 0.45 V for a logic AC Testing: Inputs are driven at 3.0 V for a "OQ", Input pulse rise and. fall logic ''1" and 0 V for a logic "0". Input pulse rise and fall times are <20 ns for -55, -70, and -75 devices. times are <20 ns. Am27C128 3-27OMSK SRNR Ret aif, TN CAC I, KIRS ADV MICRO MEMORY auc o ff oaszsea cnez372 2 T-46-13-29 SWITCHING WAVEFORMS KEY TO SWITCHING WAVEFORMS WAVEFORM INPUTS OUTPUTS MUST BE WILL BE STEADY STEADY WILL BE MAY CHANGE CHANGING FROMHTOL HANGING MAY CHANGE Ganaing FAOML TOH FROML TOH eS. ANY CH, iE STATE PERMITTED UNKNOWN: CENTER DOES NOT LINE IS HiGH APPLY IMPE: OFF STATE KS000010 24 - 20 ADDRESSES 20 AOORESSES DRESS K 08 68 0.45 _- _ _______] og __ (NOTE 1) tace . (NOTE 1) on output Wz : L ( | ) Y | 7 VALIO Hi-Z X \ \ \ \ \ \ ouTPUT WF001324 Notes: 1. OE may be delayed up to tacc-tog after the falling edge of CE without impact on tacc. 2. tor is specified from OF or CE, whichever occurs first. 3-28 Am27C128ADV MICRO MEMORY LYE of 0257526 O0e?3?3 uf T-46-13-29 PROGRAMMING FLOW CHARTS START ADDRESS = FIRST LOCATION Vog = 60 V Vpp = 125 V INTERACTIVE SECTION PASS LAST ADDRESS? YES ADDRESS = FINST LOCATION VERY BYTE INGREMENT ADDRESS FAL OVERPROGARAM SECTION PROGRAM ONE 2 ms PULSE INCREMENT ADORESS LAST ADORESS? YES Voc = 50 45% VERIFY SECTION DEVICE FAILED VERIFY ALL BYTES ? PASS DEVICE PASSED PF002840 Figure 1. Interactive Programming Flow Chart Am27C128 3-29ADV MICRO MEMORY LYE of 0257524 O02?3?4 &b i T~46~13.29 START ADDRESS = FIRST LOCATION Voc = 625 V Vpp = 1275 V INTERACTIVE SECTION INCREMENT ADDRESS LAST ADDRESS? YES Voc = Vpp = 5.25 V VERIFY SECTION VERIFY ALL BYTES DEVICE FAILEO ? PASS DEVICE PASSED 102058-008A PF002480 Figure 2. Flashrite Programming Flow Chart for OTP EPROM 3-30 Am27C128ADV MICRO MEMORY LYE D a O297Se& 002?7397S 6 i T-46-13-29 DC PROGRAMMING CHARACTERISTICS (Ta =+25C 5C) (Notes 1, 2, & 3). Parameter Parameter Symbol ; Description Test Conditions Min. Max. Unit Iu Input Current (All Inputs) Vin = Vit or VI 10.0 LA ViL Input LOW Level (All Inputs) -0.3 0.8 Vv ViH Input HIGH Level 2.0 Veco + 0.5 Vv VoL Output LOW Voltage During Verify lot = 2.1 mA 0.45 Vv Vou Output HIGH Voltage During Verify lon =~400 pA 2.4 v VH Ag Auto Select Voltage 14.5 12.5 v lecs Vcc Supply Current (Program & Verify) 50 mA Ippo Vpp Supply Current (Program) CE =Vit. OE = VIH 30 mA Vec1 Interactive: Supply Voltage 5.75 6.25 Vv Vpp1 Interactive Programming Voltage 12.0 13.0 v Voce Flashrite Supply Voltage ; 6.00 6.50 Vv Vppe Flashrite Programming Voltage 12.6 13.0 v SWITCHING PROGRAMMING CHARACTERISTICS (Ta = +25C 45C) (Notes 1, 2, & 3). Parameter Symbols Parameter JEDEC Standard Description Min. Max. Unit tAVEL tas Address Setup Tire 2 ys tozeL toes OE Setup Time 2 us tELPL tcES CE Setup Time 2 ps toveL tos Data Setup Time 2 us tGHAX taH Address Hold Time 0 us teHDx tox Data Hold Time 2 us taHaz tpFp Qutput Enable to: Output Float Delay 0 130 ns typs tvps Vpp Setup Time 2 us tELEHt tpw PGM Program Pulse Width Mashiite 2 108 us . interactive 0.95 1.05 BS teLeHe topw PGM Overprogram Pulse Width (Interactive) 1.95 2.05 ms tycs tycs Voc Setup Time 2 : us teLav toe Data Valid from OE 150 ns Notes: 1. Vcc must be applied simultaneously or before Vpp, and removed simultaneously or after Vpp. 2. When programming the Am27C128, a 0.1-pF capacitor is required across Vpp and ground to suppress spurious voltage transients which may damage the device, . 3. Programming characteristics are sampled but not 100% tested at worst-case conditions. Am27C128 3-31 i j iADV MICRO MEMORY nue o Mf oaszs2a ooezaze t T-46-13-29 PROGRAMMING ALGORITHM WAVEFORMS (Notes 1 & 2) PAOGAAM nw PROGRAM VERIFY AODAESSES Vag DATA OATA IN STABLE DATA OUT VALID Yee al WF000555 Notes: 1. The input timing reference level is 0.8 V for Vi_ and 2 V for VIH- 2. toe and torp are characteristics of the device, but must be accommodated by the programmer. 3-32 Am27C128 5! RC RTS RSS NATAL A 6.2084 see ach http te iT 8 one