Order Now Product Folder Support & Community Tools & Software Technical Documents CSD25484F4 SLPS551A - MAY 2015 - REVISED AUGUST 2017 CSD25484F4 -20-V P-Channel FemtoFETTM MOSFET 1 Features * * * * 1 * * * * Product Summary Low On-Resistance Ultra-Low Qg and Qgd Low-Threshold Voltage Ultra-Small Footprint (0402 Case Size) - 1.0 mm x 0.6 mm Ultra-Low Profile - 0.2-mm Height Integrated ESD Protection Diode - Rated > 4-kV HBM - Rated > 2-kV CDM Lead and Halogen Free RoHS Compliant TA = 25C * * UNIT Drain-to-Source Voltage -20 V Qg Gate Charge Total (-4.5 V) 1090 pC Qgd Gate Charge Gate-to-Drain RDS(on) Drain-to-Source On-Resistance VGS(th) Threshold Voltage 150 pC VGS = -1.8 V 405 VGS = -2.5 V 150 VGS = -4.5 V 93 VGS = -8.0 V 80 -0.95 m V Device Information(1) 2 Applications * * TYPICAL VALUE VDS Optimized for Load Switch Applications Optimized for General Purpose Switching Applications Battery Applications Handheld and Mobile Applications 3 Description This 80-m, -20-V, P-Channel FemtoFETTM MOSFET is designed and optimized to minimize the footprint in many handheld and mobile applications. This technology is capable of replacing standard small signal MOSFETs while providing at least a 60% reduction in footprint size. DEVICE QTY CSD25484F4 3000 CSD25484F4T 250 MEDIA PACKAGE SHIP 7-Inch Reel Femto (0402) 1.00-mm x 0.60-mm Land Grid Array (LGA) Tape and Reel (1) For all available packages, see the orderable addendum at the end of the data sheet. Absolute Maximum Ratings TA = 25C VALUE UNIT VDS Drain-to-Source Voltage -20 V VGS Gate-to-Source Voltage -12 V ID Continuous Drain Current(1) -2.5 A IDM Pulsed Drain Current(1)(2) -22 A Continuous Gate Clamp Current -35 Pulsed Gate Clamp Current(2) -350 Power Dissipation(1) 500 IG PD V(ESD) TJ, Tstg Human-Body Model (HBM) 4 Charged-Device Model (CDM) 2 Operating Junction, Storage Temperature -55 to 150 mA mW kV C (1) Typical RJA = 85C/W on 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu pad on a 0.06-in (1.52-mm) thick FR4 PCB. (2) Pulse duration 100 s, duty cycle 1%. Typical Part Dimensions Top View D 60 0. 1. 0 0 m m m 0m 0.2 G S m m 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD25484F4 SLPS551A - MAY 2015 - REVISED AUGUST 2017 www.ti.com Table of Contents 1 2 3 4 5 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Specifications......................................................... 1 1 1 2 3 5.1 Electrical Characteristics........................................... 3 5.2 Thermal Information .................................................. 3 5.3 Typical MOSFET Characteristics.............................. 4 6 Device and Documentation Support.................... 7 6.1 6.2 6.3 6.4 6.5 7 Receiving Notification of Documentation Updates.... Community Resources.............................................. Trademarks ............................................................... Electrostatic Discharge Caution ................................ Glossary .................................................................... 7 7 7 7 7 Mechanical, Packaging, and Orderable Information ............................................................. 8 7.1 Mechanical Dimensions ............................................ 8 7.2 Recommended Minimum PCB Layout...................... 9 7.3 Recommended Stencil Pattern ................................. 9 4 Revision History Changes from Original (May 2015) to Revision A Page * Added the Receiving Notification of Documentation Updates and the Community Resources sections to Device and Documentation Support .......................................................................................................................................................... 7 * Updated the Recommended Minimum PCB Layout and the Recommended Stencil Pattern sections ................................. 8 2 Submit Documentation Feedback Copyright (c) 2015-2017, Texas Instruments Incorporated Product Folder Links: CSD25484F4 CSD25484F4 www.ti.com SLPS551A - MAY 2015 - REVISED AUGUST 2017 5 Specifications 5.1 Electrical Characteristics TA = 25C (unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC CHARACTERISTICS BVDSS Drain-to-source voltage VGS = 0 V, IDS = -250 A IDSS Drain-to-source leakage current VGS = 0 V, VDS = -16 V -100 nA IGSS Gate-to-source leakage current VDS = 0 V, VGS = -12 V -50 nA VGS(th) Gate-to-source threshold voltage VDS = VGS, IDS = -250 A V RDS(on) Drain-to-source on-resistance gfs Transconductance -20 -0.7 V -0.95 -1.2 VGS = -1.8 V, IDS = -0.1 A 405 825 VGS = -2.5 V, IDS = -0.5 A 150 180 VGS = -4.5 V, IDS = -0.5 A 93 109 VGS = -8 V, IDS = -0.5 A 80 94 VDS = -10 V, IDS = -0.5 A 3.5 m S DYNAMIC CHARACTERISTICS Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance RG Series gate resistance Qg Gate charge total (-4.5 V) Qgd Gate charge gate-to-drain Qgs Gate charge gate-to-source Qg(th) Gate charge at Vth Qoss Output charge td(on) Turnon delay time tr Rise time td(off) Turnoff delay time tf Fall Time 175 230 pF 78 102 pF 5.5 7.2 pF 1415 pC VGS = 0 V, VDS = -10 V, = 1 MHz 20 1090 VDS = -10 V, IDS = -0.5 A VDS = -10 V, VGS = 0 V 150 pC 350 pC 210 pC 1290 pC 9.5 ns 5 ns 18 ns 8.5 ns VDS = -10 V, VGS = -4.5 V, IDS = -0.5 A, RG = 10 DIODE CHARACTERISTICS VSD Diode forward voltage Qrr Reverse recovery charge trr Reverse recovery time ISD = -0.5 A, VGS = 0 V VDS= -10 V, IF = -0.5 A, di/dt = 100 A/s -0.75 V 970 pC 7.5 ns 5.2 Thermal Information TA = 25C (unless otherwise stated) THERMAL METRIC RJA (1) (2) TYPICAL VALUES Junction-to-ambient thermal resistance (1) 85 Junction-to-ambient thermal resistance (2) 245 UNIT C/W Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu. Device mounted on FR4 material with minimum Cu mounting area. Submit Documentation Feedback Copyright (c) 2015-2017, Texas Instruments Incorporated Product Folder Links: CSD25484F4 3 CSD25484F4 SLPS551A - MAY 2015 - REVISED AUGUST 2017 www.ti.com 5.3 Typical MOSFET Characteristics TA = 25C (unless otherwise stated) 10 10 9 9 -IDS - Drain-To-Source Current (A) -IDS - Drain-to-Source Current (A) Figure 1. Transient Thermal Impedance 8 7 6 VGS = -1.8 V VGS = -2.5 V VGS = -4.5 V VGS = -8 V 5 4 3 2 1 0 TC = 125 C TC = 25 C TC = -55 C 8 7 6 5 4 3 2 1 0 0 0.5 1 1.5 2 2.5 3 3.5 4 -VDS - Drain-to-Source Voltage (V) 4.5 5 0 0.5 D002 1 1.5 2 2.5 3 -VGS - Gate-To-Source Voltage (V) 3.5 4 D003 VDS = -5V Figure 2. Saturation Characteristics 4 Submit Documentation Feedback Figure 3. Transfer Characteristics Copyright (c) 2015-2017, Texas Instruments Incorporated Product Folder Links: CSD25484F4 CSD25484F4 www.ti.com SLPS551A - MAY 2015 - REVISED AUGUST 2017 Typical MOSFET Characteristics (continued) TA = 25C (unless otherwise stated) 5000 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 7 1000 6 C - Capacitance (pF) -VGS - Gate-to-Source Voltage (V) 8 5 4 3 2 100 10 1 1 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 Qg - Gate Charge (nC) ID = -0.5 A 1.6 1.8 0 2 2 4 D004 20 D005 Figure 5. Capacitance 250 RDS(on) - On-State Resistance (m:) 1.25 -VGS(th) - Threshold Voltage (V) 18 VDS = -10 V Figure 4. Gate Charge 1.15 1.05 0.95 0.85 0.75 0.65 0.55 -75 6 8 10 12 14 16 -VDS - Drain-to-Source Voltage (V) TC = 25 C, I D = -0.5 A TC = 125 C, I D = -0.5 A 225 200 175 150 125 100 75 50 25 0 -50 -25 0 25 50 75 100 TC - Case Temperature (qC) 125 150 0 175 2 D006 4 6 8 10 -VGS - Gate-To-Source Voltage (V) 12 D007 ID = -250 A Figure 6. Threshold Voltage vs Temperature Figure 7. On-State Resistance vs Gate-to-Source Voltage 10 1.3 VGS = -2.5 V VGS = -8.0 V -ISD - Source-To-Drain Current (A) Normalized On-State Resistance 1.4 1.2 1.1 1 0.9 0.8 0.7 -75 TC = 25qC TC = 125qC 1 0.1 0.01 0.001 0.0001 -50 -25 0 25 50 75 100 TC - Case Temperature (qC) 125 150 175 0 0.2 0.4 0.6 0.8 -VSD - Source-To-Drain Voltage (V) D008 1 D009 ID = -0.5 A Figure 8. Normalized On-State Resistance vs Temperature Figure 9. Typical Diode Forward Voltage Submit Documentation Feedback Copyright (c) 2015-2017, Texas Instruments Incorporated Product Folder Links: CSD25484F4 5 CSD25484F4 SLPS551A - MAY 2015 - REVISED AUGUST 2017 www.ti.com Typical MOSFET Characteristics (continued) TA = 25C (unless otherwise stated) 3 -IDS - Drain-to-Source Current (A) -IDS - Drain-To-Source Current (A) 100 10 1 0.1 100 ms 10 ms 0.01 0.01 1 ms 100 s 10 s 0.1 1 10 -VDS - Drain-To-Source Voltage (V) 50 2.5 2 1.5 1 0.5 0 -50 -25 D010 0 25 50 75 100 125 TC - Case Temperature (qC) 150 175 D011 Single pulse, typical RJA = 85C/W Figure 10. Maximum Safe Operating Area 6 Figure 11. Maximum Drain Current vs Temperature Submit Documentation Feedback Copyright (c) 2015-2017, Texas Instruments Incorporated Product Folder Links: CSD25484F4 CSD25484F4 www.ti.com SLPS551A - MAY 2015 - REVISED AUGUST 2017 6 Device and Documentation Support 6.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 6.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2ETM Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 6.3 Trademarks FemtoFET, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 6.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 6.5 Glossary SLYZ022 -- TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Submit Documentation Feedback Copyright (c) 2015-2017, Texas Instruments Incorporated Product Folder Links: CSD25484F4 7 CSD25484F4 SLPS551A - MAY 2015 - REVISED AUGUST 2017 www.ti.com 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 7.1 Mechanical Dimensions (1) All linear dimensions are in millimeters (dimensions and tolerancing per AME T14.5M-1994). (2) This drawing is subject to change without notice. (3) This package is a PB-free solder land design. Table 1. Pin Configuration 8 POSITION DESIGNATION Pin 1 Gate Pin 2 Source Pin 3 Drain Submit Documentation Feedback Copyright (c) 2015-2017, Texas Instruments Incorporated Product Folder Links: CSD25484F4 CSD25484F4 www.ti.com SLPS551A - MAY 2015 - REVISED AUGUST 2017 7.2 Recommended Minimum PCB Layout (0.25) 2X (0.25) PKG 0.05 MIN ALL AROUND 2X (0.15) 1 3 SYMM (0.35) (0.5) 2 (R0.05) TYP SOLDER MASK OPENING (0.65) LAND PATTERN EXAMPLE (1) METAL UNDER SOLDER MASK SOLDER MASK DEFINED All dimensions are in millimeters. 7.3 Recommended Stencil Pattern 2X (0.25) 2X (0.2) PKG (0.25) 1 SYMM (0.4) (0.5) 3 2 2X (0.15) (R0.05) TYP (0.65) 2X SOLDER MASK EDGE (1) All dimensions are in millimeters. SOLDER PASTE EXAMPLE Submit Documentation Feedback Copyright (c) 2015-2017, Texas Instruments Incorporated Product Folder Links: CSD25484F4 9 PACKAGE OPTION ADDENDUM www.ti.com 3-Aug-2017 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) CSD25484F4 ACTIVE PICOSTAR YJJ 3 3000 Green (RoHS & no Sb/Br) Call TI Level-1-260C-UNLIM -55 to 150 G3 CSD25484F4T ACTIVE PICOSTAR YJJ 3 250 Green (RoHS & no Sb/Br) Call TI Level-1-260C-UNLIM -55 to 150 G3 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. 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Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 3-Aug-2017 Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 4-Aug-2017 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) CSD25484F4 PICOST AR YJJ 3 3000 178.0 9.2 CSD25484F4T PICOST AR YJJ 3 250 178.0 9.2 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 0.7 1.1 0.28 4.0 8.0 Q2 0.7 1.1 0.28 4.0 8.0 Q2 PACKAGE MATERIALS INFORMATION www.ti.com 4-Aug-2017 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CSD25484F4 PICOSTAR YJJ 3 3000 220.0 220.0 35.0 CSD25484F4T PICOSTAR YJJ 3 250 220.0 220.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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