THCX423R10_Rev.1.01_E THCX423R10 High Performance Bi-directional Active Switch with Equalizer General Description Features The THCX423R10 is a high performance bidirectional active switch for USB3.1 Gen1 and high speed interface like V-by-One(R) HS. The THCX423R10 features a continuous time linear equalizer (CTLE) to provide a boost up to +11.6dB at 5 GHz. It opens an input eye even though it is completely closed due to inter-symbol interference (ISI) induced by the inter-connect mediums. The transmitter features a programmable output deemphasis driver with up to -8.5 dB and allows adjustable amplitude voltage from 600mVp-p to 1300mVp-p to suit multiple application scenarios. MUX and DEMUX Receive Equalization up to +11.6dB@5GHz Transmit De-Emphasis up to -8.5dB Transmit VOD Control : 600 to 1300 mVp-p Support USB 3.1 Gen1 and USB Type-CTM - Integrated CC Logic - Receiver and LFPS Detect Available in single supply voltage 3.3V with integrated LDO ESD: HBM 4kV QFN40 (5.0mm x 5.0mm) Applications Flip-ability USB Type-CTM USB Host and Devices V-by-One(R) HS CML Interface Block Diagram CC1 CC Logic CC2 SSINP OUTP2 EQ BUF SSINN OUTN2 Switch Signal Detect RX Detect Port2 USB Controller (Host, Device) BUF OUTN1 RX Detect Port1 Channel A INP2 Type-C Receptacle OUTP1 EQ EQ INN2 BUF SSOUTN Switch SSOUTP Signal Detect Port2 INP1 RX Detect EQ INN1 Channel B Copyright(c)2018 THine Electronics, Inc. Port1 1/22 Signal Detect THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E DIR_IN VCONN_CTRL2 VCONN_CTRL1 VBUS_CTRL 28 27 26 25 24 23 PD DIR_OUT 29 SIGDETENN CC1 30 VCC33 CC2 Pin Configuration 22 21 TEST0 31 20 OUTP2 SSINP 32 19 OUTN2 SSINN 33 18 OUTN1 VCC25 34 17 OUTP1 GND 35 16 VCC25 SSOUTP 36 15 INP2 SSOUTN 37 14 INN2 NC 38 13 INN1 OUTAMPB 39 12 INP1 DEEMB 40 11 GND DEEMA RESETN VREG15 SDA / CURRENT_MODE1 Copyright(c)2018 THine Electronics, Inc. 6 7 8 9 10 IDSEL0 / EQA 5 IDSEL1 / EQB 4 ENI2C 3 VCC25 2 SCL / CURRENT_MODE0 1 OUTAMPA (TOP View) 41 Exposed GND 2/22 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E Pin Description Pin Name Pin No Type SSINP 32 CI SSINN 33 CI SSOUTP 36 CO SSOUTN 37 CO OUTP1 17 CO OUTN1 18 CO OUTP2 20 CO OUTN2 19 CO INP1 12 CI INN1 13 CI INP2 15 CI INN2 14 CI PD 21 I SIGDETENN 22 I TEST0 31 I RESETN 3 I CC1 CC2 29 30 LCI LCI DIR_IN 27 I DIR_OUT 28 O VCONN_CTRL1 25 O VCONN_CTRL2 26 O VBUS_CTRL 24 O Copyright(c)2018 THine Electronics, Inc. Description Super-Speed CML Channel A (CHA) Signal Input (USB controller side) Super-Speed CML Channel A (CHA) Signal Input (USB controller side) Super-Speed CML Channel B (CHB) Signal Output (USB controller side) Super-Speed CML Channel B (CHB) Signal Output (USB controller side) Super-Speed CML Port 1 of CHA Signal Output (Type-C Receptacle side) Super-Speed CML Port 1 of CHA Signal Output (Type-C Receptacle side) Super-Speed CML Port 2 of CHA Signal Output (Type-C Receptacle side) Super-Speed CML Port 2 of CHA Signal Output (Type-C Receptacle side) Super-Speed CML Port 1 of CHB Signal Input (Type-C Receptacle side) Super-Speed CML Port 1 of CHB Signal Input (Type-C Receptacle side) Super-Speed CML Port 2 of CHB Signal Input (Type-C Receptacle side) Super-Speed CML Port 2 of CHB Signal Input (Type-C Receptacle side) Power Down 0: Operation 1: Chip Power Down Signal Detect Enable 0: Enable 1: Disable Test pin. Must be tied to ground for normal operation. Reset 0:Chip Reset 1:Operation Type-C configuration channel signal 1 Type-C configuration channel signal 2 Port select input 0:Port1 1:Port2 Determination result by CC Logic L:Port1 H:Port2 VCONN port control signal 1 L:Not apply VCONN H:Apply VCONN VCONN port control signal 2 L:Not apply VCONN H:Apply VCONN VBUS port control signal L:Not apply VBUS H:Apply VBUS 3/22 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E ENI2C 8 I SDA/ CURRENT_MOD E1 5 BO SCL/ CURRENT_MOD E0 6 BO IDSEL0/EQA 10 3LI DEEMA 2 3LI OUTAMPA 1 3LI IDSEL1/EQB 9 3LI DEEMB 40 3LI OUTAMPB 39 3LI VREG15 4 PWR VCC25 VCC33 7,16,34 23 PWR PWR GND 11,35, 41 GND 2-wire serial I/F enable 0:2-wire serial I/F access disable 1:2-wire serial I/F access enable SDA/CURRENT_MODE1 pin has dual function. SDA: SDA input /output for 2-wire serial I/F when ENI2C=1 CURRENT_MODE1: Type-C current advertisement setting when ENI2C=0 SCL/CURRENT_MODE0 pin has dual function. SCL: SCL input for 2-wire serial I/F when ENI2C=1 CURRENT_MODE0: Type-C current advertisement setting when ENI2C=0 IDSEL0/EQA pin has dual function. IDSEL0: 2-wire serial I/F device address setting when ENI2C=1. EQA: Controller Side Rx equalizer setting for CHA when ENI2C=0. Low:2.0dB / Float:4.0dB / High:8.0dB Receptacle Side Tx de-emphasis setting for CHA Low:3.5dB / Float:6.0dB / High:8.5dB Receptacle Side Tx output swing setting for CHA Low:600mV / Float:1000mV / High:1300mV IDSEL1/EQB pin has dual function. IDSEL1: 2-wire serial I/F device address setting when ENI2C=1. EQB: Receptacle side Rx equalizer setting for CHB when ENI2C=0. Low:2.0dB / Float:4.0dB / High:8.0dB Controller side Tx de-emphasis control for CHB Low:3.5dB / Float:6.0dB / High:8.5dB Controller side Tx output swing control for CHB Low:600mV / Float:1000mV / High:1300mV Decoupling capacitor pin for on-chip regulator. See Figure 1. Decoupling Capacitor Pin, 2.5V output. See Figure 1. Power supply pin for on-chip regulator. See Figure 1. Ground. Must be tied to the PCB ground plane through an array of vias. Pin#41 is exposed pad ground. Non-connection pin. Must be open. NC 38 NC CI: CML Input buffer, CO: CML Output buffer I: LVCMOS Input buffer, O: LVCMOS Output buffer, BO: Open-Drain LVCMOS Bi-directional LCI: Level Control LVCMOS Input buffer, 3LI: 3-Level LVCMOS Input buffer, PWR: Power supply, GND: Ground, NC: Non-connection pin Copyright(c)2018 THine Electronics, Inc. 4/22 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E Functional Overview The THCX423R10 has functions as below. MUX and DEMUX Signal Conditioning (Rx Equalizer , Tx de-emphasis, Tx output swing level ) VBUS,VCONN port control function for USB Type-CTM 2-wire serial I/F Single Supply Voltage (3.3V) Operation Mode Settings Table1 shows the operation mode setting. Table 1. Operation Mode Setting Pin Settings RESETN 0 PD 0 1 1 Ignore ENI2C Ignore 0 1 Ignore Operation Mode Chip Reset. Power Down except on-chip Regulator Normal Operation. Signal Conditioning Settings by External Pin Normal Operation. Signal Conditioning Settings by 2-wire serial I/F Access Chip Power Down. On-chip Regulator Settings The THCX423R10 integrates the On-chip regulator for internal 2.5V and 1.5V circuit which is able to operate under the single supply voltage. On-chip regulator is turned on/off by the PD pin. Bypass VCC33 to GND with 10uF and 1uF to reduce high frequency noise. Bypass each VCC25 to GND with 0.1uF and 1uF, VREG15 to GND with 0.1uF and 1uF make stabilized and remove high frequency noise. PD VBUS 5V 3.3V VCC33 10uF 1uF 1uF 1uF 0.1uF 0.1uF 0.1uF Internal LDO 5V 5V 2.5V VCC25 (Pin34) VCONN_CTRL1 VCC25 (Pin16) VCONN_CTRL2 VCC25 (Pin7) CC1 Internal LDO VREG15 1uF VBUS_CTRL CC2 1.5V 0.1uF Figure 1. Connection of VCC33, VCC25, VREG15 and Decoupling Capacitor Copyright(c)2018 THine Electronics, Inc. 5/22 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E Rx Equalization Setting THCX423R10 receiver have controls for receiver equalization. The receiver equalization gain value can be controlled either through 2-wire serial interface registers or through pins. Table 2. Rx Equalization Setting Pins EQx - 0 F 1 - Registers CHx_PORT1_EQ_SET CHx_PORT2_EQ_SET 7 6 5 4 3 2 1 0 0 0 * * 0 0 * * 0 1 0 * 0 1 0 * 0 1 1 0 0 1 1 0 0 1 1 1 0 1 1 1 1 0 0 0 1 0 0 0 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 1 1 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 1 1 0 1 1 1 1 * 1 1 1 * @2.5GHz [dB] 0 0 0 0 0 0 0 1.3 1.5 5.1 8.6 @5GHz [dB] 0.05 0.1 0.2 0.3 0.9 1.5 2.0 3.8 4.0 8.0 11.6 x=A,B Tx Equalization Setting THCX423R10 transmitter have controls for de-emphasis function. The de-emphasis gain value can be controlled either through 2-wire serial registers or through pins. De-emphasis function works under less 5ns width pulse. Table 3. De-Emphasis Setting (CHA) Pins DEEMA 0 F 1 Registers CHA_PORT1_DEEM_SET CHA_PORT2_DEEM_SET 5 4 3 2 1 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 1 0 1 1 1 1 1 1 1 1 Value [dB] 0 3.5 6.0 8.5 Table 4. De-Emphasis Setting (CHB) Pins DEEMB 0 F 1 Copyright(c)2018 THine Electronics, Inc. 2 0 0 0 1 Registers CHB_DEEM_SET 1 0 0 1 1 6/22 0 0 1 1 1 Value [dB] 0 3.5 6.0 8.5 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E Tx Output Swing Setting THCX423R10 transmitter have controls for output swing amplitude. The output swing amplitude can be controlled either through 2-wire serial interface registers or through pins. Table 5. Output Swing Setting (CHA) Pins DEEMA 0 F 1 Registers CHA_PORT1_VOD_SET CHA_PORT2_VOD_SET 5 4 3 2 1 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 1 0 1 1 1 1 1 1 1 1 Value [mVpp] 600 1000 1300 Table 6. Output Swing Setting (CHB) Pins DEEMB 5 0 0 0 1 0 F 1 Registers CHB_VOD_SET 4 0 0 1 1 3 0 1 1 1 Value [mVpp] 600 1000 1300 Rx Detect THCX423R10 has Receiver Detect functionality for USB3.x transmission. Receiver Detect functionality must be disable when it is not USB3.x application. The way to force Receiver Detect functionality output by resistor is below. When CHA_RXDET_CTRL_EN and CHB_RXDET_CTRL_EN is 1, Receiver Detect functionality output is forced. Table 7. Rx Detect Settings Registers Address CHA_RXDET_CTRL_EN CHA_PORT1_RXDET CHA_PORT2_RXDET CHB_RXDET_CTRL_EN CHB_RXDET 0x09[0] 0x0A[1] 0x0A[0] 0x0D[0] 0x0E[0] Enable (Default) 0 Don't Care Don't Care 0 Don't Care Disable 1 1 1 1 1 Signal Detect THCX423R10 has Signal Detect functionality. If this function is enable, the power consumption is low when signal does not input to THCX423R10. Copyright(c)2018 THine Electronics, Inc. 7/22 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E CC Logic THCX423R10 has function for Configuration Chanel (CC) of USB Type-CTM as below. Attach / Detach Detection Plug Orientation / Cable Twist Detection Configure VCONN The following table shows how to control CC logic with ENI2C. Table 8. 2-Wire Signal Interface Control Settings Register OVERRIDE_CC OVERRIDE_LANE_PD Ignore Ignore 0 0 0 1 1 0 1 1 ENI2C 0 1 *1 *2 *3 *4 Control VCONN_CTRL1/2, Port position VBUS_CTRL,DIR_OUT Pin Control (*1) Pin Control (*2) Pin Control (*2) Pin Control (*1) Pin Control (*1) Register Control (*4) Register Control (*3) Pin Control (*2) Register Control (*3) Register Control (*4) Controlled by CC1 and CC2 pin Controlled by DIR_IN pin Controlled by VBUS_CTRL, VCONN_CTRL1 and VCONN_CTRL2 register Controlled by pdn_CHA[1:0] and pdn_CHB[1:0] register The Way to be disable CC logic by register is below. Table 9. CC logic Setting Registers Address OVERRIDE_CC ATTACH 0x00[0] 0x03[4] Enable (Default) 0 0 Disable 1 1 CC Logic(2-wire serial interface Disable) DIR_OUT, VBUS_CTRL and VCONN_CTRL1/2 are controlled in accordance with the state of CC1 and CC2 pin as shown in the following table. ATTACH is an internal signal inside THCX423R10. Table 10. CC Control Case No. 1 2 3 4 5 6 7 8 9 *1 *2 CC1 CC2 DIR_ OUT(*1) vOpen vOpen 0 vRd vOpen 0 vOpen vRd 1 vOpen vRa 0 vRa vOpen 0 vRd vRa 0 vRa vRd 1 vRd vRd 0 vRa vRa 0 0:Port1 Active, 1:Port2 Active 0:Disable, 1:Enable Copyright(c)2018 THine Electronics, Inc. VBUS_ CTRL(*2) VCONN_ CTRL1(*2) VCONN_ CTRL2(*2) ATTACH 0 1 1 0 0 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 1 1 0 0 1 1 0 0 8/22 (internal signal) Function Detach. Analog/Digital Power Down CC1 Attach, Port1 Active CC2 Attach, Port2 Active Detach. Analog/Digital Power Down Detach. Analog/Digital Power Down CC1 Attach, Port1 Active CC2 Attach, Port2 Active (Debug) (Audio) THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E CC1 and CC2 pin have 3-level input IO to distinguish the voltage level of vOpen, vRd and vRa. The combination of CURRENT_MODE1 and CURRENT_MODE0 pins adjusts the threshold voltage of 3-level input IO. (Followed by the standard of USB Type-CTM, the threshold voltage of each vOpen, vRd and vRa is controlled by Type-C current advertisement independently.) Table 11. Current Mode Setting Setting CURRENT _MODE1 0 0 1 1 CURRENT _MODE0 0 1 0 1 Current Mode USB Default Medium(Type-C Current 1.5A) High(Type-C Current 3.0A) Used on the Device Side. CC1,CC2 pin Input Threshold Level See Table 17 2-wire serial I/F THCX423R10 has 2-wire serial I/F Slave block and a customer can control high-speed analog block setting, USB Type-CTM and related functions(VCONN port control, VBUS port control, active data lane select). When ENI2C=1, 2-wire serial I/F slave is active. Functions of 2-wire serial I/F slave block are as below. Standard-mode, Fast-mode, Fast-mode Plus (~1Mbps) Selectable 2-wire serial I/F device address (9 address) Burst Access acceptable 2-wire serial I/F bus watch dog timer (After receiving 2-wire serial I/F access from a host device, if SDA or SCL is stuck for long time, internal sequence circuit is cleared automatically.) When ENI2C=1, 2-wire serial I/F device address is selectable by IDSEL1 and IDSEL0 pins. It can select 9 device addresses. See Table 12. Table 12. Device Address IDSEL1 IDSEL0 Low Low Low Float Float Float High High High Low Float High Low Float High Low Float High Copyright(c)2018 THine Electronics, Inc. 2-wire serial I/F Device Address [6:0] (HEX) 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 9/22 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E Register Map Table 13. Register Map Address (HEX) 0x00 Bit R/W R 1 RW 0 RW OVERRIDE_CC 7:6 RW CURRENT_MODE 5:4 RW CC_DEBOUNCE Reserved 0x03 OVERRIDE_PDN_PORT 0x20 3:2 R 1:0 R 7:4 RW 3:2 RW 0x02 0x04 Register Name 7:2 0x01 0x03 Default (HEX) CC2_MONITOR CC1_MONITOR Reserved RXDET_TIMEOUT 0xBA 1:0 RW PD_DEBOUNCE 7:5 4 3 2 1 0 7:1 R RW RW RW RW RW R Reserved ATTACH DIR_OUT VBUS_CTRL VCONN_CTRL2 VCONN_CTRL1 Reserved 0x00 0x00 0 RW 7:4 R Reserved 3:2 RW PDN_CHA 0x05 SFT_RST 0x00 1:0 RW PDN_CHB Copyright(c)2018 THine Electronics, Inc. Descriptions 0: Allow DIR_IN pin control. 1: Block DIR_IN pin control. Use register. 0: Allow CC1, CC2 pin control. 1: Block CC1, CC2 pin control. Use register 00: USB Default 01: Medium (Type-C current 1.5A) 10: High (Type-C Current 3.0A) 11: Used on Device Side. tCC Debounce time adjustment 00: 50ms 01: 100ms 10: 150ms (default) 11: 300ms 00: vOpen 01: vRa 10: vRd 11: Reserved 00: vOpen 01: vRa 10: vRd 11: Reserved Rx detect timeout value setting 00:12ms 01:13.5ms 10:15ms(Default) 11:16ms tPD Debounce time adjustment 00: 5ms 01: 10ms 10: 15ms (default) 11: 30ms Port Attach state control DIR_OUT control VBUS_CTRL control VCONN_CTRL2 control VCONN_CTRL1 control Soft Reset 1: Reset registers to default value Automatically cleared into 0 after reset action. 0 is always read. Channel A Power Down 00:Both Port Power Down 01:Only Port2 Active 10:Only Port1 Active 11:Forbidden Channel B Power Down 00:Both Port Power Down 01:Only Port2 Active 10:Only Port1 Active 11: Forbidden 10/22 Note See Table 17 - Active only OVERRIDE_CC=0. Otherwise 00 fixed. - Active only OVERRIDE_CC=1 Otherwise ignored. - Active only OVERRIDE_PDN_PORT=1 . THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E Table 13. Register Map(continued) Address (HEX) Bit R/W 7:6 R 5:3 RW 0x06 Register Name Reserved CHA_PORT1_VOD_SET 0x1B 2:0 RW 7:6 R 5:3 RW 0x07 CHA_PORT2_VOD_SET Reserved CHA_PORT1_DEEM_SET 0x09 2:0 7:4 RW CHA_PORT2_DEEM_SET RW 0x08 0x09 Default (HEX) CHA_PORT1_EQ_SET 0xAA 3:0 RW 7:1 R 0 RW 7:6 R 5 RW 4:2 R 0x0A CHA_PORT2_EQ_SET 0x00 0 RW RW Tx deemphasis control for OUT2(CHA PORT2 side). 000: 0dB 001: 3.5 dB typ (default) 011: 6 dB typ 111: 8.5 dB typ other: Forbidden settings CHA PORT1 Rx equalizer setting. 00**: 0.05 dB 010*: 0.1 dB 0110: 0.2 dB 0111: 0.3 dB 1000: 0.9 dB 1001: 1.5 dB 1010: 2.0 dB (default) 1011: 3.8dB 1100: 4.0 dB 1101: 8.0 dB 111*: 11.6 dB CHA PORT2 Rx equalizer setting. 00**: 0.05 dB 010*: 0.1 dB 0110: 0.2 dB 0111: 0.3 dB 1000: 0.9 dB 1001: 1.5 dB 1010: 2.0 dB (default) 1011: 3.8dB 1100: 4.0 dB 1101: 8.0 dB 111*: 11.6 dB Note - - - - - - Reserved - - CHA_RXDET_CTRL_EN 0: CHA controlled by RXDET signal(Normal Function) 1: CHA controlled by register (Address:0x0A). - Reserved - - CHA_RXDET_VHYS_SET RXDET hysteresis select(CHA Both PORT) 0: 50mV 1: 100mV(default) - Reserved - - 0x20 1 Descriptions Output swing control for OUT1(CHA PORT1 side). 001: 600mV typ 011: 1000mV typ (default) 111: 1300 mV typ other: Forbidden settings Output swing control for OUT2(CHA PORT2 side). 001: 600mV typ. 011: 1000mV typ (default) 111: 1300 mV typ other: Forbidden settings Tx de-emphasis control for OUT1(CHA PORT1 side). 000: 0dB 001: 3.5 dB typ (default) 011: 6 dB typ 111: 8.5 dB typ other: Forbidden settings CHA_PORT1_RXDET CHA_PORT2_RXDET Copyright(c)2018 THine Electronics, Inc. Rx detect output monitor and control(CHA PORT1 side) 0: No receiver termination. 1: detected receiver termination. Rx detect output monitor and control(CHA PORT2 side) 0: No receiver termination. 1: detected receiver termination. 11/22 See Descriptions of Address 0x09 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E Table 13. Register Map(continued) Address (HEX) Bit R/W 7:6 R 5:3 RW 0x0B Register Name Reserved Reserved - - CHB_RXDET_CTRL_EN 0: CHB controlled by RXDET signal(Normal Function) 1: CHB controlled by register (Address:0x0E). - Reserved - - CHB_RXDET_VHYS_SET RXDET hysteresis select(CHB) 0: 50mV 1: 100mV(default) - Reserved - - Rx detect output monitor and control(CHB) 0: No receiver termination. 1: detected receiver termination. - - CHB_VOD_SET RW CHB_DEEM_SET 7:4 RW CHB_PORT1_EQ_SET 0xAA RW 7:1 R 0x0D CHB_PORT2_EQ_SET 0x00 0 RW 7:6 R 5 RW 0x0E 0x20 4:1 R 0 RW CHB_RXDET 7:1 0 R RW Reserved Reserved 0x00 Note - 2:0 3:0 Descriptions Output swing control for SSOUT(CHB) 001: 600mV typ. 011: 1000mV typ(default) 111: 1300 mV typ other : Forbidden settings Tx deemphasis control for SSOUT(CHB) 000: 0dB 001: 3.5 dB typ(default) 011: 6 dB typ 111: 8.5 dB typ other : Forbidden settings CHB PORT1 Rx equalizer setting. 00**: 0.05 dB 010*: 0.1 dB 0110: 0.2 dB 0111: 0.3 dB 1000: 0.9 dB 1001: 1.5 dB 1010: 2.0 dB (default) 1011: 3.8dB 1100: 4.0 dB 1101: 8.0 dB 111*: 11.6 dB CHB PORT2 Rx equalizer setting. 00**: 0.05 dB 010*: 0.1 dB 0110: 0.2 dB 0111: 0.3 dB 1000: 0.9 dB 1001: 1.5 dB 1010: 2.0 dB (default) 1011: 3.8dB 1100: 4.0 dB 1101: 8.0 dB 111*: 11.6 dB 0x19 0x0C 0x0F Default (HEX) Copyright(c)2018 THine Electronics, Inc. 12/22 - - - - - THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E Absolute Maximum Ratings Table 14. Absolute Maximum Ratings Parameter Supply Voltage(VCC33) LVCMOS Input/Output Voltage Open-Drain LVCMOS Bi-directional Input/Output Voltage Level Control LVCMOS Input Voltage 3-Level LVCMOS Input Voltage CML Receiver Input Voltage CML Transmitter Output Voltage High-Speed CML CC1,CC2 HBM ESD Rating All Other Pin MM CDM Storage Temperature Junction Temperature Reflow Peak Temperature/Time Min -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 Typ - Max 4.0 VCC33+0.3 VCC33+2.5 VCC33+2.5 VCC33+0.3 3.0 3.0 Unit V V V V V V V - - 4 - - 2 -55 - - 200 500 125 125 260/10 V V C C C/sec Typ 3.3 - Max 3.6 50 85 Unit V ms C kV Recommended Operating Conditions Table 15. Recommended Operating Condition Parameter Supply Voltage(VCC33) Supply Ramp Requirement Operating Temperature Copyright(c)2018 THine Electronics, Inc. Min 3.0 0.1 -40 13/22 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E Equivalent CML Input Diagram VCC25 VCC25 PD=1 : OFF PD=0 & signal input : ON 50ohm 50ohm CML_INP CML_INN Figure 2. CML Input Schematic Diagram Equivalent CML Output Diagram VCC25 50ohm VCC25 50ohm CML_OUTP CML_OUTN Figure 3. CML Output Schematic Diagram Copyright(c)2018 THine Electronics, Inc. 14/22 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E Electrical Specification LVCMOS DC Specification Table 16. LVCMOS DC Specification Over recommended operating supply and temperature range unless otherwise specified Symbol VIH VIL VOH VOL IOZH IOZL Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Output Leak Current High in Hi-Z State Output Leak Current Low in Hi-Z State Condition Ioh=-2mA Iol=8mA Min 2.0 0 2.4 0 Typ - Max VCC33 0.7 VCC33 0.4 Unit V V V V - -15 - 15 uA - -15 - 15 uA Level Control LVCMOS DC Specification Table 17. Level Control LVCMOS DC Specification Over recommended operating supply and temperature range unless otherwise specified Symbol VTH_RaRd_USB VTH_RdOpen_USB VTH_RaRd_MED VTH_RdOpen_MED VTH_ RaRd_HIGH VTH_RdOpen_HIGH VTH_ RaRd_DEV VTH_RdOpen_DEV Parameter Voltage Threshold for Detecting an Active Cable Attach Voltage Threshold for Detecting a UFP Attach Voltage Threshold for Detecting an Active Cable Attach Voltage Threshold for Detecting a UFP Attach Voltage Threshold for Detecting an Active Cable Attach Voltage Threshold for Detecting a UFP Attach Voltage Threshold for Detecting an Active Cable Attach Voltage Threshold for Detecting a UFP Attach IIH_LC High Level Input Leak Current IIL_LC Low Level Input Leak Current Condition Min Typ Max Unit 0.15 0.2 0.25 V 1.45 1.6 1.7 V 0.35 0.4 0.45 V 1.45 1.6 1.7 V CURRENT_MODE1=1 CURRENT_MODE0=0 (Type-C Current 3.0A) 0.72 0.8 0.85 V 2.35 2.6 2.8 V CURRENT_MODE1=1 CURRENT_MODE0=1 (Used on Device side) 0.15 0.2 0.25 V 2.35 2.6 2.8 V VIN=5.5V -100 - 100 uA VIN<2.5V VIN=GND -15 -15 - 15 15 uA uA CURRENT_MODE1=0 CURRENT_MODE0=0 (Default USB) CURRENT_MODE1=0 CURRENT_MODE0=1 (Type-C Current 1.5A) 3-Level LVCMOS DC Specification Table 18. 3-Level LVCMOS DC Specification Over recommended operating supply and temperature range unless otherwise specified Symbol VTHL VTHH IIH_3L IIL_3L Parameter Low-Level Threshold Voltage High-Level Threshold Voltage High Level Input Leak Current Low Level Input Leak Current Condition * * VIN=VCC33 VIN=GND Min 0.42 1.25 -100 -100 Typ 0.83 1.67 - Max 1.25 2.08 100 100 Unit V V uA uA *Must be tied for setting each level Low: Tie 1k 5% to GND Float: Leave pin open High: Tie 1k 5% to VCC33 Copyright(c)2018 THine Electronics, Inc. 15/22 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E Open-Drain LVCMOS DC Specification Table 19. Open-Drain LVCMOS DC/AC Specification Over recommended operating supply and temperature range unless otherwise specified Symbol VIL VIH VOL1 IOL IIH IIL CI Parameter Low-level Input Voltage[1] High-level Input Voltage[1] Low-level Output Voltage Low-level Output Current High Level Input Leak Current Low Level Input Leak Current Capacitance for Each I/O Pin Condition 3 mA sink current VOL=0.4V VIN=5.5V VIN=GND - Min 0 1.86 20 -10 -10 - Typ - Max 0.7 5.5 0.4 10 10 10 Unit V V V mA uA uA pF Supply Current Table 20. Supply Current Over recommended operating supply and temperature range unless otherwise specified Symbol ICCW Active Mode Supply Current ICCI Unplug Mode Supply Current ICCS *1 Parameter Power Down Supply Current Condition PD=0,EQx*1=High DEEMx*1=High, OUTAMPx*1=High PD=0,EQx*1=Float DEEMx*1=Low, OUTAMPx*1=Float PD=0, no output load is detected PD=1 Min Typ Max Unit - - 170 mA - 120 - mA - 3.0 4.0 mA - 1.0 2.0 mA x=A, B Receiver DC/AC Specification Table 21. Receiver DC/AC Specification Over recommended operating supply and temperature range unless otherwise specified Symbol VIN-DIFF-PP RRX-DC RRX-DIFF-DC RRX-HIGH-IMPDC-POS RLRX-DIFF RLRX-CM VRX-EQ-LOW VRX-EQ-FLOAT VRX-EQ-HIGH *1 Parameter AC Coupled Differential Input Peak to Peak Signal Receiver DC Common Mode Impedance DC Differential Impedance DC Input CM Input Impedance for V>0 Rx Differential Return Loss Rx Common Mode Return Loss Input Equalization, 2.0dB Input Equalization, 4.0dB Input Equalization, 8.0dB Condition Min Typ Max Unit 10Gbps PRBS9 - - 1200 mV - - 30 - - 72 100 120 - 25 - - k - -10 -6 2 4 8 - dB dB dB dB dB 0.05 to 5 GHz 0.05 to 5 GHz EQx*1=Low EQx*1=Float EQx*1=High x=A, B Copyright(c)2018 THine Electronics, Inc. 16/22 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E Transmitter DC / AC specifications Table 22. Transmitter DC / AC specification Over recommended operating supply and temperature range unless otherwise specified Symbol VTX-DIFF-PP VTX-DIFF-PP-HIGH VTX-DIFF-PP-LOW VTX-DE-RATIO-LOW VTX-DE-RATIO-FLOAT VTX-DE-RATIO-HIGH TDE TTX-DJ-DD TTX-RJ-DD TTX-RISE-FALL TRF-MISMATCH RLTX-DIFF RLTX-CM RTX-DIFF-DC VTX-RCV-DETECT VTX-DC-CM VTX-CM-AC-PP_ACTIVE ITX-SHORT VTX-IDLE-DIFF-DC CTX-PARASITIC TPROPAGATION TMUX-SWITCH *1 *2 Parameter Differential p-p Tx Voltage Swing High-Power Differential p-p Tx Voltage Swing Low-Power Differential p-p Tx Voltage Swing Tx De-emphasis Ratio Tx De-emphasis Ratio Tx De-emphasis Ratio De-emphasis Width Deterministic Jitter Random Jitter Tx Rise/Fall Time Tx Rise/Fall Mismatch Tx Differential Return Loss*2 Tx Common Mode Return Loss*1 DC Differential Impedance The Amount of Voltage Change Allowed during Receiver Detection Transmitter DC Common-mode Voltage Transmitter AC Common-mode Voltage Active Transmitter Short-circuit Current Limit DC Electrical Idle Differential Output Voltage Tx input capacitance Differential Propagation Delay Mux/Switch Time Condition Min Typ Max 0.8 1 1.2 OUTAMPx*1=High - 1.3 - OUTAMPx*1=Low - 0.6 - DEEMx*1=Low DEEMx*1=Float DEEMx*1=High Loss=18dB@5GHz 20% to 80 % 0.05 to 5 GHz - -3.5 -6 -8.5 100 0.25 0.5 40 0.01 -10 - dB dB dB ps UIpp ps RMS ps UI dB 0.05 to 5 GHz - -6 - dB - 80 100 120 - - - 0.6 V - - 1.9 - V - - - 100 mVpp - - 20 60 mA - 0 - 10 mV - - 150 10 1.1 - pF ps us *1=Float OUTAMPx Unit V x=A, B Confirmed evaluation board VTX-DE-RATIO-LOW VTX-DE-RATIO-FLOAT VTX-DE-RATIO-HIGH TDE Figure 4. De-emphasis Level Copyright(c)2018 THine Electronics, Inc. 17/22 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E PD Register Set *1 SDA,SCL tPDS SIGDETENN DIRIN Low Fix Low Fix SSINP/N OUTP/N1 Fix to VCC25 TPROPAGATION OUTP/N2 Fix to VCC25 INP/N1 INP/N2 SSOUTP/N Fix to VCC25 TPROPAGATION *1 Refer to Table 7 and Table 9 Figure 5 Power on Sequence (Signal Detect Enable/Rx Detect Disable/CC logic Disable/Port 1 Active) Copyright(c)2018 THine Electronics, Inc. 18/22 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E PD Register Set *1 SDA,SCL tPDS SIGDETENN DIRIN High Fix High Fix SSINP/N OUTP/N1 Fix to VCC25 OUTP/N2 Fix to VCC25 Invaild TPROPAGATION INP/N1 INP/N2 SSOUTP/N Fix to VCC25 Invaild TPROPAGATION *1 Refer to Table 7 and Table 9 Figure 6 Power on Sequence (Signal Detect Disable/Rx Detect Disable/CC logic Disable/Port 2 Active) Copyright(c)2018 THine Electronics, Inc. 19/22 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E 2-wire serial I/F Electrical Characteristics Table 23. Characteristics of the SDA and SCL bus line for 2-wire serial I/F Over recommended operating supply and temperature range unless otherwise specified Symbol Parameter fSCL Condition SCL Clock Frequency Hold Time (repeated) START Condition tHD;STA tLOW tHIGH Low Period of the SCL Clock High Period of the SCL Clock Set-up Time for a Repeated START Condition Data Hold Time Data Set-up Time Rise Time of both SDA and SCL Signals Fall Time of both SDA and SCL Signals Set-up Time for STOP Condition tSU;STA tHD;DAT tSU;DAT tr tf tSU;STO Bus Free Time between a STOP and START Condition Pulse Width of Spikes Which Must be Suppressed by the Input Filter Required wait time from PD low to START condition tBUF tSP tPDS After this period, the first clock pulse is generated. - Min Typ Max Unit 0 - 1 MHz 0.26 - - us 0.5 0.26 - - us us 0.26 - - us 0 50 - - - us ns - - 300 ns - - 300 ns 0.26 - - us 0.5 - - us - - 50 ns 1 - - ms - SDA tf tLOW tr tHD;STA tSU;DAT tf tSP tr tBUF SCL S tHD;STA tHD;DAT tHIGH tSU;STA 1/fSCL Sr tSU;STO P S PD tPDS S ... Start Cond itio n P ... Stop Condition Sr ... Repea ted Start Cond itio n Figure 7. 2-Wire Serial Interface Timing Diagram Copyright(c)2018 THine Electronics, Inc. 20/22 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E Package Unit : mm Figure 8. 40-pin QFN package physical dimension Copyright(c)2018 THine Electronics, Inc. 21/22 THine Electronics, Inc. SC: E THCX423R10_Rev.1.01_E Notices and Requests 1. The product specifications described in this material are subject to change without prior notice. 2. The circuit diagrams described in this material are examples of the application which may not always apply to the customer's design. We are not responsible for possible errors and omissions in this material. Please note if errors or omissions should be found in this material, we may not be able to correct them immediately. 3. This material contains our copyright, know-how or other proprietary. Copying or disclosing to third parties the contents of this material without our prior permission is prohibited. 4. Note that if infringement of any third party's industrial ownership should occur by using this product, we will be exempted from the responsibility unless it directly relates to the production process or functions of the product. 5. Product Application 5.1 Application of this product is intended for and limited to the following applications: audio-video device, office automation device, communication device, consumer electronics, smartphone, feature phone, and amusement machine device. This product must not be used for applications that require extremely highreliability/safety such as aerospace device, traffic device, transportation device, nuclear power control device, combustion chamber device, medical device related to critical care, or any kind of safety device. 5.2 This product is not intended to be used as an automotive part, unless the product is specified as a product conforming to the demands and specifications of ISO/TS16949 ("the Specified Product") in this data sheet. THine Electronics, Inc. ("THine") accepts no liability whatsoever for any product other than the Specified Product for it not conforming to the aforementioned demands and specifications. 5.3 THine accepts liability for demands and specifications of the Specified Product only to the extent that the user and THine have been previously and explicitly agreed to each other. 6. Despite our utmost efforts to improve the quality and reliability of the product, faults will occur with a certain small probability, which is inevitable to a semi-conductor product. Therefore, you are encouraged to have sufficiently redundant or error preventive design applied to the use of the product so as not to have our product cause any social or public damage. 7. 8. Please note that this product is not designed to be radiation-proof. Testing and other quality control techniques are used to this product to the extent THine deems necessary to support warranty for performance of this product. Except where mandated by applicable law or deemed necessary by THine based on the user's request, testing of all functions and performance of the product is not necessarily performed. 9. Customers are asked, if required, to judge by themselves if this product falls under the category of strategic goods under the Foreign Exchange and Foreign Trade Control Law. 10. The product or peripheral parts may be damaged by a surge in voltage over the absolute maximum ratings or malfunction, if pins of the product are shorted by such as foreign substance. The damages may cause a smoking and ignition. Therefore, you are encouraged to implement safety measures by adding protection devices, such as fuses. THine Electronics, Inc. sales@thine.co.jp Copyright(c)2018 THine Electronics, Inc. 22/22 THine Electronics, Inc. SC: E