AVAILABLE
Functional Diagrams
Pin Configurations appear at end of data sheet.
Functional Diagrams continued at end of data sheet.
UCSP is a trademark of Maxim Integrated Products, Inc.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
General Description
The MAX13430E–MAX13433E are full- and half-duplex
RS-485 transceivers that feature an adjustable low-volt-
age logic interface for operation in multivoltage systems.
This allows direct interfacing to low-voltage ASIC/FPGAs
without extra components. The MAX13430E–MAX13433E
RS-485 transceivers operate with a VCC voltage supply
from +3V to +5V. The low-voltage logic interface operates
with a voltage supply from +1.62V to VCC.
The MAX13430E/MAX13432E feature reduced slew-
rate drivers that minimize EMI and reduce reflections
caused by improperly terminated cables, allowing
error-free data transmission up to 500kbps. The
MAX13431E/MAX13433E driver slew rates are not limit-
ed, enabling data transmission up to 16Mbps. The
MAX13430E/MAX13431E are intended for half-duplex
communications, and the MAX13432E/MAX13433E are
intended for full-duplex communications.
The MAX13430E/MAX13431E are available in 10-pin
µMAX®and 10-pin TDFN packages. The MAX13432E/
MAX13433E are available in 14-pin TDFN and 14-pin
SO packages.
Features
♦Wide +3V to +5V Input Supply Range
♦Low-Voltage Logic Interface +1.62V (min)
♦Ultra-Low Supply Current in Shutdown Mode
10µA ICC (max), 1µA IL(max)
♦Thermal Shutdown Protection
♦Hot-Swap Input Structures on DE and RE
♦1/8-Unit Load Allows Up to 256 Transceivers on
the Bus
♦Enhanced Slew-Rate Limiting
(MAX13430E/MAX13432E)
♦Extended ESD Protection for RS-485 I/O Pins
±30kV Human Body Model
±15kV Air-Gap Discharge per IEC 61000-4-2
±10kV Contact Discharge per IEC 61000-4-2
♦Extended -40°C to +85°C Operating Temperature
Range
♦Space-Saving TDFN and µMAX Packages
RS-485 Transceivers with Low-Voltage
Logic Interface
Ordering Information/Selector Guide
PART PIN-PACKAGE FULL/HALF
DUPLEX
DATA RATE
(Mbps)
SLEW RATE
LIMITED
TRANSCEIVERS
ON BUS
TOP
MARK
PACKAGE
CODE
MAX13430EETB+ 10 TDFN-EP*
(3mm x 3mm) Half 0.5 Yes 256 AUS T1033-1
MAX13430EEUB+ 10 μMAX
(3mm x 3mm) Half 0.5 Yes 256 — U10-2
MAX13431EETB+ 10 TDFN-EP*
(3mm x 3mm) Half 16 No 256 AUT T1033-1
MAX13431EEUB+ 10 μMAX
(3mm x 3mm) Half 16 No 256 — U10-2
MAX13432EESD+ 14 SO Full 0.5 Yes 256 — S14-1
MAX13432EETD+ 14 TDFN-EP*
(3mm x 3mm) Full 0.5 Yes 256 AEG T1433-2
MAX13433EESD+ 14 SO Full 16 No 256 — S14-1
MAX13433EESD/V+ 14 SO Full 16 No 256 — S14-1
MAX13433EETD+ 14 TDFN-EP*
(3mm x 3mm) Full 16 No 256 AEH T1433-2
Typical Application Circuits appears at end of data sheet.
Note: All devices are specified over the extended -40°C to +85°C operating temperature range.
+
Denotes a lead(Pb)-free/RoHS-compliant package.
*
EP = Exposed pad.
/V denotes an automotive qualified part.
µMAX is a registered trademark of Maxim Integrated Products, Inc.
Applications
Industrial Control Systems
Portable Industrial
Equipment
Motor Control
HVAC
MAX13430E–MAX13433E
19-4322; Rev 2; 5/10
RS-485 Transceivers with Low-Voltage
Logic Interface
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(VCC = +3V to +5.5V, VL= +1.8V to VCC, TA= -40°C to +85°C, unless otherwise noted. Typical values are VCC = +5V, VL= +1.8V at
TA= +25°C.) (Notes 2, 3)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
(All voltages referenced to GND.)
Supply Voltage (VCC) ...............................................-0.3V to +6V
Logic Supply Voltage (VL ) ......................................-0.3V to +6V
Control Input Voltage (RE) .............................-0.3V to (VL+0.3V)
Control Input Voltage (DE) ......................................-0.3V to +6V
Driver Input Voltage (DI) ..........................................-0.3V to +6V
Driver Output Voltage (Y, Z, A, B) ............................-8V to +13V
Receiver Input Voltage (A, B)
(MAX13430E/MAX13431E)....................................-8V to +13V
Receiver Input Voltage (A, B)
(MAX13432E/MAX13433E)..................................-25V to +25V
Receiver Output Voltage (RO) .....................-0.3V to (VL+ 0.3V)
Driver Output Current ....................................................±250mA
Short-Circuit Duration (RO, A, B) to GND .................Continuous
Power Dissipation (TA= +70°C)
10-Pin µMAX (derate 8.8mW/°C above +70°C) ..........707mW
10-Pin TDFN (derate 24.4mW/°C above +70°C) ......1951mW
14-Pin TDFN (derate 24.4mW/°C above +70°C) ......1951mW
14-Pin SO (derate 11.9mW/°C above +70°C) .............952mW
Junction-to-Ambient Thermal Resistance (θJA) (Note 1)
10-Pin µMAX ...........................................................113.1°C/W
10-Pin TDFN.................................................................41°C/W
14-Pin TDFN ................................................................41°C/W
14-Pin SO ....................................................................84°C/W
Junction-to-Ambient Thermal Resistance (θJC) (Note 1)
10-Pin µMAX ................................................................42°C/W
10-Pin TDFN...................................................................9°C/W
14-Pin TDFN ..................................................................8°C/W
14-Pin SO ....................................................................34°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature..................................................... +150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER SUPPLY
VCC Supply-Voltage Range VCC 3 5.5 V
VL Supply-Voltage Range VL1.62 VCC V
ICC Supply Current ICC
DE = RE = high, no load
DE = RE = low, no load
DE = high, RE = low, no load
2mA
ICC Supply Current in Shutdown
Mode ISHDN DE = low, RE = high, no load 10 µA
VL Supply Current ILRO = no load 1 µA
DRIVER
RL = 100Ω, VCC = +3V 2 VCC
RL = 54Ω, VCC = +3V 1.5 VCC
RL = 100Ω, VCC = +4.5V 2.25 VCC
Differential Driver Output
(Figure 1) VOD
RL = 54Ω, VCC = +4.5V 2.25 VCC
V
Change in Magnitude of
Differential Output Voltage ΔVOD RL = 100Ω or 54Ω, Figure 1 (Note 4) 0.2 V
Driver Common-Mode Output
Voltage VOC RL = 100Ω or 54Ω, Figure 1 VCC/2 3 V
Change in Magnitude of
Common-Mode Voltage ΔVOC RL = 100Ω or 54Ω, Figure 1 (Note 4) 0.2 V
MAX13430E–MAX13433E
2
Maxim Integrated
RS-485 Transceivers with Low-Voltage
Logic Interface
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3V to +5.5V, VL= +1.8V to VCC, TA= -40°C to +85°C, unless otherwise noted. Typical values are VCC = +5V, VL= +1.8V at
TA= +25°C.) (Notes 2, 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
V
IN
= +12V 125
Output Leakage Current
(Y and Z) I
OLK
DE = GND,
V
CC
= V
GND
or +5.5V V
IN
= -7V -100 µA
0 ≤ V
OUT
≤ +12V +250
Driver Short-Circuit Output
Current (Note 5) I
OSD
-7V ≤ V
OUT
≤ V
CC
-250 mA
(V
CC
- 1V) ≤ V
OUT
≤ +12V 15
Driver Short-Circuit Output
Foldback Current (Note 5) I
OSDF
-7V ≤ V
OUT
≤ +1V -15 mA
Thermal Shutdown Threshold T
TS
+150 °C
Thermal Shutdown Hysteresis T
TSH
15 °C
RECEIVER
V
CM
= +12V 125
Input Current (A and B) I
A, B
DE = GND,
V
CC
= V
GND
or +5.5V V
CM
= -7V -100 µA
Receiver Differential Threshold
Voltage V
TH
-7V ≤ V
CM
≤ +12V -200 -50 mV
Receiver Input Hysteresis ΔV
TH
V
CM
= 0 15 mV
Receiver Input Resistance R
IN
-7V ≤ V
CM
≤ +12V 96 kΩ
LOGIC INTERFACE
Input High Logic Level
(DI, DE, RE)V
IH
2/3 x
V
L
V
Input Low Logic Level
(DI, DE, RE)V
IL
1/3 x
V
L
V
Input Current (DI, DE, RE)I
IN
V
DI
= V
DE
= V
RE
= V
L
= +5.5V ±1 µA
Input Impedance on First
Transition R
DE
,
RE
110kΩ
Output High Logic Level (RO) V
OH
I
O
= -1mA, V
A
- V
B
= V
TH
V
L
- 0.4 V
Output Low Logic Level (RO) V
OL
I
O
= 1mA, V
A
- V
B
= -V
TH
0.4 V
Receiver Three-State Output
Current (RO) I
OZR
0 ≤ V
RO
≤ V
L
-1 0.01 +1 µA
Receiver Output Short-Circuit
Current (RO) I
OSR
0 ≤ V
RO
≤ V
L
-110 +110 mA
ESD PROTECTION
IEC 61000-4-2 Air Gap Discharge ±15
IEC 61000-4-2 Contact Discharge ±10A, B, Y, Z to GND
Human Body Model ±30
kV
All Other Pins
(Except A, B, Y, and Z) Human Body Model ±2 kV
MAX13430E–MAX13433E
Maxim Integrated
RS-485 Transceivers with Low-Voltage
Logic Interface
SWITCHING CHARACTERISTICS (MAX13431E/MAX13433E (16Mbps))
(VCC = +3V to +5.5V, VL= +1.8V to VCC, TA= -40°C to +85°C, unless otherwise noted. Typical values are VCC = +5V, VL= +1.8V at
TA= +25°C.) (Notes 2, 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DRIVER
tDPLH 50
Driver Propagation Delay
(Figures 2 and 3) tDPHL
CL = 50pF, RDIFF = 54Ω
50 ns
Driver Differential Output Rise or
Fall Time tR, tFCL = 50pF, RL = 54Ω, Figures 2 and 3 15 ns
Differential Driver Output Skew
|tDPLH - tDPHL|tDSKEW CL = 50pF, RL = 54Ω, Figures 2 and 3 8 ns
Maximum Data Rate 16 Mbps
Driver Enable to Output High tDZH CL = 50pF, RL = 500Ω, Figure 4 150 ns
Driver Enable to Output Low tDZL CL = 50pF, RL = 500Ω, Figure 5 150 ns
Driver Disable Time from Low tDLZ CL = 50pF, RL = 500Ω, Figure 4 100 ns
Driver Disable Time from High tDHZ CL = 50pF, RL = 500Ω, Figure 5 120 ns
Driver Enable from Shutdown
to Output High tDZH
(
SHDN
)
CL = 50pF, RL = 500Ω, Figure 4 5 µs
Driver Enable from Shutdown
to Output Low tDZL
(
SHDN
)
CL = 50pF, RL = 500Ω, Figure 5 5 µs
RECEIVER
tRPLH 80
Receiver Propagation Delay
(Figures 6 and 7) tRPHL
CL = 15pF 80 ns
Receiver Output Skew tRSKEW CL = 15pF, Figures 6 and 7 13 ns
Maximum Data Rate 16 Mbps
Receiver Enable to Output Low tRZL Figure 8 50 ns
Receiver Enable to Output High tRZH Figure 8 50 ns
Receiver Disable Time from Low tRLZ Figure 8 50 ns
Receiver Disable Time from High tRHZ Figure 8 50 ns
Receiver Enable from
Shutdown to Output High tRZH
(
SHDN
)
Figure 8 5 µs
Receiver Enable from
Shutdown to Output Low tRZL
(
SHDN
)
Figure 8 5 µs
DRIVER/RECEIVER
Time to Shutdown tSHDN 50 340 700 ns
MAX13430E–MAX13433E
4
Maxim Integrated
RS-485 Transceivers with Low-Voltage
Logic Interface
SWITCHING CHARACTERISTICS (MAX13430E/MAX13432E (500kbps))
(VCC = +3V to +5.5V, VL= +1.8V to VCC, TA= -40°C to +85°C, unless otherwise noted. Typical values are VCC = +5V, VL= +1.8V at
TA= +25°C.) (Notes 2, 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DRIVER
tDPLH 180 800
Driver Propagation Delay
(Figures 2 and 3) tDPHL
CL = 50pF, RL = 54Ω
180 800 ns
Driver Differential Output Rise or
Fall Time tR, tFCL = 50pF, RL = 54Ω, Figures 2 and 3 200 800 ns
Differential Driver Output Skew
|tDPLH - tDPHL|tDSKEW CL = 50pF, RL = 54Ω, Figures 2 and 3 100 ns
Maximum Data Rate 500 kbps
Driver Enable to Output High tDZH CL = 50pF, RL = 500Ω, Figure 4 2.5 µs
Driver Enable to Output Low tDZL CL = 50pF, RL = 500Ω, Figure 5 2.5 µs
Driver Disable Time from Low tDLZ CL = 50pF, RL = 500Ω, Figure 4 100 ns
Driver Disable Time from High tDHZ CL = 50pF, RL = 500Ω, Figure 5 120 ns
Driver Enable from Shutdown
to Output High tDZH
(
SHDN
)
CL = 50pF, RL = 500Ω, Figure 4 5 µs
Driver Enable from Shutdown
to Output Low tDZL
(
SHDN
)
CL = 50pF, RL = 500Ω, Figure 5 5 µs
RECEIVER
tRPLH 200
Receiver Propagation Delay
(Figures 6 and 7) tRPHL
CL = 15pF 200 ns
Receiver Output Skew tRSKEW CL = 15pF, Figures 6 and 7 30 ns
Maximum Data Rate 500 kbps
Receiver Enable to
Output Low tRZL Figure 8 50 ns
Receiver Enable to
Output High tRZH Figure 8 50 ns
Receiver Disable Time
from Low tRLZ Figure 8 50 ns
Receiver Disable Time
from High tRHZ Figure 8 50 ns
Receiver Enable from
Shutdown to Output High tRZH
(
SHDN
)
Figure 8 5 µs
Receiver Enable from
Shutdown to Output Low tRZL
(
SHDN
)
Figure 8 5 µs
MAX13430E–MAX13433E
Maxim Integrated
RS-485 Transceivers with Low-Voltage
Logic Interface
SWITCHING CHARACTERISTICS (MAX13430E/MAX13432E (500kbps)) (continued)
(VCC = +3V to +5.5V, VL= +1.8V to VCC, TA= -40°C to +85°C, unless otherwise noted. Typical values are VCC = +5V, VL= +1.8V at
TA= +25°C.) (Notes 2, 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DRIVER/RECEIVER
Time to Shutdown t
SHDN
50 340 700 ns
Note 2: Parameters are 100% production tested at TA= +25°C, unless otherwise noted. Limits over temperature are guaranteed by
design.
Note 3: All currents into the device are positive. All currents out of the device are negative. All voltages are referenced to device
ground, unless otherwise noted.
Note 4: ΔVOD and ΔVOC are the changes in VOD and VOC, respectively, when the DI input changes state.
Note 5: The short-circuit output current is the peak current just prior to current limiting; the short-circuit foldback output current
applies during current limiting to allow a recovery from bus contention.
Typical Operating Characteriststics
(VCC = +5V, VL = +5V, TA = +25°C, unless otherwise noted.)
VCC SUPPLY CURRENT vs. TEMPERATURE
MAX13430E-3E toc01
TEMPERATURE (°C)
VCC SUPPLY CURRENT (mA)
10-15 35 60
1
10
100
0
-40 85
DE = HIGH, MAX13433E
DE = LOW, MAX13433E
DE = HIGH, MAX13432E
DE = LOW, MAX13432EVL = 5V
RDIFF = 54Ω
DI = RE = LOW
OUTPUT CURRENT vs. RECEIVER
OUTPUT-HIGH VOLTAGE
MAX13430E-3E toc02
OUTPUT-HIGH VOLTAGE, VOH (V)
OUTPUT CURRENT FOR VL = 5V (mA)
OUTPUT CURRENT FOR VL = 1.8V (mA)
2134
20
40
60
0
30
50
10
2
4
6
0
3
5
1
05
VL = 1.8V
VL = 5V
OUTPUT CURRENT vs. RECEIVER
OUTPUT-LOW VOLTAGE
MAX13430E-3E toc03
OUTPUT-LOW VOLTAGE, VOL (V)
OUTPUT CURRENT FOR VL = 5V (mA)
OUTPUT CURRENT FOR VL = 1.8V (mA
2134
80
0
40
60
20
8
0
4
6
2
05
VL = 1.8V
VL = 5V
RECEIVER OUTPUT-HIGH
VOLTAGE vs. TEMPERATURE
MAX13430E-3E toc04
TEMPERATURE (°C)
OUTPUT-HIGH VOLTAGE FOR VL = 5V, VOH (V)
OUTPUT-LOW VOLTAGE FOR VL = 1.8V, VOH (V)
10-15 35 60
6.0
4.0
5.0
5.5
4.5
2.0
1.6
1.8
1.9
1.7
-40 85
VL = 1.8V
IO = 1mA
VL = 5V
RECEIVER OUTPUT-LOW VOLTAGE
vs. TEMPERATURE
MAX13430E-3E toc05
TEMPERATURE (°C)
OUTPUT-LOW VOLTAGE, VOL (V)
10-15 35 60
0.5
0
0.2
0.3
0.4
0.1
-40 85
VL = 1.8V
IO = 1mA
VL = 5V
DIFFERENTIAL OUTPUT CURRENT
vs. DIFFERENTIAL OUTPUT VOLTAGE
MAX13430E-3E toc06
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
2134
140
0
80
100
120
60
40
20
05
VL = 5V
MAX13430E–MAX13433E
6
Maxim Integrated
RS-485 Transceivers with Low-Voltage
Logic Interface
DRIVER DIFFERENTIAL OUTPUT
VOLTAGE vs. TEMPERATURE
MAX13430E-3E toc07
TEMPERATURE
(
°C
)
DIFFERENTIAL OUTPUT VOLTAGE, VOD (V)
10-15 35 60
4.0
0
2.0
3.0
1.0
0.5
2.5
3.5
1.5
-40 85
RDIFF = 54Ω
VL = 5V
OUTPUT CURRENT vs. TRANSMITTER
OUTPUT-HIGH VOLTAGE
MAX13430E-3E toc08
OUTPUT-HIGH VOLTAGE
(
V
)
OUTPUT CURRENT (mA)
243-6
140
0
80
100
120
60
40
20
-7 5-2 0-1 1-4-5 -3
VL = 5V
OUTPUT CURRENT vs. TRANSMITTER
OUTPUT-LOW VOLTAGE
MAX13430E-3E toc09
OUTPUT-LOW VOLTAGE
(
V
)
OUTPUT CURRENT (mA)
104
160
0
80
100
120
140
60
40
20
012268
VL = 5V
SHUTDOWN CURRENT vs. TEMPERATURE
MAX13430E-3E toc10
TEMPERATURE (°C)
SHUTDOWN CURRENT (μA)
10 35
10
0
4
5
6
7
8
9
3
2
1
-40 8560-15
VL = 5V
ICC
IL
DRIVER PROPAGATION vs. TEMPERATURE
(MAX13432E)
MAX13430E-3E toc11
TEMPERATURE (°C)
DRIVER PROPAGATION DELAY (ns)
10 35
600
0
300
400
500
200
100
-40 8560-15
VL = 5V
tRLPH
tRLPL
DRIVER PROPAGATION vs. TEMPERATURE
(MAX13433E)
MAX13430E-3E toc12
TEMPERATURE (°C)
DRIVER PROPAGATION DELAY (ns)
10 35
80
0
40
50
60
20
70
30
10
-40 8560-15
VL = 5V
tRPHL
tRPLH
RECEIVER PROPAGATION vs. TEMPERATURE
MAX13430E-3E toc13
TEMPERATURE (°C)
RECEIVER PROPAGATION DELAY (ns)
10 35
60
0
30
45
15
-40 8560-15
VL = 1.8V tRPHL
tRPLH
MAX13432E DRIVER PROPAGATION
DELAY (500kbps)
MAX13430E-3E toc14
10ns/div
VL = 5V
RL = 54Ω
MAX13433E DRIVER PROPAGATION
DELAY (16Mbps)
MAX13430E-3E toc15
10ns/div
VY
2V/div
VZ
2V/div
DI
2V/div
VL = 5V
RL = 54Ω
Typical Operating Characteristics (continued)
(VCC = +5V, VL = +5V, TA = +25°C, unless otherwise noted.)
MAX13430E–MAX13433E
Maxim Integrated
RS-485 Transceivers with Low-Voltage
Logic Interface
Test Circuits and Waveforms
Y
Z
VOD
VOC
RL/2
RL/2
Figure 1. Driver DC Test Load
DI
VL
0
Z
Y
VO
0
-VO
VO
VL/2
tDPLH tDPHL
1/2 VO
10%
tR
90% 90%
1/2 VO
10%
tF
VDIFF = V (Y) - V (Z)
VDIFF
tSKEW = | tDPLH - tDPHL |
Figure 3. Driver Propagation Delays
DI
DE
VL
D
Z
Y
VOD RLCL
Figure 2. Driver Timing Test Circuit
MAX13430E–MAX13433E
8
Maxim Integrated
RS-485 Transceivers with Low-Voltage
Logic Interface
DE
OUT
tDHZ
0
VL
VL/2
0.25V
0
VOH
GENERATOR
0 OR VL
S1
Y
Z
50Ω
DE
DOUT
tDZH, tDZH(SHDN)
VOM = (0 + VOH)/2
RL = 500Ω
CL
50pF
Figure 4. Driver Enable and Disable Times (tDHZ, tDZH, and tDZH(SHDN))
DE
VCC
OUT
tDLZ
0
VL
VL/2
GENERATOR
0 OR VL
S1
Y
Z
DE
50Ω
DOUT
tDZL, tDZL(SHDN)
VOM = (VOL + VCC)/2
RL = 500Ω
CL
50pF
VOL 0.25V
VCC
Figure 5. Driver Enable and Disable Times (tDZL, tDLZ, and tDZL(SHDN))
Test Circuits and Waveforms (continued)
MAX13430E–MAX13433E
Maxim Integrated
RS-485 Transceivers with Low-Voltage
Logic Interface
VID R
B
A
RECEIVER
OUTPUT
ATE
Figure 6. Receiver Propagation Delay Test Circuit
A
B
RO
VOH
VL/2
tRPLH
tRPHL
VOL
+1V
-1V
THE RISE TIME AND FALL TIME OF INPUTS A AND B < 4ns
Figure 7. Receiver Propagation Delays
Test Circuits and Waveforms (continued)
S1 OPEN
S2 CLOSED
S3 = +1.5V
RO
VL
0
0
VOH
VOH/2
S1 OPEN
S2 CLOSED
S3 = +1.5V
tRHZ
VL
0
0
VOH
0.25V
VL/2
S1 CLOSED
S2 OPEN
S3 = -1.5V
VL
0
VOL
VL
VL/2
S1 CLOSED
S2 OPEN
S3 = -1.5V
tRLZ
VL
0
VOL
VL
0.25V
GENERATOR
VL
+1.5V
1kΩ
CL
15pF S2
S1
50Ω
S3
-1.5V R
VID
RE
RO
RE
RO
RE
RO
RE
tRZH, tRZH(SHDN)
tRZL, tRZL(SHDN)
(VOL + VL)/2
VL/2
RRO
RE
Figure 8. Receiver Enable and Disable Times
MAX13430E–MAX13433E
10
Maxim Integrated
RS-485 Transceivers with Low-Voltage
Logic Interface
Pin Configurations
TDFN
+
+
TOP VIEW
SO
µMAX
EP
MAX13430E
MAX13431E
MAX13430E
MAX13431E
MAX13432E
MAX13433E
1VL10 VCC
2RO 9B
3DE 8A
4RE 7 N.C.
5DI 6 GND
+
1VL14 VCC
2RO 13 N.C.
3DE 12 A
4RE 11 B
5DI 10 Z
6GND 9Y
7N.C. 8 GND
1
VL
10
VCC
2
RO
9
B
3
DE
8
A
4
RE
7
N.C.
5
DI
6
GND
TDFN
+EP
MAX13432E
MAX13434E
1
VL
14
VCC
2
RO
13
N.C.
3
DE
12
A
4
RE
11
B
5
DI
10
Z
6
GND
9
Y
7
N.C.
8
GND
MAX13430E–MAX13433E
Maxim Integrated
11
RS-485 Transceivers with Low-Voltage
Logic Interface
Pin Description
PIN
MAX13430E/MAX13431E
µMAX TDFN
NAME FUNCTION
11V
LVL Input Logic-Supply Voltage. Bypass VL with a 0.1µF ceramic capacitor located as
close as possible to the input.
22RO
Receiver Output. When RE is low and if (A - B) ≥ -50mV, RO is high; if (A - B) ≤ -200mV,
RO is low.
33DE
Driver Output Enable. Drive DE high to enable driver outputs. These outputs are high
impedance when DE is low. Drive RE high and DE low to enter low-power shutdown
mode. DE is a hot-swap input (see the Hot-Swap Capability section for details.)
44RE
Active-Low Receiver Output Enable. Drive RE low to enable RO; RO is high impedance
when RE is high. Drive RE high and DE low to enter low-power shutdown mode. RE is a
hot-swap input (see the Hot-Swap Capability section for details.)
55DI
D r i ver Inp ut. W i th D E hi g h, a l ow on D I for ces noni nver ti ng outp ut l ow and i nver ti ng outp ut
hi g h. S i m i l ar l y, a hi g h on D I for ces noni nver ti ng outp ut hi g h and i nver ti ng outp ut l ow .
6 6 GND Ground
7 7 N.C. No Connection. Not internally connected. N.C. can be connected to GND.
8 8 A Noninverting Receiver Input and Noninverting Driver Output
9 9 B Inverting Receiver Input and Inverting Driver Output
10 10 VCC
VCC Input Supply Voltage. Bypass VCC with a 1µF ceramic capacitor located as close
as possible to the input for full ESD protection. If full ESD protection is not required,
bypass VCC with a 0.1µF ceramic capacitor.
— — EP Exposed Pad (TDFN Only). Connect EP to GND.
MAX13430E–MAX13433E
12
Maxim Integrated
RS-485 Transceivers with Low-Voltage
Logic Interface
PIN
MAX13432E/MAX13433E
SO TDFN
NAME FUNCTION
11V
LVL Input Logic Supply Voltage. Bypass VL with a 0.1µF ceramic capacitor located as
close as possible to the input.
22RO
Receiver Output. When RE is low and if (A - B) ≥ -50mV, RO is high; if (A - B) ≤ -200mV,
RO is low.
33DE
Driver Output Enable. Drive DE high to enable driver outputs. These outputs are high
impedance when DE is low. Drive RE high and DE low to enter low-power shutdown
mode. DE is a hot-swap input (see the Hot-Swap Capability section for details.)
44RE
Active-Low Receiver Output Enable. Drive RE low to enable RO; RO is high impedance
when RE is high. Drive RE high and DE low to enter low-power shutdown mode. RE is a
hot-swap input (see the Hot-Swap Capability section for details.)
55DI
D r i ver Inp ut. W i th D E hi g h, a l ow on D I for ces noni nver ti ng outp ut l ow and i nver ti ng outp ut
hi g h. S i m i l ar l y, a hi g h on D I for ces noni nver ti ng outp ut hi g h and i nver ti ng outp ut l ow .
6 6 GND Ground
7, 13 7, 13 N.C. No Connection. Not internally connected. N.C. can be connected to GND.
8 8 GND Ground
9 9 Y Noninverting Driver Output
10 10 Z Inverting Driver Output
11 11 B Inverting Receiver Input
12 12 A Noninverting Receiver Input
14 14 VCC
VCC Input Supply Voltage. Bypass VCC with a 1µF ceramic capacitor located as close
as possible to the input for full ESD protection. If full ESD protection is not required,
bypass VCC with a 0.1µF ceramic capacitor.
— — EP Exposed Pad (TDFN Only). Connect EP to GND.
Pin Description (continued)
MAX13430E–MAX13433E
Maxim Integrated
13
RS-485 Transceivers with Low-Voltage
Logic Interface
Function Tables and Functional Diagrams
TRANSMITTING
INPUTS OUTPUTS
RE DE DI Z Y
X11 0 1
X10 1 0
00XHigh-
Impedance
High-
Impedance
1 0 X Shutdown
RECEIVING
INPUTS OUTPUT
RE DE A-B RO
0X
≥ -50mV
1
0X
≤ - 200m V
0
0X
Open/
Shorted
1
1 1 X High-Impedance
1 0 X Shutdown
TRANSMITTING
INPUTS OUTPUTS
RE DE DI B A
X11 0 1
X10 1 0
10XHigh-
Impedance
High-
Impedance
0 0 X Shutdown*
RECEIVING
INPUTS OUTPUT
RE DE A-B RO
0X
≥ -50mV
1
0X
≤ - 200m V
0
0X
Open/
Shorted
1
1 1 X High-Impedance
1 0 X Shutdown*
MAX13432E/MAX13433E (Full Duplex) MAX13430E/MAX13431E (Half Duplex)
X = Don’t care.
*
Shutdown mode, driver and receiver outputs are in high impedance.
Figure 9. Functional Diagrams
A
B
Z
Y
GND
VCC
VL
DI
RE
DE
RO
A
B
GND
VCC
VL
MAX13430E
MAX13431E
MAX13432E
MAX13433E
DI
RE
DE
RO
D
RR
D
MAX13430E–MAX13433E
14
Maxim Integrated
RS-485 Transceivers with Low-Voltage
Logic Interface
Detailed Description
The MAX13430E–MAX13433E are full- and half-duplex
RS-485 transceivers that feature an adjustable low-
voltage logic interface for application in multivoltage
systems. This allows direct interfacing to low-
voltage ASIC/FPGAs without extra components. The
MAX13430E–MAX13433E RS-485 transceivers operate
with a VCC voltage supply from +3V to +5V. The low-
voltage logic interface operates with a voltage supply
from +1.62V to VCC.
The MAX13430E–MAX13433E are ±30kV ESD-protect-
ed RS-485 transceivers with one driver and one receiv-
er. All devices have a 1/8-unit load receiver input
impedance, allowing up to 256 transceivers on the bus.
These devices include fail-safe circuitry, guaranteeing
a logic-high receiver output when receiver inputs are
open or shorted. The receivers output a logic-high if all
transmitters on a terminated bus are disabled (high
impedance). All devices feature hot-swap capability to
eliminate false transitions on the bus during power-up
or hot insertion.
The MAX13430E/MAX13432E feature reduced slew-
rate drivers that minimize EMI and reduce reflections
caused by improperly terminated cables, allowing
error-free data transmission up to 500kbps. The
MAX13431E/MAX13433E driver slew rates are not limit-
ed, enabling data transmission up to 16Mbps.
The MAX13430E–MAX13433E transceivers draw 2mA
of supply current when unloaded or when fully loaded
with the drivers disabled. The MAX13430E/
MAX13431E are intended for half-duplex communica-
tions, and the MAX13432E/MAX13433E are intended
for full-duplex communications.
Low-Voltage Logic Interface
VLis the voltage supply for the low-voltage logic inter-
face and receiver output. VLoperates with voltage sup-
ply from +1.62V to VCC.
Fail Safe
The MAX13430E family guarantees a logic-high receiv-
er output when the receiver inputs are shorted or open,
or when they are connected to a terminated transmis-
sion line with all drivers disabled. This is done by set-
ting the receiver input threshold between -50mV and
-200mV. If the differential receiver input voltage (A - B)
is greater than or equal to -50mV, RO is logic-high.
If (A - B) is less than or equal to -200mV, RO is logic-
low. In the case of a terminated bus with all transmitters
disabled, the receiver’s differential input voltage is
pulled to 0V by the termination. With the receiver
thresholds of the MAX13430E family, this results in a
logic-high with a 50mV minimum noise margin. The
-50mV to -200mV threshold complies with the ±200mV
EIA/TIA/RS-485 standard.
Hot-Swap Capability
When circuit boards are inserted into a hot or powered
backplane, differential disturbances to the data bus can
lead to data errors. Upon initial circuit-board insertion,
the data communication processor undergoes its own
power-up sequence. During this period, the processor’s
logic-output drivers are high impedance and are unable
to drive the DE and RE inputs of these devices to a
defined logic level. Leakage currents up to ±10µA from
the high-impedance state of the processor’s logic drivers
could cause standard CMOS enable inputs of a trans-
ceiver to drift to an incorrect logic level. Additionally, par-
asitic circuit-board capacitance could cause coupling of
VLor GND to the enable inputs. Without the hot-swap
capability, these factors could improperly enable the
transceiver’s driver or receiver. When VLrises, an inter-
nal pulldown circuit holds DE low and RE high. After the
initial power-up sequence, the pulldown circuit becomes
transparent, resetting the hot-swap tolerable input.
±30kV ESD Protection
ESD-protection structures are incorporated on all pins
to protect against electrostatic discharges encoun-
tered during handling and assembly. The driver out-
puts and receiver inputs of the MAX13430E family of
devices have extra protection against static electricity.
Maxim’s engineers have developed state-of-the-
art structures to protect these pins against ESD of
±30kV without damage. The ESD structures withstand
high ESD in all states: normal operation, shutdown,
and powered down. After an ESD event, the
MAX13430E–MAX13433E keep working without latchup
or damage. ESD protection can be tested in various
ways. The transmitter outputs and receiver inputs of the
MAX13430E–MAX13433E are characterized for protec-
tion to the following limits:
• ±30kV using the Human Body Model
• ±10kV using the Contact Discharge method specified
in IEC 61000-4-2
• ±15kV using the Air Gap Discharge method specified
in IEC 61000-4-2
MAX13430E–MAX13433E
Maxim Integrated
15
RS-485 Transceivers with Low-Voltage
Logic Interface
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
Human Body Model
Figure 10a shows the Human Body Model, and Figure
10b shows the current waveform it generates when dis-
charged into a low impedance. This model consists of a
100pF capacitor charged to the ESD voltage of interest,
which is then discharged into the test device through a
1.5kΩresistor.
IEC 61000-4-2
The IEC 61000-4-2 standard covers ESD testing and
performance of finished equipment. However, it does
not specifically refer to integrated circuits. The
MAX13430E family of devices helps you design equip-
ment to meet IEC 61000-4-2, without the need for addi-
tional ESD-protection components.
The major difference between tests done using the
Human Body Model and IEC 61000-4-2 is higher peak
current in IEC 61000-4-2 because series resistance is
lower in the IEC 61000-4-2 model. Hence, the ESD with-
stand voltage measured to IEC 61000-4-2 is generally
lower than that measured using the Human Body
Model. Figure 10c shows the IEC 61000-4-2 model, and
Figure 10d shows the current waveform for IEC 61000-
4-2 ESD Contact Discharge test.
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
Cs
100pF
RC
1MΩ
RD
1500Ω
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
Figure 10a. Human Body ESD Test Model
IP 100%
90%
36.8%
tRL TIME
tDL
CURRENT WAVEFORM
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
Ir
10%
0
0
AMPS
Figure 10b. Human Body Current Waveform
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
Cs
150pF
RC
50MΩ TO 100MΩ
RD
330Ω
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
Figure 10c. IEC 61000-4-2 ESD Test Model
tr = 0.7ns TO 1ns 30ns
60ns
t
100%
90%
10%
I
PEAK
I
Figure 10d. IEC 61000-4-2 ESD Generator Current Waveform
MAX13430E–MAX13433E
16
Maxim Integrated
RS-485 Transceivers with Low-Voltage
Logic Interface
Applications Information
256 Transceivers on the Bus
The standard RS-485 receiver input impedance is a
one-unit load (12kΩ), and the standard driver can drive
up to 32 unit loads. The MAX13430E family of trans-
ceivers has a 1/8-unit load receiver input impedance
(96kΩ), allowing up to 256 transceivers to be connect-
ed in parallel on one communication line. Any combina-
tion of these devices, as well as other RS-485
transceivers with a total of 32-unit loads or less, can be
connected to the line.
Reduced EMI and Reflections
The MAX13430E/MAX13432E feature reduced slew-
rate drivers that minimize EMI and reduce reflections
caused by improperly terminated cables, allowing
error-free data transmission up to 500kbps.
Driver Output Protection
Two mechanisms prevent excessive output current and
power dissipation caused by faults or by bus con-
tention. The first, a foldback current limit on the output
stage, provides immediate protection against short cir-
cuits over the whole common-mode voltage range (see
the
Typical Operating Characteristics
.) The second, a
thermal-shutdown circuit, forces the driver outputs into
a high-impedance state if the die temperature exceeds
+150°C (typ).
Typical Applications
The MAX13430E/MAX13433E transceivers are
designed for bidirectional data communications on mul-
tipoint bus transmission lines. Figures 11 and 12 show
typical network applications circuits. To minimize reflec-
tions, terminate the line at both ends with its character-
istic impedance, and keep stub lengths off the main
line as short as possible. The slew-rate-limited
MAX13430E/MAX13432E allow the RS-485 network to
be more tolerant of imperfect termination.
MAX13430E–MAX13433E
Maxim Integrated
17
RS-485 Transceivers with Low-Voltage
Logic Interface
Figure 12. Typical Full-Duplex RS-485 Network
RO
DI
DE
R120Ω
D
MAX13432E
MAX13433E
RE
RO
DI
DE
R
D
RE
120Ω
120Ω
A
B
Z
Y
A
B
Z
Y
RO
DI DE
R
D
RE
YZBA
RO
DI DE
R
D
RE
YZBA
Typical Application Circuits
Figure 11. Typical Half-Duplex RS-485 Network
DI RO DE
A
B
RE
RO
RO
RO
DI
DI
DI
DE
DE
DE
DD
D
R
R
R
BB
B
AAA
120Ω120Ω
D
R
MAX13430E
MAX13431E
RERE
RE
MAX13430E–MAX13433E
18
Maxim Integrated
RS-485 Transceivers with Low-Voltage
Logic Interface
Chip Information
PROCESS: BiCMOS
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
10 µMAX U10-2 21-0061
14 TDFN-EP T1433-2 21-0137
10 TDFN-EP T1033-1 21-0137
14 SO S14-1 21-0041
Package Information
For the latest package outline information and land patterns,
go to www.maxim-ic.com/packages. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
MAX13430E–MAX13433E
Maxim Integrated
19
RS-485 Transceivers with Low-Voltage
Logic Interface
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 10/08 Initial release —
1 5/09 Updated Ordering Information 1
2 5/10 Added an automotive temperature grade part to the Ordering Information 1
MAX13430E–MAX13433E
20 Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
© 2010 Maxim Integrated The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc.