High Voltage,
Precision Difference Amplifier
Data Sheet
AD8208
Rev. C Document Feedback
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FEATURES
Qualified for automotive applications
EMI filters included
High common-mode voltage range
−2 V to +45 V operating
−24 V to +80 V survival
Buffered output voltage
Gain = 20 V/V
Low-pass filter (1-pole or 2-pole)
Wide operating temperature range
−40°C to +125°C for WB grade
−40°C to +150°C for WH grade
Excellent ac and dc performance
±1 mV voltage offset
−5 ppm/°C typical gain drift
80 dB CMRR minimum dc to 10 kHz
APPLICATIONS
High-side current sensing
Motor controls
Solenoid controls
Power management
Low-side current sensing
Diagnostic protection
FUNCTIONAL BLOCK DIAGRAM
08714-001
OUT
+IN
–IN
GND
V
S
+
–
AD8208
G = 2G = 10
A1 A2
+
–
EMI
FILTER
EMI
FILTER
EMI
FILTER
Figure 1.
GENERAL DESCRIPTION
The AD8208 is a single-supply difference amplifier ideal for
amplifying and low-pass filtering small differential voltages in the
presence of a large common-mode voltage. The input common-
mode voltage range extends from −2 V to +45 V at a single +5 V
supply. The AD8208 is qualified for automotive applications. The
amplifier offers enhanced input overvoltage and ESD protection,
and includes EMI filtering.
Automotive applications demand robust, precision components for
improved system control. The AD8208 provides excellent ac and
dc performance, minimizing errors in the application. Typical
offset and gain drift in both the SOIC and MSOP packages are
less than 5 µV/°C and 10 ppm/°C, respectively. The device also
delivers a minimum CMRR of 80 dB from dc to 10 kHz.
The AD8208 features an externally accessible 100 kΩ resistor at
the output of the preamplifier (A1), which can be used for low-
pass filtering and for establishing gains other than 20.
AD8208 Data Sheet
Rev. C | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ...................................................................... 11
Applications Information .............................................................. 12
High-Side Current Sensing with a Low-Side Switch ............. 12
High-Rail Current Sensing ....................................................... 12
Low-Side Current Sensing ........................................................ 12
Gain Adjustment ........................................................................ 13
Gain Trim .................................................................................... 13
Low-Pass Filtering ...................................................................... 14
High Line Current Sensing with LPF and Gain Adjustment 15
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 17
Automotive Products ................................................................. 17
REVISION HISTORY
12/13----- Rev. B to Rev. C
Changes to Table 1 ............................................................................ 3
Change to Table 2 ............................................................................. 5
Changes to Ordering Guide .......................................................... 17
2/13—Rev. A to Rev. B
Changes to Features .......................................................................... 1
Changes to Table 1 ............................................................................ 3
Changes to Table 4 ............................................................................ 4
Moved Ordering Guide .................................................................. 16
Changes to Ordering Guide .......................................................... 16
Added Automotive Products Section .......................................... 16
5/10—Rev. 0 to Rev. A
Added 8-Lead MSOP ........................................................ Universal
Changes to Features Section and General Description Section .. 1
Updated Outline Dimensions ....................................................... 15
Changes to Ordering Guide .......................................................... 15
1/10—Revision 0: Initial Version
Data Sheet AD8208
Rev. C | Page 3 of 20
SPECIFICATIONS
TOPR = −40°C to +125°C for AD8208WBR and AD8208WBRM grade, TOPR = −40°C to +150°C for AD8208WHR grade, TA = 25°C, VS =
5 V, R L = 25 kΩ (RL is the output load resistor), unless otherwise noted. Specifications applicable for both packages (SOIC and MSOP).
Table 1.
Parameter Test Conditions1 Min Typ Max Unit
SYSTEM GAIN
Initial 20 V/V
Error vs. Temperature 0.075 V ≤ VOUT ≤ (VS − 0.1 V), dc, TOPR ±0.3 %
Gain Drift TOPR 0 −20 ppm/°C
VOLTAGE OFFSET
Initial Input Offset (Referred to Input [RTI]) VCM = 0.15 V, TA ±2 mV
Input Offset (RTI) Over Temperature VCM = 0 V, TOPR ±4 mV
Voltage Offset vs. Temperature VCM = 0 V, TOPR −20 +20 µV/°C
INPUT
Input Impedance
Differential 360 400 440 kΩ
Common Mode
180
200
220
kΩ
VCM (Continuous) −2 +45 V
CMRR2 VCM = −2 V to +45 V, dc 80 100 dB
f = dc to 10 kHz,3 TOPR 80 dB
PREAMPLIFIER (A1)
Gain 10 V/V
Gain Error
0.05 V ≤ V
OUT
≤ (V
S
− 0.1 V), dc, T
OPR
−0.3
+0.3
%
Output Voltage Range AD8208WBR, AD8208WBRM 0.0375 VS − 0.1 V
AD8208WHR, AD8208WHRM 0.05 VS − 0.1 V
Output Resistance 97 100 103 kΩ
OUTPUT BUFFER (A2)
Gain 2 V/V
Gain Error 0.075 V ≤ VOUT ≤ (VS − 0.1 V), dc, TOPR −0.3 +0.3 %
Output Voltage Range4, 5 RL = 25 kΩ, differential Input (V) = 0 V, TOPR
Pin 3 (A1 output) driving Pin 4 (A2 input)
AD8208WBR, AD8208WBRM 0.075 VS − 0.1 V
AD8208WHR, AD8208WHRM 0.1 VS − 0.12 V
Output Voltage Range6 Pin 4 (A2 input) driven with external source
AD8208WBR, AD8208WBRM 0.075 VS − 0.1 V
AD8208WHR, AD8208WHRM 0.1 VS − 0.12 V
Input Bias Current
T
OPR
50
nA
Output Resistance RL = 1 kΩ, frequency = dc 2 Ω
DYNAMIC RESPONSE
System Bandwidth
V
IN
= 0.01 V p-p, V
OUT
= 0.14 V p-p
70
kHz
Slew Rate VIN = 0.28 V, VOUT = 4 V step 1 V/µs
NOISE
0.1 Hz to 10 Hz 20 µV p-p
Spectral Density, 1 kHz (RTI) 500 nV/√Hz
POWER SUPPLY
Operating Range 4.5 5.5 V
Quiescent Current Typical, TA 1.6 mA
Quiescent Current vs. Temperature VOUT = 0.1 V dc, VS = 5 V, TOPR
AD8208WBR, AD8208WBRM 2.7 mA
AD8208WHR, AD8208WHRM 3.0 mA
PSRR
V
S
= 4.5 V to 5.5 V, T
OPR
66
80
dB
AD8208 Data Sheet
Rev. C | Page 4 of 20
Parameter Test Conditions1 Min Typ Max Unit
TEMPERATURE RANGE For Specified Performance at TOPR
AD8208WBR, AD8208WBRM −40 +125 °C
AD8208WHR, AD8208WHRM −40 +150 °C
1 VCM = input common-mode voltage.
2 Source imbalance < 2 Ω.
3 The AD8208 preamplifier exceeds 80 dB CMRR at 10 kHz. However, because the output is available only by way of the 100 kΩ resistor, even a small amount of pin-to-
pin capacitance between the IN pins and the A1 and A2 pins might couple an input common-mode signal larger than the greatly attenuated preamplifier output. The
effect of pin-to-pin coupling can be negated in all applications by using a filter capacitor from Pin 3 to GND.
4 The output voltage range of the AD8208 varies depending on the load resistance and temperature. For additional information on this specification, see Figure 12 and Figure 13.
5 The output voltage range of A2 assumes that Pin 3 (A1 output) and Pin 4 (A2 Input) are shorted together. A 25 kΩ load resistor used for testing.
6 The output voltage range of A2 assumes Pin 4 (A2 Input) is driven with an external voltage source. A 25 kΩ load resistor was used for testing.
Data Sheet AD8208
Rev. C | Page 5 of 20
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage 12 V
Continuous Input Voltage (Common Mode) −24 V to +80 V
Differential Input Voltage ±12 V
Reversed Supply Voltage Protection 0.3 V
ESD Human Body Model ±4000 V
Operating Temperature Range
WBR and WBRM Grade −40°C to +125°C
WHR and WHRM Grade
−40°C to +150°C
Storage Temperature Range −65°C to +150°C
Output Short-Circuit Duration Indefinite
Lead Temperature Range (Soldering, 10 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
AD8208 Data Sheet
Rev. C | Page 6 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
–IN 1
GND 2
A1 3
A2 4
+IN
8
VS
7NC
6
OUT
5
NC = NO CONNECT
AD8208
TOP VIEW
(Not t o Scale)
08714-002
Figure 2. Pin Configuration
08714-003
1
2
3
4
5
6
8
Figure 3. Metallization Photograph
Table 3. Pin Function Descriptions
Coordinates
Pin No. Mnemonic X Y Description
1 −IN −322 +563 Inverting Input
2 GND −321 +208 Ground
3 A1 −321 −51 Preamplifier (A1) Output
4 A2 −321 −214 Buffer (A2) Input
5 OUT +321 −388 Buffer (A2) Output
6 VS +322 +363 Supply
7 NC No Connect
8 +IN +322 +561 Noninverting Input
Data Sheet AD8208
Rev. C | Page 7 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
TOPR = −40°C to +125°C, TA = 25°C, VS = 5 V, R L = 25 kΩ (RL is the output load resistor), unless otherwise noted.
–0.5
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
–40–30–20 –10 010 20 30 40 50 60 70 80 90 100 110120
TEMPERATURE (°C)
VOSI (mV)
08714-004
Figure 4. Typical Offset Drift vs. Temperature
GAIN (d B)
30
25
20
15
10
5
0
–10
–5
–15
–201k 10k 100k
FREQUENCY (Hz) 1M
08714-005
Figure 5. Typical Small-Signal Bandwidth
CMRR (dB)
120
110
100
90
80
70
60
50
4010 100 1k 10k 100k 1M
FREQUENCY (Hz)
08714-006
–40°C
+125°C
+25°C
Figure 6. Typical CMRR vs. Frequency
–1500
–1000
–500
0
500
1000
1500
–40 –25 –10 520 35 50 65 80 95 110 125
TEMPERATURE (°C)
GAIN ERRO R ( pp m)
08714-007
Figure 7. Typical Gain Error vs. Temperature
–0.03
0.02
0.07
0.12
0.17
0.22
0.27
0.32
0.37
0.42
0.47
–2 024681012 14 161820 22 242628 30 32 343638 40 4244
INPUT COMMON-MODE (V)
TOTAL INPUT BIAS CURRE NT (mA)
08714-008
Figure 8. Total Input Bias Current vs. Common-Mode Voltage,
with +IN and –IN Pins Connected (Shorted)
–35
–30
–25
–20
–15
–10
–5
0
5
00.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50
A2 INP UT VOLTAGE (V)
A2 INP UT BIAS CURRE NT (nA)
–40°C
+125°C
+25°C
08714-009
Figure 9. Input Bias Current of A2 vs. Input Voltage and Temperature
AD8208 Data Sheet
Rev. C | Page 8 of 20
5.0
5.5
6.0
6.5
7.0
7.5
8.0
8.5
9.0
9.5
10.0
10.5
11.0
–40 –30 –20 –10 02010 30 40 6050 70 80 90 110100 120 130
MAXIMUM OUT P UT SI NK CURRE NT (mA)
TEMPERATURE (°C)
08714-010
Figure 10. Maximum Output Sink Current vs. Temperature
4.0
4.3
4.6
4.9
5.2
5.5
5.8
6.1
–40 –20 020 40 60 80 100 120 140
MAXIMUM OUT P UT SO URCE CURRE NT (mA)
TEMPERATURE (°C)
08714-011
Figure 11. Maximum Output Source Current vs. Temperature
4.5
4.7
4.9
3.9
4.1
4.3
3.7
3.5
3.3
3.1
2.9
2.7
2.500.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0
OUTPUT S OURCE CURRE NT (mA)
OUTPUT VOLTAGE RANGE (V)
08714-012
–40°C +125°C
+25°C
Figure 12. Output Voltage Range of A2 vs. Output Source Current
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
00 1 2 3 4 5 6 7 8 9 10
OUTPUT S INK CURRENT (mA)
OUTPUT VOLTAGE RANGE (V)
08714-013
–40°C
+125°C
+25°C
Figure 13. Output Voltage Range from GND vs. Output Sink Current
08714-014
TIME (2µs/DIV)
100mV/DIV
1V/DIV
INPUT
OUTPUT
2
1
Figure 14. Rise Time
08714-015
TIME (2µs/DIV)
100mV/DIV
1V/DIV
INPUT
OUTPUT
2
1
Figure 15. Fall Time
Data Sheet AD8208
Rev. C | Page 9 of 20
08714-016
TIME (2µs/DIV)
200mV/DIV
2V/DIV
INPUT
OUTPUT
2
1
Figure 16. Differential Overload Recovery, Rising
08714-017
TIME (2µs/DIV)
200mV/DIV
2V/DIV
INPUT
OUTPUT
2
1
Figure 17. Differential Overload Recovery, Falling
08714-018
TIME ( 20µs/DIV)
0.01%/DIV
2V/DIV
2
1
Figure 18. Settling Time, Rising
08714-019
TIME ( 20µs/DIV)
0.01%/DIV
2V/DIV
2
1
Figure 19. Settling Time, Falling
–4 –3 –2 –1 01234
0
200
600
400
800
1000
1200
08714-020
V
OS
(mV)
COUNT
+125°C
+25°C
–40°C
Figure 20. Offset Distribution
COUNT
OFFSET DRIFT (µV/°C)
400
250
300
350
200
150
100
50
0
–20 –15 –10 –5 510 15 200
08714-021
Figure 21. Offset Drift Distribution
AD8208 Data Sheet
Rev. C | Page 10 of 20
COUNT
2400
2100
1800
1500
1200
900
600
300
0
–15 –10 –5 0
GAIN DRIFT (ppm/°C)
510 15
08714-022
Figure 22. Gain Drift Distribution
–0.3 –0.2 –0.1 0 0.1 0.2 0.3
0
900
600
300
1500
1200
1800
2100
2400
08714-037
GAIN ERROR (%)
COUNT
+125°C
+25°C
–40°C
Figure 23. Gain Error
Data Sheet AD8208
Rev. C | Page 11 of 20
THEORY OF OPERATION
The AD8208 is a single-supply difference amplifier typically used
to amplify a small differential voltage in the presence of rapidly
changing, high common-mode voltages.
The AD8208 consists of two amplifiers (A1 and A2), a resistor
network, a small voltage reference, and a bias circuit (not shown);
see Figure 24.
The set of input attenuators preceding A1 consists of RA, RB, and
RC, which feature a combined series resistance of approximately
400 kΩ ± 20%. The purpose of these resistors is to attenuate the
input voltage to match the input voltage range of A1. This balanced
resistor network attenuates the common-mode signal by a ratio
of 1/14. The A1 amplifier inputs are held within the power supply
range, even as Pin 1 and Pin 8 exceed the supply or fall below the
common (ground). A reference voltage of 350 mV biases the
attenuator above ground, allowing Amplifier A1 to operate in
the presence of negative common-mode voltages.
The input resistor network also attenuates normal (differential)
mode voltages. Therefore, A1 features a gain of 140 V/V to provide
a total system gain, from ±IN to the output of A1, equal to 10
V / V, as shown in the following equation:
Gain (A1) = 1/14 (V/V) × 140(V/V) = 10 V/V
A precision trimmed, 100 kΩ resistor is placed in series with the
output of Amplifier A1. The user has access to this resistor via
an external pin (A1). A low-pass filter can be easily implemented
by connecting A1 to A2 and placing a capacitor to ground (see
Figure 33).
The value of RF1 and RF2 is 10 kΩ, providing a gain of 2 V/V for
Amplifier A2. When connecting Pin A1 and Pin A2 together, the
AD8208 provides a total system gain equal to
Total Gain of (A1 + A2) (V/V) = 10 (V/V) × 2 (V/V) = 20 V/V
at the output of A2 (the OUT pin).
The ratios of RA, RB, RC, and RF are trimmed to a high level of
precision, allowing a typical CMRR value that exceeds 80 dB. This
performance is accomplished by laser trimming the resistor ratio
matching to better than 0.01%.
OUT
GND
V
S
R
C
R
F
–IN
350mV
+
–
R
B
R
B
R
A
R
A
R
C
R
F
R
G
R
FILTER
R
M
A1 A2
+IN A1 A2
+
–R
F1
R
F2
08714-023
Figure 24. Simplified Schematic
AD8208 Data Sheet
Rev. C | Page 12 of 20
APPLICATIONS INFORMATION
HIGH-SIDE CURRENT SENSING
WITH A LOW-SIDE SWITCH
In load control configurations for high-side current sensing with a
low-side switch, the PWM-controlled switch is ground referenced.
An inductive load (solenoid) connects to a power supply/battery.
A resistive shunt is placed between the switch and the load (see
Figure 25). An advantage of placing the shunt on the high side
is that the entire current, including the recirculation current, is
monitored because the shunt remains in the loop when the switch
is off. In addition, shorts to ground can be detected with the shunt
on the high side, enhancing the diagnostics of the control loop. In
this circuit configuration, when the switch is closed, the common-
mode voltage moves down to near the negative rail. When the
switch is opened, the voltage reversal across the inductive load
causes the common-mode voltage to be held one diode drop
above the battery by the clamp diode.
GND
NC
–IN
+IN
A1
V
S
A2
OUT
AD8208
5V
INDUCTIVE
LOAD
SWITCH
SHUNT
CLAMP
DIODE
BATTERY
NC = NO CONNECT
08714-024
CF
OUTPUT
+
–
Figure 25. Low-Side Switch
In cases where a high-side switch is used for PWM control of the
load current in an application, the AD8208 can be used as shown
in Figure 26. The recirculation current through the freewheeling
diode (clamp diode) is monitored through the shunt resistor. In
this configuration, the common-mode voltage in the application
drops below GND when the FET is switched off. The AD8208
operates down to −2 V, providing an accurate current measurement.
GND
NC
–IN
+IN
A1
V
S
A2
OUT
AD8208
5V
INDUCTIVE
LOAD
SWITCH
SHUNT
CLAMP
DIODE
BATTERY
NC = NO CONNECT
08714-025
C
F
OUTPUT
+
–
Figure 26. High-Side Switch
HIGH-RAIL CURRENT SENSING
In the high-rail current-sensing configuration, the shunt resistor is
referenced to the battery. High voltage is present at the inputs of
the current-sense amplifier. When the shunt is battery referenced,
the AD8208 produces a linear ground-referenced analog output.
Additionally, the AD8214 can be used to provide an overcurrent
detection signal in as little as 100 ns (see Figure 27). This feature is
useful in high current systems where fast shutdown in overcurrent
conditions is essential.
AD8214
INDUCTIVE
LOAD
SWITCH
CLAMP
DIODE
BATTERY
SHUNT
C
F
5V
–INNCGND
OVERCURRENT
DET E CTION (<100ns)
OUT
V
S
+INV
REG
NC
–IN
GND
A1
A2
+IN
V
S
NC
OUT
AD8208
1
2
3
4
8
7
6
5
8765
1234
+
–
08714-026
Figure 27. Battery-Referenced Shunt Resistor
LOW-SIDE CURRENT SENSING
In systems where low-side current sensing is preferable, the
AD8208 provides a simple, high accuracy, integrated solution. In
this configuration, the AD8208 rejects ground noise and offers
high input to output linearity, regardless of the differential input
voltage.
GND
NC
–IN
+IN
A1
V
S
A2
OUT
AD8208
5V
INDUCTIVE
LOAD
SWITCH
SHUNT
CLAMP
DIODE
BATTERY
NC = NO CONNECT
08714-027
C
F
OUTPUT
Figure 28. Ground-Referenced Shunt Resistor
Data Sheet AD8208
Rev. C | Page 13 of 20
4 mA to 20 mA Current Loop Receiver
The AD8208 can also be used in low current-sensing applica-
tions, such as the 4 mA to 20 mA current loop receiver shown
in Figure 29. In such applications, the relatively large shunt
resistor may degrade the common-mode rejection. Adding a
resistor of equal value on the low impedance side of the input
corrects this error.
GND
NC
–IN
+IN
A1
V
S
A2
OUT
AD8208
BATTERY
10Ω
1%
10Ω
1%
NC = NO CONNECT
08714-028
C
F
OUTPUT
5V
+
–
Figure 29. 4 mA to 20 mA Current Loop Receiver
GAIN ADJUSTMENT
The default gain of the preamplifier and buffer are 10 V/V and
2 V/V, respectively, resulting in a composite gain of 20 V/V. With
the addition of external resistor(s) or trimmer(s), the gain can
be lowered, raised, or finely calibrated.
Gains Less than 20
Because the preamplifier has an output resistance of 100 kΩ, an
external resistor connected from Pin 3 and Pin 4 to GND decreases
the gain by the following factor (see Figure 30):
REXT/(100 kΩ + REXT)
GND
NC
–IN
+IN
A1
VS
A2
OUT
AD8208
VDIFF
VCM
NC = NO CONNECT
08714-029
REXT
OUTPUT
GAIN = 20REXT
REXT + 100kΩ
5V
REXT = 100kΩ GAIN
20 – GAIN
+
–
+
–
Figure 30. Adjusting for Gains Less than 20
The overall bandwidth is unaffected by changes in gain by using
this method, although there may be a small offset voltage due to
the imbalance in source resistances at the input to the buffer. In
many cases, this can be ignored, but if desired, the offset voltage can
be nulled by inserting a resistor in series with Pin 4. The resistor
used should be equal to 100 kΩ minus the parallel sum of REXT
and 100 kΩ. For example, with REXT = 100 kΩ (yielding a composite
gain of 10 V/V), the optional offset nulling resistor is 50 kΩ.
Gains Greater than 20
Connecting a resistor from the output of the buffer amplifier to
its noninverting input, as shown in Figure 31, increases the gain.
The gain is now multiplied by the factor
REXT/(REXT − 100 kΩ)
For example, it is doubled for REXT = 200 kΩ. Overall gains as
high as 50 are achievable in this way. Note that the accuracy of
the gain becomes critically dependent on the resistor value at
high gains. In addition, the effective input offset voltage at Pin 1
and Pin 8 (which is about six times the actual offset of A1) limits
the use of the part in high gain, dc-coupled applications.
GND
NC
–IN
+IN
A1
V
S
A2
OUT
AD8208
V
DIFF
V
CM
NC = NO CONNECT
08714-030
R
EXT
OUTPUT
GAIN = 20R
EXT
R
EXT
– 100kΩ
5V
R
EXT
= 100k ΩGAIN
GAIN – 20
+
–
+
–
Figure 31. Adjusting for Gains Greater than 20
GAIN TRIM
Figure 32 shows a method for incremental gain trimming by
using a trim potentiometer and an external resistor, REXT.
The following approximation is useful for small gain ranges:
ΔG ≈ (10 MΩ ÷ REXT)%
For example, using this equation, the adjustment range is ±2%
for REXT = 5 MΩ and ±10% for REXT = 1 MΩ.
GND
NC
–IN
+IN
A1
V
S
A2
REXT
OUT
AD8208
5V
VDIFF
VCM
NC = NO CONNECT
08714-031
OUTPUT
GAIN TRIM
20kΩ MIN
+
–
+
–
Figure 32. Incremental Gain Trimming
AD8208 Data Sheet
Rev. C | Page 14 of 20
Internal Signal Overload Considerations
When configuring the gain for values other than 20, the maximum
input voltage with respect to the supply voltage and ground must
be considered because either the preamplifier or the output buffer
reaches its full-scale output (VS − 0.1 V) with large differential
input voltages. The input of the AD8208 is limited to (VS − 0.1) ÷
10 for overall gains of ≤10 because the preamplifier, with its
fixed gain of 10 V/V, reaches its full-scale output before the
output buffer. For gains greater than 10, the swing at the buffer
output reaches its full scale first and then limits the AD8208
input to (VS − 0.1) ÷ G, where G is the overall gain.
LOW-PASS FILTERING
In many transducer applications, it is necessary to filter the signal
to remove spurious high frequency components, including noise,
or to extract the mean value of a fluctuating signal with a peak-
to-average ratio (PAR) greater than unity. For example, a full-wave
rectified sinusoid has a PAR of 1.57, a raised cosine has a PAR
of 2, and a half-wave sinusoid has a PAR of 3.14. Signals with
large spikes may have PARs of 10 or more.
When implementing a filter, the PAR should be considered so
that the output of the AD8208 preamplifier (A1) does not clip
before A2; otherwise, the nonlinearity would be averaged and
appear as an error at the output. To avoid this error, both amplifiers
should clip at the same time. This condition is achieved when the
PAR is no greater than the gain of the second amplifier (2 for
the default configuration). For example, if a PAR of 5 is expected,
the gain of A2 should be increased to 5.
Low-pass filters can be implemented in several ways by using
the features provided by the AD8208. In the simplest case, a
single-pole filter (20 dB/decade) is formed when the output
of A1 is connected to the input of A2 via the internal 100 kΩ
resistor by tying Pin 3 to Pin 4 and adding a capacitor from this
node to ground, as shown in Figure 33. If a resistor is added
across the capacitor to lower the gain, the corner frequency
increases; therefore, gain should be calculated using the parallel
sum of the resistor and 100 kΩ.
GND
NC
–IN
+IN
A1
V
S
A2
OUT
AD8208
V
DIFF
V
CM
C
F
NC = NO CONNECT
08714-032
OUTPUT
f
C
= 1
2πC10
5
C IN FARADS
5V
+
–
+
–
Figure 33. Single-Pole, Low-Pass Filter Using the Internal 100 kΩ Resistor
If the gain is raised using a resistor, as shown in Figure 31, the
corner frequency is lowered by the same factor as the gain is raised.
Therefore, using a resistor of 200 kΩ (for which the gain would
be doubled), results in a corner frequency scaled to 0.796 Hz µF
(0.039 µF for a 20 Hz corner frequency).
GND
NC
–IN
+IN
A1
V
S
A2
OUT
AD8208
5V
V
DIFF
V
CM
C
C
NC = NO CONNECT
08714-033
OUTPUT
f
C
(Hz) = 1/C(µF)
255kΩ
+
–
+
–
Figure 34. Two-Pole, Low-Pass Filter
A two-pole filter with a roll-off of 40 dB/decade can be
implemented using the connections shown in Figure 34. This
configuration is a Sallen-Key form based on a ×2 amplifier. It is
useful to remember that a two-pole filter with a corner frequency
of f2 and a single-pole filter with a corner frequency of f1 have
the same attenuation, that is, 40 log (f2/f1), as shown in Figure 35.
Using the standard resistor value shown in Figure 34 and capacitors
of equal values, the corner frequency is conveniently scaled to
1 Hz µF (0.05 µF for a 20 Hz corner frequency). A maximal flat
response occurs when the resistor is lowered to 196 kΩ, scaling
the corner frequency to 1.145 Hz µF. The output offset is raised
by approximately 5 mV (equivalent to 250 µV at the input pins).
40log (f
2
/f
1
)
f
1
ATTENUATION
f
2
f
22
/f
1
FREQUENCY
A 1-POLE FILTE R, CO RNE R f
1
,AND
A 2-POLE FILTE R, CO RNE R f
2
, HAVE
THE SAME ATTENUATION –40log (f
2
/f
1
)
AT FRE QUENCY f
22
/f
1
20dB/DECADE
40dB/DECADE
08714-034
Figure 35. Comparative Responses of Single-Pole and Two-Pole Low-Pass Filters
Data Sheet AD8208
Rev. C | Page 15 of 20
HIGH LINE CURRENT SENSING
WITH LPF AND GAIN ADJUSTMENT
The circuit shown in Figure 36 is similar to Figure 25, but
includes gain adjustment and low-pass filtering.
GND
NC
–IN
+IN
A1
V
S
A2
OUT
AD8208
INDUCTIVE
LOAD
SWITCH
SHUNT
CLAMP
DIODE
BATTERY
NC = NO CONNECT
08714-035
C
OUTPUT
4V/AMP
5% CALI BRATION RANGE
fC(Hz) = 0.767Hz/ C(µF)
(0.22µF FOR fC = 3.6Hz)
VOS/IB
NULL
191kΩ
20kΩ
5V
+
–
Figure 36. High Line Current-Sensor Interface;
Gain = 40 V/V, Single-Pole, Low-Pass Filter
A power device that is either on or off controls the current in
the load. The average current is proportional to the duty cycle
of the input pulse and is sensed by a small-value resistor. The
average differential voltage across the shunt is typically 100 mV,
although its peak value is higher by an amount that depends on the
inductance of the load and the control frequency. The common-
mode voltage, on the other hand, extends from roughly 1 V above
ground for the on condition to about 1.5 V above the battery
voltage in the off condition. The conduction of the clamping
diode regulates the common-mode potential applied to the device.
For example, a battery spike of 20 V may result in an applied
common-mode potential of 21.5 V to the input of the devices.
To produce a full-scale output of 4 V, a gain of 40 V/V is used,
adjustable by ±5% to absorb the tolerance in the shunt. There is
sufficient headroom to allow 10% overrange (to 4.4 V). The
roughly triangular voltage across the sense resistor is averaged
by a single-pole, low-pass filter that is set with a corner frequency
of 3.6 Hz, which provides about 30 dB of attenuation at 100 Hz.
A higher rate of attenuation can be obtained by using a two-pole
filter with a corner frequency of 20 Hz, as shown in Figure 37.
Although this circuit uses two separate capacitors, the total capaci-
tance is less than half of what is needed for the single-pole filter.
GND
NC
–IN
+IN
A1
V
S
A2
OUT
AD8208
INDUCTIVE
LOAD
SWITCH
SHUNT
CLAMP
DIODE
BATTERY
NC = NO CONNECT
08714-036
C
OUTPUT
f
C(Hz) = 1/C(µF)
(0.05µF FOR
f
C = 20Hz)
127kΩ
432kΩ
C
50kΩ
5V
+
–
Figure 37. Two-Pole Low-Pass Filter
AD8208 Data Sheet
Rev. C | Page 16 of 20
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMP
LIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
8 5
5.00(0.1968)
4.80(0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 38. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
COMPLIANT TO JEDEC STANDARDS MO-187-AA
6°
0°
0.80
0.55
0.40
4
8
1
5
0.65 BSC
0.40
0.25
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
Figure 39. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Data Sheet AD8208
Rev. C | Page 17 of 20
ORDERING GUIDE
Model
1, 2
Temperature Range
Package Description
Package Option
Branding
AD8208WBRZ −40°C to +125°C 8-Lead SOIC_N R-8
AD8208WBRZ-R7 −40°C to +125°C 8-Lead SOIC_N, 7” Tape and Reel R-8
AD8208WBRZ-RL −40°C to +125°C 8-Lead SOIC_N, 13” Tape and Reel R-8
AD8208WBRMZ
−40°C to +125°C
8-Lead Mini Small Outline Package [MSOP]
RM-8
Y2F
AD8208WBRMZ-R7
−40°C to +125°C
8-Lead Mini Small Outline Package [MSOP],
7” Tape and Reel
RM-8
Y2F
AD8208WBRMZ-RL −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP],
13” Tape and Reel
RM-8 Y2F
AD8208WHRZ −40°C to +150°C 8-Lead SOIC_N R-8
AD8208WHRZ-RL −40°C to +150°C 8-Lead SOIC_N, 13” Tape and Reel R-8
AD8208WHRMZ
−40°C to +150°C
8-Lead Mini Small Outline Package [MSOP]
RM-8
Y52
AD8208WHRMZ-RL
−40°C to +150°C
8-Lead Mini Small Outline Package [MSOP],
13” Tape and Reel
RM-8
Y52
1 Z = RoHS Compliant Part.
2 W = Qualified for Automotive Applications.
AUTOMOTIVE PRODUCTS
The AD8208W models are available with controlled manufacturing to support the quality and reliability requirements of automotive
applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers
should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in
automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to
obtain the specific Automotive Reliability reports for these models.
AD8208 Data Sheet
Rev. C | Page 18 of 20
NOTES
Data Sheet AD8208
Rev. C | Page 19 of 20
NOTES
