AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 9 - 2 1 of 15
www.diodes.com April 2011
© Diodes Incorporated
Description
The AP7173 is a 1.5A lo w-dropout (LDO) lin ear regulator tha t
features a user-programmab le soft-start, an enable input and
a power-good output.
The soft-start reduces inrush current of the load capacitors
and minimizes stress on the input power source during start-
up. The enable input and power-good output allow users to
configure power management solutions that can meet the
sequencing requirements of FPGAs, DSPs, and other
applications with different start-up and power-down
requirements.
The AP7173 is stable with any type of output capacitor of
2.2µF or more. A precision reference and feedback control
deliver 2% accuracy over load, line, and operating
temperature ranges. The AP7173 is available in both
DFN3030-10 and SO-8EP packages.
Pin Assignments
Features
● Low VIN and wide VIN range: 1.0V to 5.5V
● Bias voltage (VVCC) range: 2.7V to 5.5V
● Low VOUT range: 0.8V to 3.3V
● Low dropout: 165mV typical at 1.5A, VVCC = 5V
● 2% accuracy over line, load and temperature range
● Power-Good (PG) output for supply monitoring and for
sequencing of other suppli es
● Programmable soft-start provides linear vo ltage startup
● Bias supply permits low VIN operation with good trans ient
response
● Stable with any output capacitor ≥ 2.2µF
● DFN3030-10 and SO-8EP: availabl e in “Green” molding
compound (No Br, Sb)
● Lead-free finish/ RoHS Compliant (N ote 1)
Applications
• PCs, Servers, Modems, and Set-Top-Boxes
• FPGA Applications
• DSP Core and I/O Voltages
• Post-Regulation Applications
• Applications With Sequencing Requirements
Note: 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at
http://www.diodes.com/products/lead_free.html.
Typical Application Circuit
EN
PG
VCC
IN OUT
FB
SS
GND
AP7173
R1
R2
R3
C1
C2
C3
VOUT
VIN
VVCC
CSS
Figure 1. Typical Application Circuit (Adjustable Output)
( Top View )
FB
EN
IN
GND
OUT
PG
VCC
IN
SS
OUT
DFN3030-10
1
2
3
4
5
9
10
8
7
6
SO-8EP
SSVCC
EN
IN
FB
GND
OUT
(Top View)
PG
1
2
3
45
6
7
8
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 9 - 2 2 of 15
www.diodes.com April 2011
© Diodes Incorporated
Typical Application Circuit (Continued)
Table 1. Resistor Values for Prog rammin g the Output Voltage (Note 2)
R1 (kΩ) R2 (kΩ) VOUT (V)
Short Open 0.8
0.619 4.99 0.9
1.13 4.53 1
1.37 4.42 1.05
1.87 4.99 1.1
2.49 4.99 1.2
4.12 4.75 1.5
3.57 2.87 1.8
3.57 1.69 2.5
3.57 1.15 3.3
Note: 2 VOUT = 0.8 x (1 + R1 / R2)
Table 2. Capacitor Values for Programming the Soft-Start Time(Note 3)
CSS SOFT-START TIME
Open 0.1ms
270pF 0.5ms
560pF 1ms
2.7nF 5ms
5.6nF 10ms
0.01μF 18ms
Note: 3. tSS(s) = 0.8 x CSS(F) / (4.4 x 10–7)
Figure 2. Turn-On Response
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 9 - 2 3 of 15
www.diodes.com April 2011
© Diodes Incorporated
Pin Descriptions
Pin Name PIN # Description
SO-8EP DFN3030-10
IN 1 1, 2 Power Input pin.
PG 2 3
Power-Good pin, open-drain output. When the VOUT is below the
PG threshold the PG pin is driven low; when the VOUT exceeds the
threshold, the PG pin goes into a high-impe dance state. To use the PG
pin, use a 10kΩ to 1MΩ pull-up resistor to pull it up to a su pply of up to
5.5V, which can be higher than the input voltage.
VCC 3 4
Bias Input pin, provides input voltage for internal co ntrol circuitry. This
voltage should be higher than the VIN.
EN 4 5
Enable pin. This pin shoul d be driven either high or low and must not
be floating. Driving this pin high enables the regulator, while pulling it
low puts the regulator into shutdown mode.
GND 5 6 Ground.
SS 6 7
Soft-Start pin. Connect a capacitor between this pin and the ground to
set the soft-start ramp time of the output voltage. If no capacitor is
connected, the soft-start time is typically 100µS.
FB 7 8
Feedback pin. Connect this pin to an e xterna l voltage divider to set the
output voltage.
OUT 8 9, 10 Regulated Output pin.
Thermal Pad — — Solder this pad to large ground plane for increased thermal
performance.
Functional Block Diagram
Gate
Driver
Current Limit and
Thermal Shutdown
0.8V
0.72V
OUT
SS
FB
GND
IN
VCC
PG
EN
+
-
+
-
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 9 - 2 4 of 15
www.diodes.com April 2011
© Diodes Incorporated
Absolute Maximum Ratings (Note 4)
S
y
mbol Paramete
r
Ratin
g
s Unit
ESD HBM Human Body Model ESD Protection 4000 V
ESD MM Machine Model ESD Protection 350 V
VIN, VVCC Input Voltage Range -0.3 to +6 V
VEN Enable Voltage Range -0.3 to +6 V
VPG Power-Good Voltage Range -0.3 to +6 V
VSS Soft-Start Voltage Range -0.3 to +6 V
VFB Feedback Voltage Ran ge -0.3 to +6 V
VOUT Output Voltage Range -0.3 to VIN +0.3 V
IOUT Maximum Output Current Internally Limited
PD Continuous Total Power
Dissipation (Note 5) DFN3030-10 3690
mW
SO-8EP 5650
TJ Junction Temperature Range -40 to +150 ºC
TST Storage Junction Temperatur e Range -65 to +150 ºC
Notes: 4. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these conditions is not implied. Exposure to absolute-max imum-rated conditions for extended periods
may affect device reliability.
5. Ratings apply to ambient temperature at 25°C . The JEDEC High-K board design used to derive this data was a 2 inch x 2 inch multilayer board
with 1-ounce internal power and ground planes and 2-ounce copper traces on the top and bottom of the board.
Recommended Operating Conditions
Symbol Parameter Min Max Unit
VIN Input Voltage (Note 6) 1.0 5.5 V
VVCC Bias Voltage 2.7 5.5 V
IOUT Output Current 0 1.5 A
TA Operating Ambient Temperature -40 85 ºC
Note: 6. At VIN =1V, the maximum load currents may be lower than 1.5A.
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 9 - 2 5 of 15
www.diodes.com April 2011
© Diodes Incorporated
Electrical Characteristics
At VEN = 1.1V, VIN = VOUT + 0.5V, CVCC = 0.1uF, CIN = COUT = 10uF, IOUT = 50mA, VVCC = 5.0V, and TA = –40°C to +85°C,
unless otherwise noted. Typical values are at TA = +25°C.
Symbol Parameter Test Conditions Min Typ. Max Unit
VIN Input Voltage Range VOUT + VDO 5.5 V
VVCC Bias Pin Voltage Range
(Note 7) 2.7 5.5 V
VREF Internal Reference
(Adj.) TA = +25 ºC 0.792 0.8 0.808 V
VOUT Output Voltage Range VIN= 5V, IOUT= 1.5A 0.8 3.3 V
Accuracy (Note 8) 2.97V≤VVCC≤5.5V,
50mA≤IOUT≤1.5A –2 ±0.5 2 %
ΔVOUT /ΔVIN /
VOUT Line Regulation VOUT (NOM) + 0.5≤VIN, 5.5V 0.03 %/V
ΔVOUT /VOUT
/ΔIOUT Load Regulation 50mA≤IOUT≤1.5A 0.09 %/A
VDO Dropout Voltage
(Note 9) IOUT = 1.5A,VVCC–VOUT(NOM)≥3.25V 165 270 mV
IOUT= 1.5A, VIN = VVCC 1.5 1.7 V
ICL Current Limit VOUT = 80% x VOUT
(
NOM
)
2 3 4 A
ISHORT Short-Circuit Current VOUT < 0.2V 0.6 1 A
IVCC Bias Pin Current 1 2 mA
ISHDN Shutdown Supply
Current (IGND) VEN≤0.4V 1 50 µA
IFB Feedback Pin Current –1 0.1 1 µA
PSRR
Power-Supply Rejection
(VIN to VOUT)
1KHz, IOUT= 1A,
VIN= 1.8V, VOUT= 1.5V 60
dB
300KHz, IOUT =1A,
VIN= 1.8V, VOUT =1.5V 30
Power-SupplyRejection
(VVCC to VOUT)
1KHz, IOUT = 1A,
VIN= 1.8V, VOUT =1.5V 50
dB
300KHz, IOUT = 1A,
VIN= 1.8V, VOUT =1.5V 30
TST Startup Time RLOAD for IOUT = 1.0A, CSS = open 100 µS
ISS Soft-Start Charging
Current VSS= 0.4V 440 nA
VEN, HI Enable Input High Level 1.1 5.5 V
VEN, LO Enable Input Low Level 0 0.4 V
VEN, HYS Enable Pin Hysteresis 50 mV
IEN Enable Pin Current VEN= 5V 0.1 1 µA
VPG, TH PG Trip Thre shol d VOUT decreasing 85 90 94 %VOUT
VPG, HYS PG Trip Hysteresis 3 %VOUT
VPG, LO PG Output Low Voltage IPG= 1mA (sinking), VOUT<VPG, TH 0.3 V
IPG, LKG PG Leakage Current VPG= 5.25V, VOUT>VPG, TH 0.1 1 µA
TSD Thermal Shutdown
Temperature Shutdown, temperature increa s ing +150 ºC
Reset, temperature decreasing +130
θJA Thermal Resistance
Junction-to-Ambient DFN3030-10 (Note 10) 35
oC/W
SO-8EP (Note 11) 23
θJC Thermal Resistance
Junction-to-Case DFN3030-10 (Note 10) 4.9 oC/W
SO-8EP (Note 11) 1.8
Notes: 7. VVCC should be higher or equal to VIN in this chip.
8. Tested at 0.8V; resistor tolerance is not taken into account.
9. Dropout is defined as the voltage from VIN to VOUT when VOUT is 3% below nominal.
10. Test condition for DFN3030-10: Device mounted on FR-4 substrate (2s2p), 2"*2" PCB, with 2oz copper trace thickness and large pad pattern.
11. Test condition for SOP-8L-EP: Device mounted on FR-4 substrate (2s2p), 2"*2" PCB, with 2oz copper trace thickness and large pad pattern.
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 9 - 2 6 of 15
www.diodes.com April 2011
© Diodes Incorporated
Typical Characteristics
At TA = +25℃, VIN = VOUT(TYP) + 0.3V, VVCC = 5V, IOUT = 50mA, VEN = VIN, CIN = 1µF, CVCC = 4.7µF, and COUT = 10µF, unless otherwise noted.
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
-0.20
-0.15
-0.10
-0.05
0.00
0.05
0.10
0.15
0.20
change in Vout(%)
Vin-Vout(V)
-40oC
25oC125oC
Figure. 3 VIN Line Regulation
0.51.01.52.02.53.03.54.0
-0.5
-0.4
-0.3
-0.2
-0.1
0.0
0.1
0.2
0.3
0.4
0.5
Vout(V)
Vvcc-Vout(V)
-40oC
25oC125oC
Figure. 4 V
V
CC Line Regulation
Figure. 5 Load Regulation
50 200 350 500 650 800 950 1100 1250 1400
-1.0
-0.8
-0.6
-0.4
-0.2
0.0
0.2
0.4
0.6
0.8
1.0
Change Vout(%)
Iout(mA) 1500
-40oC
25oC
125oC
Figure .6 Load Regulation
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5
0
20
40
60
80
100
120
140
160
180
200
220
240
-40oC
25oC
125oC
VDropout(Vin-Vout)(V)
Iout(mA)
Figure. 7 VIN Dropout Voltage vs.
IOUT and Temperature (T
A
)
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
0
20
40
60
80
100
120
140
160
180
200
220
240
260
280
300
VDropout(Vin-Vout)(mV)
Vvcc-Vout(V)
Iout=1.5A
-40oC
25oC
125oC
Figure. 8 VIN Dropout Voltage vs.
(VVCC-VOUT) and Temperature (TA)
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 9 - 2 7 of 15
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© Diodes Incorporated
Typical Characteristics (Continued)
At TA = +25°C, VIN = VOUT(TYP) + 0.3V, VVCC = 5V, IOUT = 50mA, VEN = VIN, CIN = 1µF, CVCC = 4.7µF, and COUT = 10µF, unless otherwise noted.
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
0
20
40
60
80
100
120
140
160
180
200
VDropout(Vin-Vout)(mV)
Vvcc-Vout
Iout=0.5A
-40oC
25oC125oC
Figure. 9 VIN Dropout Voltage vs.
(V
V
CC-VOUT) and Temperature (T
A
)
0.00 0.25 0.50 0.75 1.00 1.25 1.50
600
800
1000
1200
1400
1600
1800
2000
VDropout(Vvcc-Vout)(mV)
Iout(A)
-40oC
25oC
125oC
Figure. 10 VVCC Dropout Voltage vs.
IOUT and Temperature (TA)
10 100 1000 10000 100000
0
10
20
30
40
50
60
70
80
90
Power Supply Reject i on Ratio(dB)
Frequency(Hz)
Vin=1.8V
Vout=1.2V
Vvcc=5V
Css=1nF
500000
Io=0.1A
Io=1.5A
Figure. 11 VIN PSRR vs. Frequency
10 100 1000 10000 100000 1000000 1E7
0
10
20
30
40
50
60
70
80
90
Power Supply Rejection Ratio(dB)
Frequency(Hz)
Vin=1.8V
Vout=1.2V
Vvcc=5V
Css=1nF
Io=0.1A
Io=1.5A
Figure. 12 VVCC PSRR vs. Frequency
0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50
0
10
20
30
40
50
60
70
80
90
Power Supply Rejection Ratio(dB)
Vin-Vout(V)
1KHz
10KHz
100KHz
500KHz
Vout=1.2V
Iout=1.5A
Css=1nF
Figure. 13 VIN PSRR vs. (VIN-VOUT)
024681012
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
VoL Low-Level PG Voltage(V)
PG Current(mA)
Figure. 14 Low-Level PG Voltage vs Current
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 9 - 2 8 of 15
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© Diodes Incorporated
Typical Characteristics (Continued)
At TA = +25°C, VIN = VOUT(TYP) + 0.3V, VVCC = 5V, IOUT = 50mA, VEN = VIN, CIN = 1µF, CVCC = 4.7µF, and COUT = 10µF, unless otherwise noted.
Figure. 15 VIN Line Transient Figure. 16 V
V
CC Line Transient
Figure. 17 Output Load Transient Figure. 18 Turn-On Response
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Ivcc(mA)
Iout(A)
-40oC
25oC125oC
Figure. 19 VCC Pin Current vs. IOUT and Temperature
2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Ivcc(mA)
Vvcc(V)
-40oC
25oC125oC
Figure. 20 VCC Pin Current vs. V
V
CC and Temperature
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 9 - 2 9 of 15
www.diodes.com April 2011
© Diodes Incorporated
Typical Characteristics (Continued)
At TA = +25°C, VIN = VOUT(TYP) + 0.3V, VVCC = 5V, IOUT = 50mA, VEN = VIN, CIN = 1µF, CVCC = 4.7µF, and COUT = 10µF, unless otherwise noted.
0.00 0.25 0.50 0.75 1.00 1.25 1.50
0.75
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
1.25
Quiescent Current( IG N D) (mA)
Iout(A)
Vout=1.2V
pg
Vin=1.8V
Vin=2.5V
Figure. 21 Quiescent Current vs. IOUT
2.50 2.75 3.00 3.25 3.50
0.50
0.75
1.00
1.25
1.50
Quiescent Current(mA)
Vvcc(V)
Vin=1.8V
Vout=1.2V
Io=0A
Io=0.5A
Io=1.5A
Figure 22. Quiescent Current vs. VVCC
-50-250 255075100125
0.50
0.75
1.00
1.25
1.50
Quiescent Current(mA)
Temperature(oC)
Vin=1.8V
Vout=1.2V
Vvcc=3.3V
Vvcc=5V
Figure. 23 Quiescent Current vs. Temperature
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
Current limit(A)
Vvcc-Vout(V)
-40oC
25oC
125oC
Figure. 24 Current Limit vs. (VVCC-VOUT)
-50-250 255075100125
300
325
350
375
400
425
450
475
500
Iss(nA)
Temperature(oC)
Figure. 25 Soft-Start Charging Current (ISS) vs.
Temperature
Figure. 26 Power-Up/Power-Down
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 9 - 2 10 of 15
www.diodes.com April 2011
© Diodes Incorporated
Application Notes
BIAS VOLTAGE VVCC
The AP7173 is a low VIN, low dropout regulator that uses
an NMOS pass FET. The VCC pin must be connected to a
DC bias supply VVCC for the internal control circuitry and
the gate drive of the pass FET to function properly and to
obtain low dropout. The VVCC needs to be equal to or
higher than the VIN and in the range of 2.7V-5.5V. Figure
27 illustrates the typical applic ation circuit for the AP7173.
Figure 27. Typical Application Circuit for AP7173
ADJUSTABLE OUTPUT VOLTAGE
With an external voltage divider, the AP7173 can provide
output voltage from 0.8V to 3.3V. R1 and R2 can be
calculated for any output voltage using the following
equation, where VREF=0.8 is the AP7173’s internal
reference voltage. Refer to Table 1 for resistor
combinations for commonly used output voltages. For
maximum voltage accuracy, R2 should be ≤ 5kΩ.
VOUT = VREF x (1 + R1/R2)
INPUT VIN AND BIAS VVCC CAPACITORS
It is important to keep the IN and VCC pins clear of large
ripples, glitches and other noises by connecting capacitors
to the IN and VCC pins. T he required c ap acit ance on thes e
pins is strongly dependent on source and wiring
impedance of the supplies.
To provide good decouplin g for the input power supply VIN,
it is recommended that a ceramic capacitor with
capacitance of at least 1μF is connected between the IN
and GND pins at a location as close to them as possible.
High quality, low ESR capacitors should be used for better
performance.
It is critical to provide good decoupling to the VCC pin for
the AP7173’s internal control circuitry to function properly.
The minimum recommended capacitance for the VVCC is
1μF when the VVCC and VIN are separate supplies. If the VIN
and VVCC are connected to the same supply, the
recommended minimum capacitance for VVCC is 4.7μF.
Again good qualit y, low ESR capacitors should be used for
optimum performance.
OUTPUT CAPACITO R
The output capacitor affects the stability and transient
response of the LDO. The AP7173 is d esigned to be stabl e
for all types of output capac itors ≥ 2.2μF, single or multiple
in parallel.
Using high quality, low ESR capacitors and placing them
close to the OUT and GND pins can improve perfomance.
DROPOUT VOLTAGE
The very low dropout makes the AP7173 well suited for
high-current, low VIN/low VOUT applications. To achi eve the
specified low-dropout performance for such applications,
the VCC pin should be connected to a separate supply of
at least 3.25V higher than VOUT. Figure 28 shows an
application circuit where VVCC is 5V and VOUT is 1.2V.
Figure. 28 Typical Application Circuit for AP7173
Using Separate VCC and IN Rails
For applications where low dropout is not required or a
separate VVCC supply is not available, the IN and VCC pins
can be tied together. In this situation, a voltage difference
of at least 1.7V between the VVCC and VOUT has to be
maintained for the VVCC to provide enough gate drive to
the pass FET. Therefore, the VOUT needs to be 1.7V or
more below VIN, as shown in Figure 29.
Figure. 29 Typical Application Circuit for AP7173
Without an Auxiliary VCC Rail
PROGRAMMABLE SOFT-START
The AP7173 features a voltage-controlled soft-start that is
programmable with an external capacitor (CSS). The
AP7173 achieves a monotonic soft-start by tracking the
voltage ramp of the external soft-start capacitor until the
ramp voltage reaches the internal reference voltage.
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 9 - 2 1 of 15
www.diodes.com April 2011
© Diodes Incorporated
Application Notes (Continued)
PROGRAMMABLE SOFT-START (cont.)
The relationship between the soft-start time and the soft-
start charging current (ISS), soft-start capacitance (CSS),
and the internal reference voltage (VREF) is
tSS = (VREF x CSS) / ISS
Refer to Table 2 for suggested soft-start capacitor values
ENABLE/SHUTDOWN
The EN pin can be used with standard digital signals or
relatively slow-ramping analog signals. Pulling the VEN
below 0.4V turns the regulator off, while driving the VEN
above 1.1V turns the regulator on. Figure 30 shows an
example where an RC circuit is used to delay start the
AP7173.
If not used, the EN pin can be conn ected to the VCC or IN
pin when the VIN is greater than 1.1V, as long as good
decoupling measures ar e taken for the EN pin.
Figure 30. Delayed Start Using an RC
Circuit to Enable AP7173
POWER-GOOD
The power-good (PG) pin is an open-drain o utput and can
be pulled up through a resistor of 10kΩ to1MΩ to VIN, VOUT
or any other rail that is 5.5V or lower. When the VOUT ≥
VPG,TH+VPG,HYS, the PG output is high-impedance; if the
VOUT drops to below VPG,TH, VVCC ≤ 1.9V or the device is
disabled, the PG pin is pulled to low by an internal
MOSFET.
OVER-CURRENT AND SHORT-CIRCUIT
PROTECTION
The AP7173 features a factory-trimmed, temperature and
supply voltage compensated internal current limit and an
over-current protection circuitry to protect the device
against overload conditions. It limits the device current to
a typical value of 3A an d reduces the VOUT when the load
tries to pull more current.
For more effective protection against short-circuit failure,
the AP7173 also includes a short-circuit foldback
mechanism that lowers the current limit to a t ypical value
of 1.0A when the VFB drops to below 0.2V.
THERMAL PROTECTION
Thermal shutdown limits the AP7173 junction
temperature and protects the device from damage as a
result of overheating.
Thermal protection turns off the VOUT when the AP7173’s
junction temperature rises to approximately +150°C,
allowing it to cool down. When the junction temperature
drops to approximatel y +130°C, the output is re-enabled.
Therefore, the thermal protection circuit may cycle on
and off at a rate dependent on the power dissipation,
thermal resistance, and ambient temperature.
POWER DISSIPATION
Thermal shutdown is intented to protect the AP7173
against abnormal overheating. For normal operation,
excessive po wer dissipation should be avoided and good
heatsinking should be provided. Power dissipation in the
device is the product of the device dropout voltage and
the load current, PD = (VIN - VOUT) x IOUT
As can be seen, power dissipation can be minimized by
using the lowest input voltage necessary to achieve the
required output voltage regu lation.
To ensure that the device junction temperature does not
exceed the specified limit of 125°C, an applicatio n should
provide heat conduction paths that have junction-to-
ambient thermal resistance lower than the calculated
value here: RθJA = (125°C –TA ) / PD
For the DFN package with exposed pad, the primary
conduction path for heat is through the exposed pad to
the printed circuit board (PCB). The pad should be
attached to an appropriate amount of copper PCB area to
ensure that the device does not overheat.
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 8 - 2 12 of 15
www.diodes.com April 2011
© Diodes Incorporated
Ordering Information
AP 7173 -
XX
G -
X
Packing
Package Green
FN : DFN3030-10
SP : G : Green 7 /13 : Tape & Reel
SO-8E
P
Device Package
Code Packaging
(Note 12) 7”/13” Tape and Reel
Quantity Part Number Suffix
AP7173-FNG-7 FN DFN3030-10 3000/Tape & Reel -7
AP7173-SPG-13 SP SO-8EP 2500/Tape & Reel -13
Note: 12. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at
http://www.diodes.com/datasheets/ap02001.pdf.
Marking Information
(1) DFN3030-10 ( Top View )
XX
XX : Iden tification C o de
X : A~Z : Green
Y : Year : 0~9
W : Week : A~Z : 1~26 week;
a~z : 27~52 week; z represents
52 and 53 week
Y W X
Part Number Package Identification Code
AP7173 DFN3030-10 BA
(2) SO-8EP
( Top View )
AP7173
YY WW
XX
Logo
Part No.
5
8
41
E WW : Week : 01~52; 52
YY : Year : 08, 09,10~
G : Green
X : Internal Code
represents 52 and 53 week
SO-8EP
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 8 - 2 13 of 15
www.diodes.com April 2011
© Diodes Incorporated
Package Outline Dimensions (All Dimensions in mm)
(1) Package Type: DFN3030-10
(2) Package Type: SO-8EP
1.27typ 0.3/0.5
7°~9°
4.85/4.95
3.85/3.95
5.90/6.10
0.15/0.25
7°~9°
3.70/4.10
0.62/0.82
0/0.13
Gauge Plane
0.254
Seating Plane
0.35max.
45°
Detail "A"
Detail "A"
1.30/1.50
1.75max.
Bottom View
2.4Ref.
3.3Ref.
Exposed pad
8x-0.60
Land Pattem Recommendation
(Unit:mm)
Exposed pad
1
1
1
5.4
8x-1.55
6x-1.27
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 8 - 2 14 of 15
www.diodes.com April 2011
© Diodes Incorporated
Tape Orientation
For DFN3030-10
Notes: 13. The taping orientation of the other package type can be found on our website at http://www.diodes.com/datasheets/ap02007.pdf
AP7173
1.5
A
LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
AP7173
Document number: DS31369 Rev. 8 - 2 15 of 15
www.diodes.com April 2011
© Diodes Incorporated
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