32K x 8 Power Switched and
Reprogrammable PROM
CY7C271
CY7C274
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-04008 Rev. ** Revised March 4, 2002
74
Features
• CMOS for optimum speed/power
• Window ed for reprogramm abi lity
• High speed
—30 ns (commercial)
—35 ns (military)
• Low power
—660 mW (commercial)
—715 mW (military)
• Super low standby power
—Less than 165 mW when deselected
• EPROM technology 100% programmable
• Slim 300-mil package (7C271)
• Direct replacement for bipolar PROMs
• Capable of withstanding >2001V static discharge
Functional Description
The CY7C271 and CY7C274 are high-performance
32,768-word by 8-bit CMOS PROMs. When disabled (CE
HIGH), the 7C271/7C274 automatically powers down into a
low-power stand-by mode. The CY7C271 is packaged in the
300-mil slim pac kage. The CY7C274 is pa ckaged in the in dus-
try stan dard 60 0-mil pack age. Bo th the 7C27 1 and 7C274 a re
available in a cerDIP package equipped with an erasure win-
dow to provide for reprogrammability. When exposed to UV
light, the PROM is erased and can be reprogrammed. The
memory cells utilize proven EPROM floating gate technology
and byte-wide intelligent programming algorithms.
The CY7C271 and CY7C274 offer the advantage of lower
power, superior performance, and programming yield. The
EPROM cell requires only 12.5V for the super voltage, and low
current requirements allow for gang programming. The
EPROM cells allow each memory location to be tested 100%
because each location is written into, erased, and repeatedly
exercised prior to encapsulation. Each PROM is also tested for
AC performance to guarantee that after customer program-
ming, the product will meet DC and AC specification limits.
Reading the 7C271 is accomplished by placing active LOW
signals on CS1 and CE, and an active HIGH on CS2. Re adi ng t he
7C274 is a ccomplished by placing active LOW signals on OE an d
CE. The contents of the memory location addressed by the address
lines (A0 − A14) will become available on the output lines (O0 − O7).
LogicBlockDiagram Pin Configurations
1
2
3
4
5
6
7
8
9
10
11
12 16
17
18
19
20
24
23
22
21
13
14
25
28
27
26
A8
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
VCC
A11
A12
A13
O7
O6
O4
O5
O3
A12
A11
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
POWER–DOWN
O7
O6
O5
O4
O3
O2
O1
O0
CE
256 x 1024
PROGRAMABLE
ARRAY 8 x 1 OF 128
MULTIPLEXER
12
31
4
5
6
7
8
9
10
32130
1314151617
26
25
24
23
22
21
11
V
CC
A5
A4
A3
A2
A6
A1
A13
A14
O7
O6
O4
GND
A12
A7
A8
O3
O1
181920
27
28
29
32
NC
O5
NC
15
A10
A13
(7C271) CS1
(7C274) OE
A9A10
A14
CS1
CS2
CE
A9
A10
A11
CS1
CS2
O0
A14 1
2
3
4
5
6
7
8
9
10
11
12 16
17
18
19
20
24
23
22
21
13
14
25
28
27
26
12
31
4
5
6
7
8
9
10
32130
1314151617
26
25
24
23
22
21
11
A7
V
CC
A12
181920
27
28
29
32
15
NC
A14
A13
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
VCC
A13
A8
A9
O7
O6
O4
O5
O3
A9
A11
O7
O6
A8
VPP A14
(7C271) CS2
7C271 7C274
NC
A11
OE
A10
CE
NC
CE
O2
A0NC
A5
A4
A3
A2
A6
A1
O0
A0
VPP
NC
OE
A10
CE
O4
GND
O3
O1
NC
O5
O2
DIP/Flatpack DIP/Flatpack
LCC/PLCC (Opaque Only)
7C271 7C274
X ADDRESS
Y ADDRESS LCC/PLCC ( Opa que Only)
CY7C271
CY7C274
Document #: 38-04008 Rev. ** Page 2 of 15
Maximum Ratings
(Above w hi ch the usef ul l ife m ay be im pai red. For user g uid e-
lines, not tes ted .)
Storage Temperature .....................................−65°C to +150°C
Ambient Temperature with
Power Applied..................................................−55°C to +125°C
Supply Voltage to Ground Potential.................−0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z Stat e.....................................................−0.5V to +7.0V
DC Input Voltage.................................................−3.0V to +7.0V
DC Program Voltage.....................................................13.0V
Static Discharge Voltage...........................................>2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current.....................................................>200 mA
UV Exposure ................................................7258 Wsec/cm2
Selection Guide
7C271-30
7C274-30 7C271-35
7C274-35 7C271-45
7C274-45 7C271-55
7C274-55
Maximum Access Time (ns) 30 35 45 55
Maxi mu m Op er at ing
Current (mA) Com’l120 120 120 120
Military 130 130 130
Standby Current
(mA) Com’l30 30 30 30
Military 40 40 40
Operating Range
Range Ambient
Temperature VCC
Commercial 0°C to +70°C 5V ±10%
Industrial[1] −40°C to +85°C 5V ±10%
Military[2] −55°C to +125°C 5V ±10%
Electrical Characteristi cs Ov er the Op erating Ran ge [3]
7C271-30, 35 , 45, 55
7C274-30, 35 , 45, 55
Parameter Description Te st Conditions Min. Max. Unit
VOH Output HIGH Voltage VCC = Min., IOH = −2.0 mA 2.4 V
VOL Output LO W Voltage VCC = Min., IOL = 8.0 mA[4] 0.4 V
VIH Input HIGH Level Guaranteed Input Logical HIGH Voltage for All
Inputs 2.0 VCC V
VIL Input LOW Level Guaranteed Input Logical LOW V oltage for All
Inputs 0.8 V
IIX Input Current GND < VIN < VCC −10 +10 µA
IOZ Output Leakage Current GND < VOUT < VCC, Output Disabled −40 +40 µA
IOS Output Short Circuit Current[5] VCC = Max., VOUT = GND −20 −90 mA
ICC Power Supply Current VCC = Max., VIN = 2.0V,
IOUT = 0 mA, CE=VIL Commercial 120 mA
Military 130
ISB Standby Supply Current VCC = Max., CE = VIH,
IOUT = 0 mA Commercial 30 mA
Military 40
VPP Programmi ng Supp ly Voltage 12 13 V
IPP Programmi ng Supp ly Curre nt 50 mA
VIHP Input HIGH Prog ramming
Voltage 3.0 V
VILP Input LOW Programming
Voltage 0.4 V
Note:
1. Contact a Cypress representative for information on industrial temperature range specifications.
2. TA is the “instant on” case temperature.
3. See the last page of this specifi cat io n for Gro up A subgro up test in g infor ma ti on .
4. 6.0 mA military
5. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds.
CY7C271
CY7C274
Document #: 38-04008 Rev. ** Page 3 of 15
Capacitance[6]
Parameter Description Test Conditions Max. Unit
CIN Input Capacitance TA = 25°C, f = 1 MHz,
VCC = 5.0V 10 pF
COUT Output Capacitance 10 pF
AC Test Loads and Waveforms[6]
3.0V
5V
OUTPUT
R1 500Ω
658ΩMIL
R2 333Ω
(403Ω MIL)
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
5ns 5ns
5V
OUTPUT
5pF
INCLUDING
JIG AND
SCOPE
(a) Normal Load (b) HighZ Load
OUTPUT 2.00V COMMERCIAL
Equivalent to: THÉ VENIN EQUIVALENT
200Ω
ALL INPUT PULSES
OUTPUT 1.90V MILITARY
250Ω
R1 500Ω
658ΩMIL
R2 333Ω
(403Ω MIL) ≤≤
Switching Characteristics Over the Operating Range[3,6]
7C271-30
7C274-30 7C271-35
7C274-35 7C271-45
7C274-45 7C271-55
7C274-55
Parameter Description Min. Max. Min. Max. Min. Max. Min. Max. Unit
tAA Address to Output Valid 30 35 45 55 ns
tHZCS Chip Select Inactive to High Z (CS1 and CS2,
7C271 Only) 20 25 30 30 ns
tACS Chip Select Active to Output V alid (CS1 and CS2,
7C271 Only) 20 25 30 30 ns
tHZOE Output Enable Inactive to High Z (OE, 7C274
Only) 20 20 25 25 ns
tOE Output En able A ctive to Ou tput Valid (O E, 7C274
Only) 20 20 25 25 ns
tHZCE Chip Enable Inactive to High Z (CE Only) 35 40 50 60 ns
tACE Chip Enable Active to Output Valid (CE Only) 35 40 50 60 ns
tPU Chip Enable Active to Power Up 0000ns
tPD Chip Enable Inactive to Power Down 35 40 50 60 ns
tOH Output Hold from Address Change 0000ns
Note:
6. See Introduction to CMOS PROMs for general information on testing.
CY7C271
CY7C274
Document #: 38-04008 Rev. ** Page 4 of 15
Erasure Characteri stics
W ave lengths of lig ht less than 400 0 angstroms begi n to erase
the 7C27 1 and 7C27 4 in the wi ndowed p ackag e. For this rea-
son, an opaque label should be placed over the window if the
PROM is exposed to sunlight or fluorescent lighting for extend-
ed periods of ti me.
The recommended dose of ultraviolet light for erasure is a
wavel ength of 2537 angstro ms for a minimum dos e (UV inten-
sity × exposure time) of 25 Wsec/cm2. For an ultraviolet lamp with a
12 mW/cm2 power rating, the exposure time would be approximately
35 minutes. The 7C2 71 or 7C274 needs to be within 1 inch of the
lamp during erasure. Permanent damage may result if the PROM is
exposed to high-intensity UV light for an extended period of time.
7258 Wsec/cm2 is the recommended maximum dosage.
Programming Modes
Programming support is available from Cypress as well as
from a number of third-party software vendors. For detailed
progra mming inf ormatio n, in cludi ng a list ing of sof tware pack-
ages, please see the PROM Programming Information located
at the end of t his sect ion . Program ming algorit hms can be ob-
tained from any Cypress representative.
Switching Waveform
Note:
7. CS2 a nd CS1 are used o n the 7C271 onl y. OE is use d on t he 7C274 only.
tOH
tPU
tPD
tAA (tOE)
tACS(E)
50% 50%
A0−A14
ADDRESS
VCC
SUPPLY
CURRENT
CS2
OE,CE,CS
1
O0-O
7PREVIOUS DATA VALID DATA VALID
POWER-DOWN CONTROLLED BY CE
(tHZOE)
tHZCS(E)
HIGH Z
[7
Table 1. CY7C271 Mode Selection
Pin Function[8]
Read or Output Disable A14–A0CE CS2CS1O7–O0
Mode Other A14–A0VFY PGM VPP D7–D0
Read A14–A0VIL VIH VIL O7–O0
Power Down A14–A0VIH X X High Z
Output Disable A14–A0X VIL XHigh Z
Output Disable A14–A0X X VIH High Z
Program A14–A0VIHP VILP VPP D7–D0
Program Verify A14–A0VILP VIHP/VILP VPP O7–O0
Pro gram Inhibi t A14–A0VIHP VIHP VPP High Z
Blank Check A14–A0VILP VIHP/VILP VPP O7–O0
CY7C271
CY7C274
Document #: 38-04008 Rev. ** Page 5 of 15
Table 2. CY7C274 Mode Selection
Pin Function[8]
Read or Output Disable A14–A0OE CE VPP O7–O0
Mode Other A14–A0VFY PGM VPP D7–D0
Read A14–A0VIL VIL Note 9 O7–O0
Output Disable A14–A0VIH X X High Z
Power Down A14–A0X VIH XHigh Z
Program A14–A0VIHP VILP VPP D7–D0
Program Verify A14–A0VILP VIHP/VILP VPP O7–O0
Pro gram Inhibi t A14–A0VIHP VIHP VPP High Z
Blank Check A14–A0VILP VIHP/VILP VPP O7–O0
Note:
8. X can be VIL (VILP) or V IH (VIHP).
9. VPP should be tied to VCC ±5% i n read mode.
Figure 1. Programming Pinouts
1
2
3
4
5
6
7
8
9
10
11
12 16
17
18
19
20
24
23
22
21
13
14
25
28
27
26
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
GND
VCC
A10
A11
A12
A13
A14
VPP
PGM
VFY
D7
D6
D4
D5
D3
12
D0
31
4
5
6
7
8
9
10
32130
1314151617
26
25
24
23
22
21
11
A7
VCC
A6
A5
A4
A3
A2
A1
A0PGM
A14
NC
D7
D6
D4
D3
D2
D1
181920
27
28
29
32
NC
NC
D5
15
VPP
7C271 7C271
NC
GND
VFY
A13
A12
A8
A9
A10
A11
DIP
Top View LCC
Top View
1
2
3
4
5
6
7
8
9
10
11
12 16
17
18
19
20
24
23
22
21
13
14
25
28
27
26
VPP
A12
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
GND
VCC
A14
A13
A8
A9
A11
A10
PGM
VFY
D7
D6
D4
D5
D3
12
D0
31
4
5
6
7
8
9
10
32130
1314151617
26
25
24
23
22
21
11
A7
VCC
A6
A5
A4
A3
A2
A1
A0PGM
A11
NC
D7
D6
D4
D3
D2
D1
181920
27
28
29
32
NC
NC
D5
15
7C274 7C274
NC
GND
VFY
A9
A8
A12
A13
VPP
A14
A10
DIP
Top View LCC
Top View
CY7C271
CY7C274
Document #: 38-04008 Rev. ** Page 6 of 15
Typical DC and AC Characteristics
1.4
1.6
1.0
0.8
4.0 4.5 5.0 5.5 6.0 −55 25 125
1.2
1.1
1.2
1.0
0.8
0.6
4.0 4.5 5.0 5.5 6.0
NORMALIZED ACCESS TIME
SUPP LYVO LTAGE (V )
NORMALIZED SUPPLY CURRENT
vs. SUPPLY VOLTAGE NORMALIZED SUPPLY CURRENT
vs. AMBIENT T EMPERATURE
AMBI EN T TEMPERATURE (°C) SUPPLYVOLT AGE (V)
NORMALIZED ACCESS TIME
vs. SUPPLY VOLTAGE
0.6
1.2
1.6
1.4
1.2
1.0
0.8
−55 125
NORMALIZED ACCESS TIME
AMBIENT TEMPERATURE (°C)
NORMALIZED AC CESS TI ME
vs. TEMPERATURE
150
175
125
75
50
25
0.0 1.0 2.0 3.0
OUTPUT SINK CURRENT (mA)
0
100
OUTPUT VOLTAGE (V)
OUTPUT SINK CURRENT
vs. OUTPUT VOLTAGE
1.0
0.9
0.8
NORMALIZED I
CC
NORMALIZED I
CC
VCC =5.0V
TA=25°C
TA=25°C
0.6
0.4
60
50
40
30
20
10
01.0 2.03.0
OUTPUT SOURCE CURRENT (mA)
OUTPUT VOLTAGE (V)
40
30
20
10
0 200 400 600 800
DELTA t (ns)
AA
CAPACITANCE (pF)
TYPICAL ACCESS TIME CHANGE
vs. OUTPUT LOADING
4.0 1000
VCC =4.5V
TA=25°C
TA=25°C
f= f
MAX
25 0
OUTPUT SOURCE CURRENT
vs. VOLTAGE
4.0
C271-14
1.1
1.0
0.9
0.8
0.7
0 50 100 150 200
CYCLE PE RIOD (ns)
NORMALIZED SUPPLY CURRENT
vs. CYCLE PERIOD
250
NORMALIZED I
CC
0.6
0
CY7C271
CY7C274
Document #: 38-04008 Rev. ** Page 7 of 15
Ordering Information[10]
Speed
(ns) Ordering Code Package
Name Package Type Operating
Range
30 CY7C271-30JC J65 32-Lead Plas tic Lead ed Chip Carrier Commercial
CY7C271-30PC P21 28-Lead (300-Mil) Molded DIP
CY7C271-30WC W22 28-Lead (300-Mil) Windowed CerDIP
35 CY7C271-35JC J65 32-Lead Plas tic Lead ed Chip Carrier Commercial
CY7C271-35PC P21 28-Lead (300-Mil) Molded DIP
CY7C271-35WC W22 28-Lead (300-Mil) Windowed CerDIP
CY7C271-35DMB D22 28-Lead (300-Mi l) CerDIP Military
CY7C271-35KMB K74 2 8-Le ad R ect ang ula r Cerpac k
CY7C271-35LMB L55 32-Pin Rectangular Leadless Chip Carrier
CY7C271-35QMB Q55 32-Pin Windowe d Rectangular Leadless Chip Carrier
CY7C271-35WMB W22 28-Lead (300-Mil) Windowed CerDIP
45 CY7C271-45JC J65 32-Lead Plas tic Lead ed Chip Carrier Commercial
CY7C271-45PC P21 28-Lead (300-Mil) Molded DIP
CY7C271-45WC W22 28-Lead (300-Mil) Windowed CerDIP
CY7C271-45DMB D22 28-Lead (300-Mi l) CerDIP Military
CY7C271-45KMB K74 2 8-Le ad R ect ang ula r Cerpac k
CY7C271-45LMB L55 32-Pin Rectangular Leadless Chip Carrier
CY7C271-45QMB Q55 32-Pin Windowe d Rectangular Leadless Chip Carrier
CY7C271-45TMB T74 28-Le ad Win dowe d Cer pac k
CY7C271-45WMB W22 28-Lead (300-Mil) Windowed CerDIP
55 CY7C271-55JC J65 32-Lead Plas tic Lead ed Chip Carrier Commercial
CY7C271-55PC P21 28-Lead (300-Mil) Molded DIP
CY7C271-55WC W22 28-Lead (300-Mil) Windowed CerDIP
CY7C271-55DMB D22 28-Lead (300-Mi l) CerDIP Military
CY7C271-55KMB K74 2 8-Le ad R ect ang ula r Cerpac k
CY7C271-55LMB L55 32-Pin Rectangular Leadless Chip Carrier
CY7C271-55QMB Q55 32-Pin Windowe d Rectangular Leadless Chip Carrier
CY7C271-55TMB T74 28-Le ad Win dowe d Cer pac k
CY7C271-55WMB W22 28-Lead (300-Mil) Windowed CerDIP
Note:
10. Most of these products are available in industrial temperature range. Contact a Cypress representative for specifications and product availability .
CY7C271
CY7C274
Document #: 38-04008 Rev. ** Page 8 of 15
Ordering Information[10] (Continued)
Speed
(ns) Ordering Code Package
Name Package Type Operating
Range
30 CY7C274-30JC J65 32-Lead Plas tic Lead ed Chip Carrier Commercial
CY7C274-30PC P15 28-Lead (600-Mil) Molded DIP
CY7C274-30WC W16 28-Lead (600-Mil) Windowed CerDIP
35 CY7C274-35JC J65 32-Lead Plas tic Lead ed Chip Carrier Commercial
CY7C274-35PC P15 28-Lead (600-Mil) Molded DIP
CY7C274-35WC W16 28-Lead (600-Mil) Windowed CerDIP
CY7C274-35DMB D16 28-Lead (600-Mi l) CerDIP Military
CY7C274-35KMB K74 2 8-Le ad R ect ang ula r Cerpac k
CY7C274-35LMB L55 32-Pin Rectangular Leadless Chip Carrier
CY7C274-35QMB Q55 32-Pin Windowe d Rectangular Leadless Chip Carrier
CY7C274-35TMB T74 28-Le ad Win dowe d Cer pac k
CY7C274-35WMB W16 28-Lead (600-Mil) Windowed CerDIP
45 CY7C274-45JC J65 32-Lead Plas tic Lead ed Chip Carrier Commercial
CY7C274-45PC P15 28-Lead (600-Mil) Molded DIP
CY7C274-45WC W16 28-Lead (600-Mil) Windowed CerDIP
CY7C274-45DMB D16 28-Lead (600-Mi l) CerDIP Military
CY7C274-45KMB K74 2 8-Le ad R ect ang ula r Cerpac k
CY7C274-45LMB L55 32-Pin Rectangular Leadless Chip Carrier
CY7C274-45QMB Q55 32-Pin Windowe d Rectangular Leadless Chip Carrier
CY7C274-45TMB T74 28-Le ad Win dowe d Cer pac k
CY7C274-45WMB W16 28-Lead (600-Mil) Windowed CerDIP
55 CY7C274-55JC J65 32-Lead Plas tic Lead ed Chip Carrier Commercial
CY7C274-55PC P15 28-Lead (600-Mil) Molded DIP
CY7C274-55WC W16 28-Lead (600-Mil) Windowed CerDIP
CY7C274-55DMB D16 28-Lead (600-Mi l) CerDIP Military
CY7C274-55KMB K74 2 8-Le ad R ect ang ula r Cerpac k
CY7C274-55LMB L55 32-Pin Rectangular Leadless Chip Carrier
CY7C274-55QMB Q55 32-Pin Windowe d Rectangular Leadless Chip Carrier
CY7C274-55TMB T74 28-Le ad Win dowe d Cer pac k
CY7C274-55WMB W16 28-Lead (600-Mil) Windowed CerDIP
CY7C271
CY7C274
Document #: 38-04008 Rev. ** Page 9 of 15
MILITARY SPECIFICATIONS
Group A Subgroup Testing
DC Characteristics
Parameter Subgroups
VOH 1, 2, 3
VOL 1, 2, 3
VIH 1, 2, 3
VIL 1, 2, 3
IIX 1, 2, 3
IOZ 1, 2, 3
ICC 1, 2, 3
ISB 1, 2, 3
Switching Characteristics
Parameter Subgroups
tAA 7, 8, 9, 10, 11
tACS[11] 7, 8, 9, 10, 11
tOE[12] 7, 8, 9, 10, 11
tACE 7, 8, 9, 10, 11
Note:
11. 7C271 only (CS1 and CS2).
12. 7C274 only.
SMD Cross Reference
SMD
Number Suffix Cypress
Number
5962-89817 01XX CY7C271-55WMB
5962-89817 01YX CY7C271-55TMB
5962-89817 01ZX CY7C271-55QMB
5962-89817 02XX CY7C271-45WMB
5962-89817 02YX CY7C271-45TMB
5962-89817 02ZX CY7C271-45QMB
Package Diagrams
28-Lead (600-Mil) CerDIP D16
MIL-STD-1835 D-10 Config. A
51-80019
CY7C271
CY7C274
Document #: 38-04008 Rev. ** Page 10 of 15
Package Diagrams (continued)
28-Lead (300-Mil) CerDIP D22
MIL-STD-1835 D-15 Config. A
51-80032
28-Lead Rectangular Cerpack K74
MIL-STD-1835 F-11 Config. A
51-80061
CY7C271
CY7C274
Document #: 38-04008 Rev. ** Page 11 of 15
Package Diagrams (continued)
32-Pin Rectangular Leadless Chip Carrier L55
MIL-STD-1835 C-12
51-80068
51-85017-A
28-Lead (600-Mil) Molded DIP P15
CY7C271
CY7C274
Document #: 38-04008 Rev. ** Page 12 of 15
Package Diagrams (continued)
51-85014-B
28-Lead (300-Mil) Molded DIP P21
MIL-STD-1835 C-12
51-80103-*A
32-Pin Windowed Rectangular Leadless Chip Carrier Q55
CY7C271
CY7C274
Document #: 38-04008 Rev. ** Page 13 of 15
Package Diagrams (continued)
28-Lead Windowed Cerpack T74
28-Lead (600-Mil) Windowed CerDIP W16
MIL-STD-1835 D-10 Config. A
CY7C271
CY7C274
Document #: 38-04008 Rev. ** Page 14 of 15
© Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry emb odied in a Cypress Semiconductor product. Nor does it convey or imply any license under paten t or other rights. Cypress Se miconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconducto r products in life-support systems application implies that the manu factur er assume s all risk of such use and in doi
ng so indemnifies Cypress Semiconductor against all charges.
Package Diagrams (continued)
28-Lead
(300-Mil)
Windowed CerDIP W22
MIL-STD-1835 D-15 Config. A
51-80087
CY7C271
CY7C274
Document #: 38-04008 Rev. ** Page 15 of 15
Document Title: CY7C271 CY7C274 32K x 8 Power Switched and Reprogrammable PROM
Document Number: 38-04008
REV. ECN NO. Issue
Date Orig. of
Change Description of Change
** 113864 3/8/02 DSG Change from Spec number: 38-00068 to 38-04008
