1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
TM ACS03MS
Radiation Hardened Quad 2-Input
NAND Gate with Open Drain
January 1996
Pinouts
14 PIN CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR CDIP2-T14,
LEAD FINISH C
TO P VIEW
14 PIN CERAMIC FLATPACK
MIL-STD-1835 DESIGNATOR CDFP3-F14,
LEAD FINISH C
TO P VIEW
1
2
3
4
5
6
7
14
13
12
11
10
9
8
A1
B1
Y1
A2
B2
Y2
GND
VCC
B4
A4
Y4
B3
A3
Y3
14
13
12
11
10
9
8
2
3
4
5
6
7
1
A1
B1
Y1
A2
B2
Y2
GND
VCC
B4
A4
Y4
B3
A3
Y3
Features
• Devices QML Qualif ied in Accordance wit h M IL- PRF-38535
• Detailed Electrical and Screening Requirem ents are Contained in
SMD# 5962-96703 and Intersi l’s QM Plan
• 1.25 Micron Radiation Hardened SOS CMOS
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
• Single Event Upset (SEU) Immunity: <1 x 10-10 Errors/Bit/Day
(Typ)
• S E U LE T T h re s h old . . . . . . . . . . . . . . . . . . . . . . . >1 0 0 M EV-cm 2/mg
• Dose Rate Upset . . . . . . . . . . . . . . . . >1011 RAD (Si)/ s, 20ns Pulse
• Dose Rate Survivability. . . . . . . . . . . >1012 RAD (Si)/s, 20ns Pulse
• Latch-Up Fr ee Under Any Conditions
• Military Temperature Range . . . . . . . . . . . . . . . . . .-55oC to +125oC
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
• Input Logi c Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current ≤ 1µA at VOL, VOH
• Fast Propagation Delay. . . . . . . . . . . . . . . . 15ns (Max), 10ns (Typ)
Description
The Int ersil ACS03MS is a Radiat ion Hardened quad 2-i nput NAND gate
with open drain outputs. The open drain output can drive resistive loads
from a separate supply voltage.
The ACS03MS utilizes advanced CMOS/SOS technology to achieve
high-speed operation. This device is a member of a radiation hardened,
high-speed, CMOS/SOS Logi c Fam ily.
The ACS03MS is supplied in a 14 lead Ceramic Flatpack (K suffix) or a
Ceramic Du al- In-Line Pac kage (D suffix).
Ordering Information
PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE
5962F9670301VCC -55oC to +125oC MIL-PRF-38535 Class V 14 Lead SBDIP
5962F9670301VXC -55oC to +125oC MI L-PRF-38535 C lass V 14 Lead Ce ramic Flatpack
ACS03D/Sample 25oC Sample 14 Lead SBDIP
ACS03K/Sample 25oC Sample 14 Lead Ceramic Flatpack
ACS03HMSR 25oCDie Die
Spec Numb er 518779
File Number 3064.1
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ACS03MS
Functional Diagram
TRUTH TABLE
INPUTS OUTPUT
An Bn Yn
L L Z (Note 2), H (Note 3)
L H Z (Note 2), H (Note 3)
H L Z (Note 2), H (Note 3)
HH L
NOTES:
1. L = Lo w, H = High , Z = High Impedance
2. Without Pull-up Resistor
3. With Pull-up Resi stor
An
Bn
Yn
Spec Numb er 518779
3
ACS03MS
Die Char acteris tics
DIE DIMENSIONS:
68 mils x 79 mil s
1730mm x 2010mm
METALLIZATION:
Type: AlSi
Metal 1 Thickness: 7.125kÅ ±1.125kÅ
Metal 2 Thickness: 9kÅ ±1kÅ
GLASSIVATION:
Type: SiO2
Thickness: 8kÅ ±1kÅ
WORST CASE CURRENT DENSITY:
<2.0 x 105A/cm2
BOND PAD SIZE:
110µm x 11 0µm
4.3 mils x 4.3 mils
Metallization Mask Layout
ACS03MS
B1 VCC B4
(12) A4
(11) Y4
(10) B3
(7) (8)
(9) A3
Y1 (3)
A2 (4)
B2 (5)
Y2 (6)
(14)
Y3GND
(2) (13)
A1
(1)
Spec Numb er 518779
