FDS5670
FDS5670 Rev. B
FDS5670
60V N-Channel PowerTrenchTM MOSFET
August 1999
1999 Fairchild Semiconductor Corporation
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter Ratings Units
VDSS Drain-Source V ol tage 60 V
VGSS Gate-S ource Voltage ±20 V
IDDrain Current - Continuous (Note 1a) 10 A
- Pulsed 50
PDPower Dissipation for Single Operat i on (Note 1a) 2.5 W
(Note 1b) 1.2
(Note 1c) 1
TJ, Tstg Operating and Storage Junction T emperature Range -55 to +150 °C
Thermal Characteristics
RθJA Thermal Re sistance, Junction-to-Ambient (Note 1a) 50 °C/W
RθJC Thermal Re sistance, Junction-to-Case (Note 1) 25 °C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape Width Quantity
FDS5670 FDS5670 13’’ 12mm 2500 units
General Description
This N-Channel MOSFET has been designed specifically
to improve the overall efficiency of DC/DC converters using
either synchronous or conventional switching PWM
controllers.
These MOSFETs feature faster switching and lower gate
charge than other MOSFETs with comparable RDS(ON)
specifications.
The result is a MOSFET that is easy and safer to drive
(even at very high frequencies), and DC/DC power supply
designs with higher overall efficiency.
Features
10 A, 60 V. RDS(ON) = 0.014 Ω @ VGS = 10 V
RDS(ON) = 0.017 Ω @ VGS = 6 V.
Low gate charge.
Fast switching speed.
High performance trench technology for extremely
low RDS(ON).
High power and current handling capability.
6
7
8
5
3
2
1
4
S
D
S
S
SO-8
D
D
D
G
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FDS5670
FDS5670 Rev. B
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS Drain-Sourc e Breakdown Voltage VGS = 0 V, ID = 250 µA60 V
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient ID = 250 µA, Referenced to 25°C58 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 48 V, V GS = 0 V 1 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V 100 nA
IGSSR Gate-Body Leak age Current, Reverse VGS = -20 V, V DS = 0 V -100 nA
On Characteristics (Note 2)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA22.44 V
∆VGS(th)
∆TJ
Gate Threshold V oltage
Temperature Coefficient ID = 250 µA, Referenced to 25°C6.8 mV/°C
RDS(on) Static Drain-S ource
On-Resistance VGS = 10 V, I D = 10 A
VGS = 10 V, ID = 10 A, TJ=125°C
VGS = 6 V, ID = 9 A
0.012
0.019
0.014
0.014
0.027
0.017
Ω
ID(on) On-State Drain Current VGS = 10 V, V DS = 5 V 25 A
gFS Forward Transconductance VDS = 5 V, I D = 10 A 39 S
Dynamic Characteristics
Ciss Input Capacitance 2900 pF
Coss Output Capacit ance 685 pF
Crss Reverse Transf er Capacitance
VDS = 15 V, VGS = 0 V
f = 1.0 MHz
180 pF
Switching Characteristics (Note 2)
td(on) Turn-On Delay Time 16 29 ns
trTurn-On Rise Time 10 20 ns
td(off) Turn-Off Del ay Ti m e 50 80 ns
tfTurn-Off Fall Time
VDD = 30 V, ID = 1 A
VGS = 10 V, RGEN = 6 Ω
23 42 ns
QgTotal Gate Charge 49 70 nC
Qgs Gate-Source Charge 9 nC
Qgd Gate-Drain Charge
VDS = 20 V, I D = 10 A
VGS = 10 V,
10.4 nC
Drain-Source Diode Characteristics and Maximum Ratings
ISMaximum Cont i nuous Drain-Source Diode Forward Current 2.1 A
VSD Drain-Source Di ode Forward Voltage VGS = 0 V, I S = 2.1 A (Note 2) 0.72 1.2 V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the
drain pins. RθJC is guaranteed by design while RθJA is determined by the user's board design.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
a) 50° C/W when
mounted on a 0.5 in2
pad of 2 oz. copper.
b) 105° C/W when
mounted on a 0.02 in2
pad of 2 oz. copper.
c) 125° C/W when mounted
on a minimum pad.
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FDS5670
FDS5670 Rev. B
Typical Characteristics
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage.
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
Figure 3. On-Resistance Variation
with Temperature.
Figure 4. On-Resistance Variation
with Gate-to-Source Voltage.
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
-50 -25 0 25 50 75 100 125 150
T
J
, JUNCTION TEMPERATURE (
o
C)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
I
D
= 10A
V
GS
= 10V
0
10
20
30
40
50
60
12345
V
GS
, GATE TO SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
T
A
= -55
o
C25
o
C
125
o
C
V
DS
=5V
0
0.01
0.02
0.03
0.04
0.05
345678910
V
GS
, GATE TO SOURCE VOLTAGE (V)
R
DS(ON)
, ON-RESISTANCE (OHM)
I
D
= 10A
T
A
= 125
o
C
T
A
= 25
o
C
0
10
20
30
40
50
60
01234
V
DS
, DRAIN-SOURCE VOLTAGE (V)
I
D
, DRAIN-SOURCE CURRENT (A)
V
GS
= 10V 6V
5V4.5V
3.5V
4V
0.0001
0.001
0.01
0.1
1
10
100
0 0.2 0.4 0.6 0.8 1 1.2
V
SD
, BODY DIODE VOLTAGE (V)
I
S
, REVERSE DRAIN CUR RE NT (A)
T
J
=125
o
C
25
o
C
-55
o
C
V
GS
=0
0.8
1
1.2
1.4
1.6
1.8
2
0 102030405060
I
D
, DRAIN CURRENT (A)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
V
GS
= 4.0V
10V
5.0V
7.0V
4.5V
6.0V
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FDS5670
FDS5670 Rev. B
Typical Characteristics (continued)
0.001 0.01 0.1 1 10 100 300
0
10
20
30
40
50
SINGLE PULSE TIME (SEC)
POWER (W)
SINGLE PULSE
R =125°C/W
T = 25°C
θJA
A
Figure 7. Gate-Charge Characteristics. Figure 8. Capacitance Characteristics.
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient themal response will change depending on the circuit board design.
0.0001 0.001 0.01 0.1 1 10 100 300
0.001
0.002
0.005
0.01
0.02
0.05
0.1
0.2
0.5
1
t , TI ME (s e c)
T R ANSI ENT TH ER MAL RESI ST ANC E
r(t), NORMALIZED EF F ECT I V E
1
S i n g l e P u l s e
D = 0.5
0. 1
0.05
0.02
0. 0 1
0.2
D u t y C y c l e, D = t /t
12
R (t) = r(t) * R
R = 125°C/ W
θJA
θJA
θJA
T - T = P * R (t)
θ
JA
A
J
P(pk)
t
1
t
2
0.01
0.1
1
10
100
0.1 1 10 100
V
DS
, DRAIN-SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
DC10s
1s
100ms
10ms
1ms
100µs
R
DS(ON)
LIMIT
V
GS
= 10V
SINGLE PULSE
R
θJA
= 125
o
C/W
T
A
= 25
o
C
0
2
4
6
8
10
0 1020304050
Q
g
, GATE CHARGE (nC)
V
GS
, GATE-SOURCE VOLTAGE (V)
I
D
= 10A V
DS
= 10V
20V
30V
0
1000
2000
3000
4000
5000
0 102030
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
C
ISS
C
RSS
C
OSS
f = 1MHz
V
GS
= 0 V
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TRADEMARKS
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION.
As used herein:
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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Definition of Terms
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Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
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that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
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UHC™
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