Alliance Semiconductor
2575 Augustine Drive . Santa Clara, CA 95054 . Tel: 408.855.4900 . Fax: 408.855.4999 . www.alsc.com
Notice: The information in this document is subject to change without notice
February 2005
Low Power µP Supervisor Circuits
ASM705 / 706 / 707 / 708
ASM813L
rev 1.5
Typical Operating Circuit
+5V Regulator
VCC
PFI
MR
(RESET)
WDI
WDO
PFO
VCC
(RESET)
I/O LINE
NMI
INTERRUPT
Unregulated DC
R1
R2
µP
ASM705
ASM706
(ASM813L)
RESET RESET
General Description
The ASM705 / 706 / 707 / 708 and AS813L are cost effective
CMOS supervisor circuits that monitors power-supply and
battery voltage level, and µP/µC operation.
The family offers several functional options. Each device
generates a reset signal during power-up, power-down and
during brownout conditions. A reset is generated when the
supply drops below 4.65V (ASM705/707/813L) or 4.40V
(ASM706/708). For 3V power supply applications, refer to the
ASM705P/R/S/T data sheet. In addition, the ASM7 05/706/813L
feature a 1.6 second watchdog timer. The ASM707/708 have
both active-HIGH and active-LOW reset outputs but no
watchdog function. The ASM813L has the same pin-out and
functions as the ASM705 but has an active-HIGH reset output.
A versatile pow er-fail cir cuit has a 1.25V threshold, useful in low
battery detection and for monitoring non-5V supplies. All
devices have a manual reset (MR) input. The watchdog timer
output will trigger a reset if connecte d to MR.
All devices are available in 8-pin DIP, SO and MicroSO
packages.
Features
Precision power supply monitor
•4.65V threshold (ASM705/707/813L )
•4.40V threshold (ASM706/708)
Debounced manual reset input
Voltage monitor
•1.25V threshold
•Battery monitor / Auxiliary supply monitor
Watchdog timer (ASM705/706/813L)
200ms reset pulse width
Active HIGH reset output (ASM707/708/813L )
MicroSO package
Applications
Computers and embedded controllers
Portable/Battery-operated systems
Intelligent instruments
Wireless communication systems
PDAs and hend-held equipment
Automative Systems
Safety Systems
ASM705 / 706 / 707 / 708
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Notice: The information in this document is subject to change without notice
Low Power µP Supervisor Circuits
ASM813L
rev 1.5
February 2005
Block Diagrams
Pin Configuration
Transition Watchdog
Timebase
RESET
WDI WDO
RESET
(RESET) ASM813L
MR
VCC
PFI
PFO
GND
Detector Timer
Generator
+
-
+
-
VCC
0.25mA
ASM705 1.25V
+
ASM813L
4.65V (ASM705/813L)
4.40V (ASM706)
ASM706
RESET RESET
MR
VCC
PFI
PFO
GND
Generator
+
-
+
-
VCC
ASM707 1.25V
+
RESET
4.65V (ASM707)
4.40V (ASM708)
0.25mA
ASM708
MR
V
CC
GND
PFI
RESET
RESET
NC
PFO
1
2
3
45
6
7
8MR
V
CC
GND
PFI
(RESET)
PFO
1
2
3
45
6
7
8WDI
MR
V
CC
GND
PFI
RESET
PFO
1
2
3
45
6
7
8
WDI
WDO
RESET
NC
MR
V
CC
GND
PFI
RESET
PFO
1
2
3
45
6
7
8
WDO
DIP/SO MicroSO
ASM705
RESET
(RESET)
ASM706
(ASM813L)
ASM707
ASM708
ASM705
ASM706
(ASM813L)
ASM707
ASM708
ASM705 / 706 / 707 / 708
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Notice: The information in this document is subject to change without notice
Low Power µP Supervisor Circuits
ASM813L
rev 1.5
February 2005
Pin Description
Pin Number
Name Function
ASM705/706 ASM707/708 ASM813L
DIP/
SO MicroSO DIP/
SO MicroSO DIP/
SO MicroSO
131313MR
Manual reset input. The active LOW input triggers a reset
pulse. A 250 µA pull-up current allows the pin to be
driven by TTL/CMOS logic or shorted to ground with a
switch.
242424
VCC +5V power supply input.
353535GNDGround reference for all signals.
464646PFI
Power-fail input voltage monitor. With PFI less than
1.25V, PFO goes LOW. Connect PFI to Ground or VCC
when not in use.
575757PFO
Power-fail output. The output is active LOW and sinks
current when PFI is less than 1.25V.
68- -68WDI
Watchdog input. WDI controls the internal watchdog
timer. A HIGH or LOW signal for 1.6sec at WDI allows
the internal timer to run-out, setting WDO LOW. The
watchdog function is disabled by floating WDI or by con-
necting WDI to a high impedance three-state buffer. The
internal watchdog timer clears when: RESET is asserted;
WDI is three-stated ; or WDI sees a rising or falling edge.
- - 6 8 - - NC Not Connected
7 1 7 1 - - RESET
Active LOW reset output. Pulses LOW for 200ms when
triggered, and stays LOW whenever VCC is below the
reset threshold. RESET remains LOW for 200ms after
VCC rises above the reset threshold or MR goes from
LOW to HIGH. A watchdog timeout will not trigger
RESET unless WDO is connected to MR.
82- -82WDO
W atchdog output. WDO goes LOW when the 1.6 second
internal watchdog timer times-out and does not go HIGH
until the watchdog is cleared. In addition, when VCC falls
below the reset threshold, WDO goes LOW. Unlike
RESET, WDO does not have a minimum pulse width and
as soon as VCC exceeds the reset threshold, WDO goes
HIGH with no delay.
- - 8 2 7 1 RESET Active HIGH reset output. The inverse of RESET. The
ASM813L only has a RESET output.
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Low Power µP Supervisor Circuits
ASM705 / 706 / 707 / 708
ASM813L
rev 1.5
February 20 05
Detailed Description
A proper reset input enables a microprocessor /
microcontroller to start in a known state. ASM70X and
ASM813L assert reset to prevent code execution errors
during power-up, power-down and brow n-out conditions.
RESET/RESET Timing
The RESET/RESET signals are designed to start a µP/µC in
a known state or return the system to a known state.
The ASM707/708 have two reset outputs, one active-HIGH
RESET and one active-LOW RESET output. The ASM813L
has only an active-HIGH output. RESET is simply the
complement of RESET.
RESET is guaranteed to be LOW with VCC above 1.2V.
During a power-up sequence, RESET remains low until the
supply rises above the threshold level, either 4.65V or 4.40V.
RESET goes high approximately 200ms after crossing the
threshold.
During power-down, RESET goes LOW as VCC falls below
the threshold level and is guaranteed to be under 0.4V with
VCC above 1.2V.
In a brownout situation where VCC falls below the threshold
level, RESET pulses low. If a brown-out occurs during an
already initiated reset, the pulse will continue for a minimum
of 140ms.
Power Failure Detection With Auxiliary Comparator
All devices have an auxiliary comparator with 1.25V trip point
and uncommitted output (PFO) and noninverting input (PFI).
This comparator can be used as a supply voltage monitor
with an external resistor voltage divider. The attenuated
voltage at PFI should be set just below the 1.25 threshold. As
the supply level falls, PFI is reduced causing the PFO output
to transit LOW. Normally PFO interrupts the processor so the
system can be shut down in a controlled manner.
Manual Reset (MR)
The active-LOW manual reset input is pulled high by a 250µA
pull-up current and can be driven low by CMOS/TT L logic or
a mechanical switch to ground. An external debounce circuit
is unnecessary since the 140ms minimum reset time will
debounce mechanical pushbutton switches.
By connecting the watchdog output (WDO) and MR, a
watchdog timeout forces RESET to be generated. The
ASM813L should be used when an active-HIGH RESET is
required.
Watchdog Timer
The watchdog timer available on the ASM705/706/813L
monitors µP/µC activity. An output line on the processor is
used to toggle the WDI line. If this line is not toggled within
1.6 seconds, the internal timer puts the watchdog output,
WDO, into a LOW state. WDO w ill re ma in LOW u ntil a toggle
is detected at WDI.
If WDI is floated or connected to a three-stated circuit, the
watchdog function is disabled, m eaning, it is cleared and not
counting. The watchdog timer is also disabled if RESET is
asserted. When RESET becomes inactive and the WDI input
sees a high or low transition as short as 50ns, the watchdog
timer will begin a 1.6 second countdown. Additional
Figure 1: WDI Th ree-state operation
5V
VCC
RESET
MR
WDO
5V
5V
5V
0V
0V
0V
0V
MR externally
set low tMD
tMR
tRS
VRT
tRS
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Notice: The information in this document is subject to change without notice
Low Power µP Supervisor Circuits
ASM705 / 706 / 707 / 708
ASM813L
rev 1.5
February 20 05
transitions at WDI wil l reset the watchdog timer a nd initiate a
new countdown sequence.
WDO will also become LOW and remain so, whenever the
supply voltage, VCC , falls below the device threshold level.
WDO goes HIGH as soon as VCC transitions above the
threshold. There is no minimum pulse width for WDO as
there is for the RESET outputs. If WDI is floated, WDO
essentially acts as a low-power output indicator.
Application Information
Ensuring That RESET is Valid Down to VCC = 0V
When VCC falls below 1.1V, the ASM705-708 RESET output
no longer pulls down; it becomes indeterminate. To avoid the
possibility that stray charges build up and force RE SET to the
wrong state, a pull-down resistor should be connected to the
RESET pin, thus draining such charges to ground and
holding RESET low . The resistor value is not critical. A 100k
resistor will pull RESET to ground without loading it.
Bi-directional Reset Pin Interfac ing
The ASM705/6/7/8 can interface with µP/µC bi-directional
reset pins by connecting a 4.7k resistor in series with the
RESET output and the µP/µC bi-directional RESET pin.
Monitoring Volt ages Other Than VCC
The ASM705-708 can monitor voltages other than VCC using
the Power Fail circuitry. If a resistive divider is connected
from the voltage to be monitored to the Power Fail input
(PFI), the PFO will go LOW if the voltage at PFI goes below
1.25V reference. Should hysteresis be desired, connect a
resistor (equal to appro ximately 10 times the sum of the two
resistors in the divider) between the PFI and PFO pins. A
capacitor between PFI and GND will reduce circuit sensitivity
to input high-frequency noise. If it is desired to assert a
RESET for voltages other than VCC then the PFO output is to
be connected to the MR.
Supply Voltage
BUF Buffered
RESET
V
CC
ASM70x
GND GND
RESET RESET
Input
µC or µP
4.7k
Bi-directional I/O Pin
Figure 3: Bi-dir ect i on a l R eset Pin Interfacing
VCC
PFI
MR
PFO
VIN
R1
R2
ASM70x
RESET
GND
+5V
To
µP
Figure 4: Monitoring +5V and an additional supply V IN
WDI
WDO
RESET
RESET
Figure 2: Watchdog Timing
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Notice: The information in this document is subject to change without notice
Low Power µP Supervisor Circuits
ASM705 / 706 / 707 / 708
ASM813L
rev 1.5
February 20 05
Monitoring a Negative Voltage
The Power-Fail circuitry can also monitor a negative supply
rail. When the negative rail is OK, PFO will be LOW, and
when the negative rail is failing (not negative enough), PFO
goes HIGH (the opposite of when positive voltages are
monitored). To trigger a reset, these outputs need to be
inverted: adding the resistors and transistor as shown
achieves this. The RESET output will then have the same
sense as for positive voltages: good = HIGH, bad = LOW. It
should be noted that this circuit’s accuracy depends on the
VCC line, the PFI threshold tolerance, and the resistors.
VCC
PFI
MR
PFO
VCC
R1
R2
ASM70x
RESET
GND To
µP
Figure 5: Monitoring a negative voltage
2N3904
R3
R4
VCC - 1.25
R1=1.25 - VTRIP
R2
Negative Input Voltage
+
ASM705 / 706 / 707 / 708
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Notice: The information in this document is subject to change without notice
Low Power µP Supervisor Circuits
ASM813L
rev 1.5
February 2005
Absolute Maximum Ratings
Parameter Min Max Unit
Pin Terminal Voltage with Respect to Ground
VCC -0.3 6.0 V
All other inputs 1-0.3 VCC + 0.3 V
Input Current at VCC and GND 20 mA
Output Current: All outputs 20 mA
Rate of Rise at VCC 100 V/µs
Plastic DIP Power Dissipation
(Derate 9mW/°C above 70°C) 700 mV
SO Power Dissipation
(Derate 5.9mW/°C above 70°C) 470 mW‘
MicroSO Power Dissipation
(Derate 4.1mW/°C above 70°C) 330 mW
Operating Temperature Range
ASM705E/706E/707E/708E/813LE -40 +85 °C
ASM705C/706C/707C/708C/813LC 0 70 °C
Storage Temperature Range -65 160 °C
Lead Temperature (Soldering 10sec) 300 °C
ESD rating HBM
MM 2
200 KV
V
Note:
1. The input voltage limits of PFI and MR can be exceeded if the input current is less than 10mA.
These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for pro-
longed time periods may affect device reliability.
ASM705 / 706 / 707 / 708
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Low Power µP Supervisor Circuits
ASM813L
rev 1.5
February 2005
Electrical Characteristics
Unless otherwise noted, specifications are over the operating temperature range and VCC supply voltages are 2.7V to 5.5V (ASM706P,
ASM708R), 3.0 V to 5.5V (ASM706/708S), 3.15V to 5.5V (ASM706/708T) and 4.1V to 5.5.V (ASM706/708J)
Parameter Symbol Conditions Min Typ Max Unit
Operating Vo ltage
Range VCC
ASM705/6/7/8C 1.2 5.5
V
ASM813L 1.1 5.5
ASM705/6/7/8E, ASM813E 1.2 5.5
Supply Curre nt ICC
ASM705/706C/813LC 75 140
µA
ASM705E/706E/813LE 75 140
ASM707C/708C 50 140
ASM707E/708E 50 140
RESET Threshold VRT ASM705/707/813L, Note 1 4.50 4.65 4.75 V
ASM706/708 Note 1 4.25 4.40 4.50
RESET Threshold
Hysteresis Note 1 40 mV
RESET Pulse Width tRS Note 1 140 200 280 ms
MR Pulse Width tMR 0.15 µs
MR to RESET Out
Delay tMD Note 1 0.25 µs
MR Input Threshol d VIH 2.0 V
VIL 0.8
MR Pullup current MR = 0V 100 250 600 µA
RESET Output Voltage
ISOURCE = 800µA VCC - 1.5
V
ISINK = 3.2mA 0.4
ASM705/6/7/8, VCC = 1.2V, ISINK = 100µA 0.3
RESET Output Voltage
ASM707/8/813L, ISOURCE = 800µA VCC-1.5
V
ASM707/8, ISINK = 1.2mA 0.4
ASM813L, ISINK =3.2mA 0.4
ASM813L, VCC = 1.2V, ISOURCE = 4µA 0.9
ASM705 / 706 / 707 / 708
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Low Power µP Supervisor Circuits
ASM813L
rev 1.5
February 2005
Notes 1: RESET (ASM705/6/7/8), RESET(ASM707/8, ASM813L)
Watch dog Timeout
Period tWD ASM705/6/813L 1.00 1.60 2.25 s
WDI Pulse Width tWP VIL = 0.4V, VIH=0.8VCC,50 ns
WDI Input Threshold VIH ASM705/706/813L, VCC = 5V 3.5 V
VIL 0.8
WDI Input Current ASM705/6/813L, WDI = VCC 50 150 µA
ASM705/6/813L, WDI = 0V -150 -50
WDO Output Voltage VOH ASM705/6/813L, ISOURCE = 800µA VCC - 1.5 V
VOL ASM705/6/813L, ISINK = 1.2mA 0.4
PFI Input Threshold VCC = 5V 1.2 1.25 1.3 V
PFI Input Current -25 0.01 25 nA
PFO Output Voltage VOH ISOURCE = 800µA VCC - 1.5 V
VOL ISINK = 3.2mA 0.4
Parameter Symbol Conditions Min Typ Max Unit
ASM705 / 706 / 707 / 708
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Notice: The information in this document is subject to change without notice
Low Power µP Supervisor Circuits
ASM813L
rev 1.5
February 2005
Package Dimensions
8-Pin MicroSO
Inches Millimeteres
Min Max Min Max
A 0.032 0.044 0.81 1.10
A1 0.002 0.006 0.05 0.15
A2 0.030 0.038 0.76 0.97
b 0.012 BSC 0.30 BSC
C 0.004 0.008 0.10 0.20
D 0.114 0.122 2.90 3.10
e 0.0256 BSC 0.65 BSC
E 0.184 0.200 4.67 5.08
E1 0.114 0.122 2.90 3.10
L 0.016 0.026 0.41 0.66
S 0.0206 BSC 0.52 BSC
a0°6°0°6°
E1 E
D
A
A1
A2
eb
C
L
a
0.10mm
0.004in
S
ASM705 / 706 / 707 / 708
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Notice: The information in this document is subject to change without notice
Low Power µP Supervisor Circuits
ASM813L
rev 1.5
February 2005
Package Dimensions (contd)
Plastic DIP (8-Pin)
Symbol Dimensions
Inches Millimeters
Min Max Min Max
A0.210 5.33
A1 0.015 0.38
A2 0.115 0.195 2.92 4.95
b 0.014 0.022 0.36 0.56
b2 0.045 0.070 1.14 1.78
C 0.008 0.014 0.20 0.36
D 0.355 0.400 9.02 10.16
E 0.300 0.325 7.62 8.26
E1 0.240 0.280 6.10 7.11
e 0.10 BSC 2.54 BSC
eB 0.430 10.92
L 0.115 0.150 2.92 3.81
ASM705 / 706 / 707 / 708
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Notice: The information in this document is subject to change without notice
Low Power µP Supervisor Circuits
ASM813L
rev 1.5
February 2005
Package Dimensions (contd)
SO (8-Pin)
Symbol Dimensions
Inches Millimeters
Min Max Min Max
A1 0.004 0.010 0.10 0.25
A 0.053 0.069 1.35 1.75
A2 0.049 0.059 1.25 1.50
B 0.012 0.020 0.31 0.51
C 0.007 0.010 0.18 0.25
D 0.193 BSC 4.90 BSC
E 0.154 BSC 3.91 BSC
e 0.050 BSC 1.27 BSC
H 0.236 BSC 6.00 BSC
L 0.016 0.050 0.41 1.27
θ
D
EH
D
A1
A2
A
θ
L
C
B
e
ASM705 / 706 / 707 / 708
13 of 16
Notice: The information in this document is subject to change without notice
Low Power µP Supervisor Circuits
ASM813L
rev 1.5
February 2005
Ordering Codes
Part Number Reset Threshold Temperature Pins-Package Package Marking
TIN - LEAD DEVICES
ASM705 Active LOW Reset, Watchdog Output And Manual RESET
ASM705CPA 4.65 0°C to +70 °C 8-Plastic DIP ASM705CPA
ASM705CSA 4.65 0°C to +70 °C 8-SO ASM705CSA
ASM705CUA 4.65 0°C to +70 °C 8-MicroSO ASM705CUA
ASM705EPA 4.65 -40°C to +85°C 8-Plastic DIP ASM705EPA
ASM705ESA 4.65 -40°C to +85°C 8-SO ASM705ESA
ASM705EUA 4.65 -40°C to +85°C 8-MicroSO ASM705EUA
ASM706 Active LOW Reset, Watchdog Output And Manual RESET
ASM706CPA 4.40 0°C to +70 °C 8-Plastic DIP ASM706CPA
ASM706CSA 4.40 0°C to +70 °C 8-SO ASM706CSA
ASM706CUA 4.40 0°C to +70 °C 8-MicroSO ASM706CUA
ASM706EPA 4.40 -40°C to +85°C 8-Plastic DIP ASM706EPA
ASM706ESA 4.40 -40°C to +85°C 8-SO ASM706ESA
ASM707 Active LOW & HIGH Reset with Manual RESET
ASM707CPA 4.65 0°C to +70 °C 8-Plastic DIP ASM707CPA
ASM707CSA 4.65 0°C to +70 °C 8-SO ASM707CSA
ASM707CUA 4.65 0°C to +70 °C 8-MicroSO ASM707CUA
ASM707EPA 4.65 -40°C to +85°C 8-Plastic DIP ASM707EPA
ASM707ESA 4.65 -40°C to +85°C 8-SO ASM707ESA
ASM708Active LOW & HIGH Reset with Manual RESET
ASM708CPA 4.40 0°C to +70 °C 8-Plastic DIP ASM708CPA
ASM708CSA 4.40 0°C to +70 °C 8-SO ASM708CSA
ASM708CUA 4.40 0°C to +70 °C 8-MicroSO ASM708CUA
ASM708EPA 4.40 -40°C to +85°C 8-Plastic DIP ASM708EPA
ASM708ESA 4.40 -40°C to +85°C 8-SO ASM708ESA
ASM813L Active HIGH Reset, Watchdog Output And Manual RESET
ASM813LCPA 4.65 0°C to +70 °C 8-Plastic DIP ASM813LCPA
ASM813LCSA 4.65 0°C to +70 °C 8-SO ASM813LCSA
ASM813LCUA 4.65 0°C to +70 °C 8-MicroSO ASM813LCUA
ASM813LEPA 4.65 -40°C to +85°C 8-Plastic DIP ASM813LEPA
ASM813LESA 4.65 -40°C to +85°C 8-SO ASM813LESA
ASM705 / 706 / 707 / 708
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Notice: The information in this document is subject to change without notice
Low Power µP Supervisor Circuits
ASM813L
rev 1.5
February 2005
Ordering Codes
Note:
For parts to be packed in Tape and Reel, add “-T” at the end of the part number.
Part Number Reset Threshold Temperature Range Pins-Package Package Marking
LEAD FREE DEVICES
ASM705 Active LOW Reset, Watchdog Output And Manual RESET
ASM705CPAF 4.65 0 °C to +70 °C 8-Plastic DIP ASM705CPAF
ASM705CSAF 4.65 0°C to +70 °C 8-SO ASM705CSAF
ASM705CUAF 4.65 0°C to +70 °C 8-MicroSO ASM705CUAF
ASM705EPAF 4.65 -40°C to +85°C 8-Plastic DIP ASM705EPAF
ASM705ESAF 4.65 -40°C to +85°C 8-SO ASM705ESAF
ASM705EUAF 4.65 -40°C to +85°C 8-MicroSO ASM705EUAF
ASM706 Active LOW Reset, Watchdog Output And Manual RESET
ASM706CPAF 4.40 0 °C to +70 °C 8-Plastic DIP ASM706CPAF
ASM706CSAF 4.40 0°C to +70 °C 8-SO ASM706CSAF
ASM706CUAF 4.40 0°C to +70 °C 8-MicroSO ASM706CUAF
ASM706EPAF 4.40 -40°C to +85°C 8-Plastic DIP ASM706EPAF
ASM706ESAF 4.40 -40°C to +85°C 8-SO ASM706ESAF
ASM707 Active LOW & HIGH Reset with Manual RESET
ASM707CPAF 4.65 0 °C to +70 °C 8-Plastic DIP ASM707CPAF
ASM707CSAF 4.65 0°C to +70 °C 8-SO ASM707CSAF
ASM707CUAF 4.65 0°C to +70 °C 8-MicroSO ASM707CUAF
ASM707EPAF 4.65 -40°C to +85°C 8-Plastic DIP ASM707EPAF
ASM707ESAF 4.65 -40°C to +85°C 8-SO ASM707ESAF
ASM708Active LOW & HIGH Reset with Manual RESET
ASM708CPAF 4.40 0 °C to +70 °C 8-Plastic DIP ASM708CPAF
ASM708CSAF 4.40 0°C to +70 °C 8-SO ASM708CSAF
ASM708CUAF 4.40 0°C to +70 °C 8-MicroSO ASM708CUAF
ASM708EPAF 4.40 -40°C to +85°C 8-Plastic DIP ASM708EPAF
ASM708ESAF 4.40 -40°C to +85°C 8-SO ASM708ESAF
ASM813L Active HIGH Reset, Watchdog Output And Manual RESET
ASM813LCPAF 4.65 0°C to +70 °C 8-Plastic DIP ASM813LCPAF
ASM813LCSAF 4.65 0°C to +70 °C 8-SO ASM813LCSAF
ASM813LCUAF 4.65 0°C to +70 °C 8-MicroSO ASM813LCUAF
ASM813LEPA F 4.65 -40°C to +85°C 8-Plastic DIP ASM813LEPAF
ASM813LESAF 4.65 -40°C to +85°C 8-SO ASM813LESAF
ASM705 / 706 / 707 / 708
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Low Power µP Supervisor Circuits
ASM813L
rev 1.5
February 2005
Feature Summary
ASM705 ASM706 ASM707 ASM708 ASM813L
Power fail detector 
Brownout detection 
Manual RESET input 
Power-up/down RESET 
Watchdog Timer 
Active HIGH RESET output 
Active LOW RESET output 
RESET Threshold (V) 4.65 4.40 4.65 4.40 4.65
Alliance Semiconductor Corporation
2575, Augustine Drive,
Santa Clara, CA 95054
Tel: 408 - 855 - 4900
Fax: 408 - 855 - 4999
www.alsc.com
Copyright © Alliance Semiconductor
All Rights Reserved
Part Number:ASM705 / 706 / 707 / 708
ASM813L
Document Version: 1.5
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