TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS Copyright (c) 2000, Power Innovations Limited, UK MARCH 1994 - REVISED MARCH 2000 TELECOMMUNICATION SYSTEM SECONDARY PROTECTION Patented Ion-Implanted Breakdown Region - Precise DC and Dynamic Voltages D PACKAGE (TOP VIEW) T 1 8 G V NC 2 7 NU 100 125 NC 3 6 NU 120 150 R 4 5 G `7180F3 145 180 `7240F3 180 240 `7260F3 200 260 `7290F3 220 290 `7320F3 240 320 `7350F3 275 350 T 1 8 G `7380F3 270 380 NC 2 7 NU NC 3 6 NU R 4 5 G V DRM V(BO) V `7125F3 `7150F3 DEVICE P PACKAGE (TOP VIEW) For new designs use `7350F3 instead of `7380F3 Planar Passivated Junctions - Low Off-State Current ....................< 10 A Rated for International Surge Wave Shapes - Single and Simultaneous Impulses ITSP STANDARD 2/10 GR-1089-CORE 190 8/20 IEC 61000-4-5 175 T 1 10/160 FCC Part 68 110 G 2 70 R 3 10/700 A ITU-T K.20/21 10/560 FCC Part 68 50 10/1000 GR-1089-CORE 45 MDXXAJA NC - No internal connection NU - Nonusable; no external electrical connection should be made to these pins. Specified ratings require connection of pin 5 and pin 8. SL PACKAGE (TOP VIEW) WAVE SHAPE FCC Part 68 MDXXAL MDXXAGA MD7XAACA device symbol ..................UL Recognized Component T R description The TISP7xxxF3 series are 3-point overvoltage protectors designed for protecting against metallic (differential mode) and simultaneous longitudinal (common mode) surges. Each terminal pair has the same voltage limiting values and surge current capability. This terminal pair surge capability ensures that the protector can meet the simultaneous longitudinal surge requirement which is typically twice the metallic surge requirement. SD7XAB G Terminals T, R and G correspond to the alternative line designators of A, B and C AVAILABLE OPTIONS DEVICE PRODUCT PACKAGE CARRIER ORDER # TAPE AND REEL TISP7xxxF3DR TUBE TISP7xxxF3D TISP7xxxF3 D, Small-outline TISP7xxxF3 P, Plastic DIP TUBE TISP7xxxF3P TISP7xxxF3 SL, Single-in-line TUBE TISP7xxxF3SL INFORMATION Information is current as of publication date. Products conform to specifications in accordance with the terms of Power Innovations standard warranty. Production processing does not necessarily include testing of all parameters. 1 TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 description (continued) Each terminal pair has a symmetrical voltage-triggered thyristor characteristic. Overvoltages are initially clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. This low-voltage on state causes the current resulting from the overvoltage to be safely diverted through the device. The high crowbar holding current prevents d.c. latchup as the diverted current subsides.These protectors are guaranteed to voltage limit and withstand the listed lightning surges in both polarities. These medium and high voltage devices are offered in nine voltage variants to meet a range battery and ringing voltage requirements. They are guaranteed to suppress and withstand the listed international lightning surges on any terminal pair. Similar devices with working voltages of 58 V and 66 V are detailed in the TISP7072F3, TISP7082F3 data sheet. absolute maximum ratings, TA = 25 C (unless otherwise noted) RATING SYMBOL VALUE UNIT Repetitive peak off-state voltage, 0 C < TA < 70 C `7125F3 100 `7150F3 120 `7180F3 145 `7240F3 `7260F3 VDRM 180 200 `7290F3 220 `7320F3 240 `7350F3 275 `7380F3 270 V Non-repetitive peak on-state pulse current (see Notes 1 and 2) 1/2 (Gas tube differential transient, 1/2 voltage wave shape) 330 2/10 (Telcordia GR-1089-CORE, 2/10 voltage wave shape) 190 1/20 (ITU-T K.22, 1.2/50 voltage wave shape, 25 resistor) 100 8/20 (IEC 61000-4-5, combination wave generator, 1.2/50 voltage wave shape) 175 10/160 (FCC Part 68, 10/160 voltage wave shape) 110 IPPSM 4/250 (ITU-T K.20/21, 10/700 voltage wave shape, simultaneous) 0.2/310 (CNET I 31-24, 0.5/700 voltage wave shape) 95 A 70 5/310 (ITU-T K.20/21, 10/700 voltage wave shape, single) 70 5/320 (FCC Part 68, 9/720 voltage wave shape, single) 70 10/560 (FCC Part 68, 10/560 voltage wave shape) 50 10/1000 (Telcordia GR-1089-CORE, 10/1000 voltage wave shape) 45 Non-repetitive peak on-state current, 0 C < TA < 70 C (see Notes 1 and 3) 50 Hz, 1s D Package P Package 4.3 ITSM SL Package Initial rate of rise of on-state current, Linear current ramp, Maximum ramp value < 38 A Junction temperature Storage temperature range 5.7 A 7.1 diT/dt 250 A/s TJ -65 to +150 C Tstg -65 to +150 C NOTES: 1. Initially the TISP(R) must be in thermal equilibrium at the specified TA. The surge may be repeated after the TISP(R) returns to its initial conditions. The rated current values may be applied singly either to the R to G or to the T to G or to the T to R terminals. Additionally, both R to G and T to G may have their rated current values applied simultaneously (In this case the total G terminal current will be twice the above rated current values). 2. See Thermal Information for derated IPPSM values 0 C < TA < 70 C and Applications Information for details on wave shapes. 3. Above 70 C, derate ITSM linearly to zero at 150 C lead temperature. PRODUCT 2 INFORMATION TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 electrical characteristics for all terminal pairs, TA = 25 C (unless otherwise noted) PARAMETER IDRM V(BO) TEST CONDITIONS Repetitive peak offstate current dv/dt 1000 V/s, Linear voltage ramp, V(BO) TYP V D = VDRM, 0 C < TA < 70 C dv/dt = 250 V/ms, R SOURCE = 300 Breakover voltage MIN Impulse breakover Maximum ramp value = 500 V voltage di/dt = 20 A/s, Linear current ramp, Maximum ramp value = 10 A Breakover current dv/dt = 250 V/ms, R SOURCE = 300 VT On-state voltage IT = 5 A, tW = 100 s IH Holding current IT = 5 A, di/dt = +/-30 mA/ms dv/dt ID Critical rate of rise of off-state voltage Off-state current Coff Off-state capacitance 150 `7180F3 180 `7240F3 240 `7260F3 260 `7290F3 290 `7320F3 320 `7350F3 350 `7380F3 380 `7125F3 143 `7150F3 168 `7180F3 198 `7240F3 269 `7260F3 289 `7290F3 319 `7320F3 349 `7350F3 379 f = 1 MHz, Vd = 1 V rms, VD = -1 V f = 1 MHz, f = 1 MHz, Vd = 1 V rms, VD = -2 V Vd = 1 V rms, VD = -5 V Vd = 1 V rms, VD = -50 V Vd = 1 V rms, VD = -100 V Vd = 1 V rms, VDTR = 0 (see Note 4) NOTE V V 409 0.1 0.8 A 5 V 0.15 A 5 kV/s 10 V d = 1 V rms, VD = 0 f = 1 MHz, A 125 VD = 50 V f = 1 MHz, f = 1 MHz, 10 `7150F3 Linear voltage ramp, Maximum ramp value < 0.85V DRM f = 1 MHz, UNIT `7125F3 `7380F3 I(BO) MAX `7125 thru `7180 37 48 `7240 thru `7380 31 41 `7125 thru `7180 40 52 `7240 thru `7380 34 44 `7125 thru `7180 36 47 `7240 thru `7380 30 39 `7125 thru `7180 31 40 `7240 thru `7380 24 31 `7125 thru `7180 17 23 `7240 thru `7380 13 17 `7125 thru `7180 14 18 `7240 thru `7380 10 13 `7125 thru `7180 20 27 `7240 thru `7380 17 23 A pF 4: Three-terminal guarded measurement, unmeasured terminal voltage bias is zero. First six capacitance values, with bias VD, are for the R-G and T-G terminals only. The last capacitance value, with bias VDTR, is for the T-R terminals. PRODUCT INFORMATION 3 TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 thermal characteristics PARAMETER R JA MIN TEST CONDITIONS P tot = 0.8 W, TA = 25C Junction to free air thermal resistance 5 cm 2, FR4 PCB TYP D Package MAX UNIT 160 P Package 100 SL Package 135 C/W PARAMETER MEASUREMENT INFORMATION +i Quadrant I ITSP Switching Characteristic ITSM V(BO) I(BO) IH IDRM VDRM -v VD ID ID VD VDRM +v IDRM IH I(BO) V(BO) ITSM Quadrant III ITSP Switching Characteristic -i Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR T AND R TERMINALS T and G and R and G measurements are referenced to the G terminal T and R measurements are referenced to the R terminal PRODUCT 4 INFORMATION PMXXAAA TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 TYPICAL CHARACTERISTICS R and G, or T and G terminals TISP7125F3 THRU TISP7180F3 TISP7240F3 THRU TISP7380F3 OFF-STATE CURRENT vs OFF-STATE CURRENT vs JUNCTION TEMPERATURE JUNCTION TEMPERATURE TC7MAC 100 10 10 VD = 50 V 1 0*1 VD = -50 V ID - Off-State Current - A ID - Off-State Current - A TC7HAC 100 VD = 50 V 1 VD = -50 V 0*1 0*01 0*01 0*001 -25 0 25 50 75 100 125 150 0*001 -25 0 TJ - Junction Temperature - C Figure 2. 100 125 150 JUNCTION TEMPERATURE TC7HAE TC7MAE Normalised Breakdown Voltages JUNCTION TEMPERATURE Normalised Breakdown Voltages 75 NORMALISED BREAKDOWN VOLTAGES vs vs 1.2 V(BO) V(BR)M 1.0 V(BR) 50 Figure 3. NORMALISED BREAKDOWN VOLTAGES 1.1 25 TJ - Junction Temperature - C 1.2 1.1 V(BO) V(BR)M 1.0 V(BR) Normalised to V(BR) Normalised to V(BR) I(BR) = 1 mA and 25C I(BR) = 1 mA and 25C Positive Polarity Positive Polarity 0.9 0.9 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C Figure 4. PRODUCT -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C Figure 5. INFORMATION 5 TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 TYPICAL CHARACTERISTICS R and G, or T and G terminals TISP7125F3 THRU TISP7180F3 TISP7240F3 THRU TISP7380F3 NORMALISED BREAKDOWN VOLTAGES NORMALISED BREAKDOWN VOLTAGES vs vs JUNCTION TEMPERATURE JUNCTION TEMPERATURE TC7HAF Normalised Breakdown Voltages Normalised Breakdown Voltages TC7MAF 1.2 1.1 1.0 V(BO) V(BR)M Normalised to V(BR) V(BR) 1.2 V(BR)M 1.1 V(BO) 1.0 I(BR) = 1 mA and 25C Negative Polarity Negative Polarity 0.9 0.9 -25 0 25 50 75 100 125 -25 150 0 25 50 75 Figure 6. 125 150 Figure 7. ON-STATE CURRENT ON-STATE CURRENT vs vs ON-STATE VOLTAGE ON-STATE VOLTAGE TC7MAL TC7HAL 100 100 Positive Polarity IT - On-State Current - A Positive Polarity 10 150C 10 150C 25C 25C -40C -40C 1 1 1 2 3 4 5 6 7 8 9 10 VT - On-State Voltage - V Figure 8. PRODUCT 6 100 TJ - Junction Temperature - C TJ - Junction Temperature - C IT - On-State Current - A Normalised to V(BR) V(BR) I(BR) = 1 mA and 25C INFORMATION 1 2 3 4 5 VT - On-State Voltage - V Figure 9. 6 7 8 9 10 TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 TYPICAL CHARACTERISTICS R and G, or T and G terminals TISP7125F3 THRU TISP7180F3 TISP7240F3 THRU TISP7380F3 ON-STATE CURRENT ON-STATE CURRENT vs ON-STATE VOLTAGE vs ON-STATE VOLTAGE TC7MAM 100 Negative Polarity IT - On-State Current - A Negative Polarity IT - On-State Current - A TC7HAM 100 10 150C 10 150C 25C 25C -40C -40C 1 1 1 2 3 4 5 6 7 8 9 10 1 2 VT - On-State Voltage - V 3 4 5 6 7 8 9 10 VT - On-State Voltage - V Figure 10. Figure 11. HOLDING CURRENT & BREAKOVER CURRENT HOLDING CURRENT & BREAKOVER CURRENT IH, I(BO) - Holding Current, Breakover Current - A IH, I(BO) - Holding Current, Breakover Current - A vs JUNCTION TEMPERATURE 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C Figure 12. PRODUCT 1*0 0*9 0*8 0*7 0*6 TC7HAH 0*5 0*4 0*3 +I(BO) 0*2 IH -I(BO) 0*1 0*09 0*08 0*07 0*06 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C Figure 13. INFORMATION 7 TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 TYPICAL CHARACTERISTICS R and G, or T and G terminals TISP7125F3 THRU TISP7180F3 TISP7240F3 THRU TISP7380F3 NORMALISED BREAKOVER VOLTAGE NORMALISED BREAKOVER VOLTAGE vs vs RATE OF RISE OF PRINCIPLE CURRENT TC7HAU Normalised Breakover Voltage Normalised Breakover Voltage RATE OF RISE OF PRINCIPLE CURRENT TC7MAU 1.2 Positive 1.1 1.2 Positive 1.1 Negative Negative 1.0 0*001 0*01 0*1 1 10 1.0 0*001 100 di/dt - Rate of Rise of Principle Current - A/s 0*01 0*1 100 Figure 15. SURGE CURRENT SURGE CURRENT vs DECAY TIME vs DECAY TIME TC7MAA 100 10 TC7HAA 1000 Maximum Surge Current - A 1000 Maximum Surge Current - A 10 di/dt - Rate of Rise of Principle Current - A/s Figure 14. 100 10 2 10 PRODUCT 8 1 100 1000 2 10 100 Decay Time - s Decay Time - s Figure 16. Figure 17. INFORMATION 1000 TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 TYPICAL CHARACTERISTICS R and T terminals TISP7125F3 THRU TISP7180F3 TISP7240F3 THRU TISP7380F3 OFF-STATE CURRENT vs OFF-STATE CURRENT vs JUNCTION TEMPERATURE JUNCTION TEMPERATURE TC7MAD 100 10 ID - Off-State Current - A 10 ID - Off-State Current - A TC7HAD 100 1 0*1 0*01 1 0*1 0*01 0*001 0*001 -25 0 25 50 75 100 125 150 -25 0 TJ - Junction Temperature - C 25 50 75 100 150 TJ - Junction Temperature - C Figure 18. Figure 19. NORMALISED BREAKDOWN VOLTAGES vs NORMALISED BREAKDOWN VOLTAGES vs JUNCTION TEMPERATURE JUNCTION TEMPERATURE TC7HAG Normalised Breakdown Voltages TC7MAG Normalised Breakdown Voltages 125 1.2 1.1 V(BO) 1.0 V(BR)M 1.2 1.1 V(BO) 1.0 V(BR)M V(BR) V(BR) 0.9 0.9 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C Figure 20. PRODUCT -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C Figure 21. INFORMATION 9 TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 TYPICAL CHARACTERISTICS R and T terminals TISP7125F3 THRU TISP7180F3 TISP7240F3 THRU TISP7380F3 ON-STATE CURRENT ON-STATE CURRENT vs ON-STATE VOLTAGE vs ON-STATE VOLTAGE TC7MAK 10 150C 10 150C 25C 25C -40C -40C 1 1 1 2 3 4 5 6 7 8 9 10 1 2 VT - On-State Voltage - V 4 5 6 7 8 9 10 Figure 23. HOLDING CURRENT & BREAKOVER CURRENT 1.0 0.9 0.8 0.7 TC7MAJ 0.6 0.5 0.4 I(BO) 0.3 IH HOLDING CURRENT & BREAKOVER CURRENT vs JUNCTION TEMPERATURE IH, I(BO) - Holding Current, Breakover Current - A vs JUNCTION TEMPERATURE 0.2 3 VT - On-State Voltage - V Figure 22. IH, I(BO) - Holding Current, Breakover Current - A TC7HAK 100 IT - On-State Current - A IT - On-State Current - A 100 1*0 0*9 0*8 0*7 0*6 0*5 TC7HAJ 0*4 0*3 IH 0*2 I(BO) 0*1 0*09 0*08 0*07 0*06 0.1 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C Figure 24. PRODUCT 10 INFORMATION -25 0 25 50 75 100 TJ - Junction Temperature - C Figure 25. 125 150 TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 TYPICAL CHARACTERISTICS R and T terminals TISP7125F3 THRU TISP7180F3 TISP7240F3 THRU TISP7380F3 NORMALISED BREAKOVER VOLTAGE NORMALISED BREAKOVER VOLTAGE vs vs RATE OF RISE OF PRINCIPLE CURRENT 0*01 0*1 1 10 100 di/dt - Rate of Rise of Principle Current - A/s Figure 26. PRODUCT TC7HAV 1.2 Normalised Breakover Voltage Normalised Breakover Voltage 1.1 1.0 0*001 RATE OF RISE OF PRINCIPLE CURRENT TC7MAV 1.2 1.1 1.0 0*001 0*01 0*1 1 10 100 di/dt - Rate of Rise of Principle Current - A/s Figure 27. INFORMATION 11 TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 THERMAL INFORMATION TISP7125F3 THRU TISP7180F3 TISP7240F3 THRU TISP7380F3 MAXIMUM NON-RECURRING 50 Hz CURRENT vs CURRENT DURATION MAXIMUM NON-RECURRING 50 Hz CURRENT vs CURRENT DURATION TI7HAA ITRMS - Maximum Non-Recurrent 50 Hz Current - A ITRMS - Maximum Non-Recurrent 50 Hz Current - A TI7MAA VGEN = 250 Vrms RGEN = 10 to 150 10 SL Package P Package D Package 1 0*1 1 10 100 VGEN = 350 Vrms RGEN = 20 to 250 10 1000 SL Package P Package D Package 1 0*1 1 10 100 t - Current Duration - s t - Current Duration - s Figure 28. Figure 29. 1000 THERMAL RESPONSE THERMAL RESPONSE TI7MAB 100 D Package P Package 10 SL Package 1 0*0001 0*001 0*01 0*1 1 10 100 t - Power Pulse Duration - s Figure 30. PRODUCT 12 INFORMATION 1000 Z J - Transient Thermal Impedance - C/W Z J - Transient Thermal Impedance - C/W TI7MAB 100 D Package P Package 10 SL Package 1 0*0001 0*001 0*01 0*1 1 10 t - Power Pulse Duration - s Figure 31. 100 1000 TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 THERMAL INFORMATION Non-repetitive peak on-state pulse derated values for 0 C TA 70 C RATING SYMBOL VALUE UNIT Non-repetitive peak on-state pulse current, 0 C < TA < 70 C (see Notes 5, 6 and 7) 1/2 (Gas tube differential transient, 1/2 voltage wave shape) 320 2/10 (Telcordia GR-1089-CORE, 2/10 voltage wave shape) 175 1/20 (ITU-T K.22, 1.2/50 voltage wave shape, 25 resistor) 90 8/20 (IEC 61000-4-5, combination wave generator, 1.2/50 voltage wave shape) 10/160 (FCC Part 68, 10/160 voltage wave shape) 4/250 (ITU-T K.20/21, 10/700 voltage wave shape, dual) 150 IPPSM 90 70 0.2/310 (CNET I 31-24, 0.5/700 voltage wave shape) 65 5/310 (ITU-T K.20/21, 10/700 voltage wave shape, single) 65 5/320 (FCC Part 68, 9/720 voltage wave shape) 65 10/560 (FCC Part 68, 10/560 voltage wave shape) 45 10/1000 (Telcordia GR-1089-CORE, 10/1000 voltage wave shape) 40 A NOTES: 5. Initially the TISP(R) must be in thermal equilibrium at the specified TA. The impulse may be repeated after the TISP (R) returns to its initial conditions. The rated current values may be applied either to the R to G or to the T to G or to the T to R terminals. Additionally, both R to G and T to G may have their rated current values applied simultaneously (In this case the total G terminal current will be twice the above rated current values). 6. See Applications Information for details on wave shapes. 7. Above 70 C, derate IPPSM linearly to zero at 150 C lead temperature. PRODUCT INFORMATION 13 TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 APPLICATIONS INFORMATION deployment These devices are three terminal overvoltage protectors. They limit the voltage between three points in the circuit. Typically, this would be the two line conductors and protective ground (Figure 32). Th3 Th1 Th2 Figure 32. MULTI-POINT PROTECTION In Figure 32, protectors Th2 and Th3 limit the maximum voltage between each conductor and ground to the V(BO) of the individual protector. Protector Th1 limits the maximum voltage between the two conductors to its V(BO) value. lightning surge wave shape notation Most lightning tests, used for equipment verification, specify a unidirectional sawtooth waveform which has an exponential rise and an exponential decay. Wave shapes are classified in terms of rise time in microseconds and a decay time in microseconds to 50% of the maximum amplitude. The notation used for the wave shape is rise time/decay time, without the microseconds quantity and the "/" between the two values has no mathematical significance. A 50A, 5/310 waveform would have a peak current value of 50 A, a rise time of 5 s and a decay time of 310 s. The TISP(R) surge current graph comprehends the wave shapes of commonly used surges. generators There are three categories of surge generator type: single wave shape, combination wave shape and circuit defined. Single wave shape generators have essentially the same wave shape for the open circuit voltage and short circuit current (e.g. 10/1000 open circuit voltage and short circuit current). Combination generators have two wave shapes, one for the open circuit voltage and the other for the short circuit current (e.g. 1.2/50 open circuit voltage and 8/20 short circuit current) Circuit specified generators usually equate to a combination generator, although typically only the open circuit voltage wave shape is referenced (e.g. a 10/700 open circuit voltage generator typically produces a 5/310 short circuit current). If the combination or circuit defined generators operate into a finite resistance the wave shape produced is intermediate between the open circuit and short circuit values. ITU-T 10/700 generator This circuit defined generator is specified in many standards. The descriptions and values are not consistent between standards and it is important to realise that it is always the same generator being used. Figure 33 shows the 10/700 generator circuit defined in ITU-T recommendation K.20 (10/96) "Resistibility of telecommunication switching equipment to overvoltages and overcurrents". The basic generator comprises of: capacitor C1, charged to voltage VC, which is the energy storage element. switch SW to discharge the capacitor into the output shaping network PRODUCT 14 INFORMATION TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 shunt resistor R1, series resistor R2 and shunt capacitor C2 form the output shaping network. series feed resistor R3 to connect to one line conductor for single surge series feed resistor R4 to connect to the other line conductor for dual surging VC 2.8 kV R3 25 R2 15 SW 70 A 5/310 T C1 20 F R1 50 R R 70 A 5/310 10/700 GENERATOR - SINGLE TERMINAL PAIR TEST G T AND G TEST R3 25 R2 15 R AND G TEST R1 50 C2 200 nF R AND T TEST 95 A 4/250 95 A 4/250 T C1 20 F T G R4 25 SW R G C2 200 nF VC 5.2 kV T R 190 A 4/250 G 10/700 GENERATOR - DUAL TERMINAL PAIR TEST DUAL T AND G, R AND G TEST Figure 33. In the normal single surge equipment test configuration, the unsurged line is grounded. This is shown by the dotted lines in the top drawing of Figure 33. However, doing this at device test places one terminal pair in parallel with another terminal pair. To check the individual terminal pairs of the TISP7xxxF3, without any paralleled operation, the unsurged terminal is left unconnected. With the generator output open circuit, when SW closes, C1 discharges through R1. The decay time constant will be C1R1, or 20 x 50 = 1000 s. For the 50% voltage decay time the time constant needs to be multiplied by 0.697, giving 0.697 x 1000 = 697 s which is rounded to 700 s. The output rise time is controlled by the time constant of R2 and C 2. which is 15 x 200 = 3000 ns or 3 s. Virtual voltage rise times are given by straight line extrapolation through the 30% and 90% points of the voltage waveform to zero and 100%. Mathematically this is equivalent to 3.24 times the time constant, which gives 3.24 x 3 = 9.73 which is rounded to 10 s. Thus the open circuit voltage rises in 10 s and decays in 700 s, giving the 10/700 generator its name. When the overvoltage protector switches it effectively shorts the generator output via the series 25 resistor. Two short circuit conditions need to be considered: single output using R3 only (top circuit of Figure 33) and dual output using R3 and R 4 (bottom circuit of Figure 33). For the single test, the series combination of R2 and R 3 (15 + 25 = 40 ) is in shunt with R1. This lowers the discharge resistance from 50 to 22.2 , giving a discharge time constant of 444 s and a 50% current decay time of 309.7 s, which is rounded to 310 s. For the rise time, R2 and R3 are in parallel, reducing the effective source resistance from 15 to 9.38 , giving a time constant of 1.88 s. Virtual current rise times are given by straight line extrapolation through the 10% and 90% points of the current waveform to zero and 100%. Mathematically this is equivalent to 2.75 PRODUCT INFORMATION 15 TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 times the time constant, which gives 2.75 x 1.88 = 5.15, which is rounded to 5 s. Thus the short circuit current rises in 5 s and decays in 310 s, giving the 5/310 wave shape. The series resistance from C1 to the output is 40 giving an output conductance of 25 A/kV. For each 1 kV of capacitor charge voltage, 25 A of output current will result. For the dual test, the series combination of R2 plus R3 and R4 in parallel (15 + 12.5 = 27.5 ) is in shunt with R1. This lowers the discharge resistance from 50 to 17.7 , giving a discharge time constant of 355 s and a 50% current decay time of 247 s, which is rounded to 250 s. For the rise time, R2, R 3 and R 4 are in parallel, reducing the effective source resistance from 15 to 6.82 , giving a time constant of 1.36 s, which gives a current rise time of 2.75 x 1.36 = 3.75, which is rounded to 4 s. Thus the short circuit current rises in 4 s and decays in 250 s, giving the 4/250 wave shape. The series resistance from C1 to an individual output is 2 x 27.5 = 55 giving an output conductance of 18 A/kV. For each 1 kV of capacitor charge voltage, 18 A of output current will result. At 25 C these protectors are rated at 70 A for the single terminal pair condition and 95 A for the dual condition (R and G terminals and T and G terminals). In terms of generator voltage, this gives a maximum generator setting of 70 x 40 = 2.8 kV for the single condition and 2 x 95 x 27.5 = 5.2 kV for the dual condition. The higher generator voltage setting for the dual condition is due to the current waveform decay being shorter at 250 s compared to the 310 s value of the single condition. Other ITU-T recommendations use the 10/700 generator: K.17 (11/88) "Tests on power-fed repeaters using solid-state devices in order to check the arrangements for protection from external interference" and K.21(10/ 96) "Resistibility of subscriber's terminal to overvoltages and overcurrents", K.30 (03/93) "Positive temperature coefficient (PTC) thermistors". Several IEC publications use the 10/700 generator, common ones are IEC 6100-4-5 (03/95) "Electromagnetic compatibility (EMC) - Part 4: Testing and measurement techniques - Section 5: Surge immunity test" and IEC 60950 (04/99) "Safety of information technology equipment". The IEC 60950 10/700 generator is carried through into other "950" derivatives. Europe is harmonised by CENELEC (Comite Europeen de Normalization Electro-technique) under EN 60950 (included in the Low Voltage Directive, CE mark). US has UL (Underwriters Laboratories) 1950 and Canada CSA (Canadian Standards Authority) C22.2 No. 950. FCC Part 68 "Connection of terminal equipment to the telephone network" (47 CFR 68) uses the 10/700 generator for Type B surge testing. Part 68 defines the open circuit voltage wave shape as 9/720 and the short circuit current wave shape as 5/320 for a single output. The current wave shape in the dual (longitudinal) test condition is not defined, but it can be assumed to be 4/250. Several VDE publications use the 10/700 generator, for example: VDE 0878 Part 200 (12/92) "Electromagnetic compatibility of information technology equipment and telecommunications equipment; Immunity of analogue subscriber equipment". 1.2/50 generators The 1.2/50 open circuit voltage and 8/20 short circuit current combination generator is defined in IEC 610004-5 (03/95) "Electromagnetic compatibility (EMC) - Part 4: Testing and measurement techniques - Section 5: Surge immunity test". This generator has a fictive output resistance of 2 , meaning that dividing the open circuit output voltage by the short circuit output current gives a value of 2 (500 A/kV). PRODUCT 16 INFORMATION TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 The combination generator has three testing configurations; directly applied for testing between equipment a.c. supply connections, applied via an external 10 resistor for testing between the a.c. supply connections and ground, and applied via an external 40 resistor for testing all other lines. For unshielded unsymmetrical data or signalling lines, the combination generator is applied via a 40 resistor either between lines or line to ground. For unshielded symmetrical telecommunication lines, the combination generator is applied to all lines via a resistor of n x 40 , where n is the number of conductors and the maximum value of external feed resistance is 250 . Thus for four conductors n = 4 and the series resistance is 4 x 40 = 160 . For ten conductors the resistance cannot be 10 x 40 = 400 and must be 250 . The combination generator is used for short distance lines, long distance lines are tested with the 10/700 generator. When the combination generator is used with a 40 , or more, external resistor, the current wave shape is not 8/20, but becomes closer to the open circuit voltage wave shape of 1.2/50. For example, a commercial generator when used with 40 produced an 1.4/50 wave shape. The wave shapes of 1.2/50 and 8/20 occur in other generators as well. British Telecommunication has a combination generator with 1.2/50 voltage and 8/20 current wave shapes, but it has a fictive resistance of 1 . ITU-T recommendation K.22 "Overvoltage resistibility of equipment connected to an ISDN T/S BUS" (05/95) has a 1.2/50 generator option using only resistive and capacitive elements, Figure 34. C4 8 nF VC 1 kV C1 1 F R2 13 SW R1 76 C3 8 nF C2 30 nF NOTE: SOME STANDARDS REPLACE OUTPUT CAPACITORS WITH 25 RESISTORS K.22 1.2/50 GENERATOR Figure 34. The K.22 generator produces a 1.4/53 open circuit voltage wave. Using 25 output resistors, gives a single short circuit current output wave shape of 0.8/18 with 26 A/kV and a dual of 0.6/13 with 20 A/kV. These current wave shapes are often rounded to 1/20 and 0.8/14. There are 8/20 short circuit current defined generators. These are usually very high current, 10 kA or more and are used for testing a.c. protectors, primary protection modules and some Gas Discharge Tubes. impulse testing To verify the withstand capability and safety of the equipment, standards require that the equipment is tested with various impulse wave forms. The table in this section shows some common test values. Manufacturers are being increasingly required to design in protection coordination. This means that each protector is operated at its design level and currents are diverted through the appropriate protector e.g. the primary level current through the primary protector and lower levels of current may be diverted through the secondary or inherent equipment protection. Without coordination, primary level currents could pass through the equipment only designed to pass secondary level currents. To ensure coordination happens with fixed voltage protectors, some resistance is normally used between the primary and secondary protection (R1a and R1b Figure 36). The values given in this data sheet apply to a 400 V (d.c. sparkover) gas discharge tube primary protector and the appropriate test voltage when the equipment is tested with a primary protector. PRODUCT INFORMATION 17 TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 CURRENT TISP7xxxF3 SERIES PEAK VOLTAGE VOLTAGE PEAK CURRENT SETTING WAVE FORM VALUE V s A s A 2500 2/10 2 x 500 2/10 2 x 190 1000 10/1000 2 x 100 10/1000 2 x 45 1500 10/160 200 10/160 110 6 800 10/560 100 10/560 50 8 1000 9/720 25 5/320 70 1500 (SINGLE) 37.5 5/320 70 STANDARD GR-1089-CORE FCC Part 68 (March 1998) I 31-24 ITU-T K20/K21 WAVE FORM 25 C RATING RESISTANCE COORDINATION RESISTANCE (MIN.) 12 NA NA 0 1500 (DUAL) 2 x 27 4/250 2 x 95 1500 0.5/700 37.5 0.2/310 70 0 NA 1000 10/700 25 5/310 70 0 NA 1500 (SINGLE) 37.5 5/310 70 0 NA 4000 (SINGLE) 100 5/310 70 17 6 4000 (DUAL) 2 x 72 4/250 2 x 95 0 6 FCC Part 68 terminology for the waveforms produced by the ITU-T recommendation K21 10/700 impulse generator NA = Not Applicable, primary protection removed or not specified. If the impulse generator current exceeds the protectors current rating then a series resistance can be used to reduce the current to the protectors rated value and so prevent possible failure. The required value of series resistance for a given waveform is given by the following calculations. First, the minimum total circuit impedance is found by dividing the impulse generators peak voltage by the protectors rated current. The impulse generators fictive impedance (generators peak voltage divided by peak short circuit current) is then subtracted from the minimum total circuit impedance to give the required value of series resistance. In some cases the equipment will require verification over a temperature range. By using the derated waveform values from the thermal information section, the appropriate series resistor value can be calculated for ambient temperatures in the range of 0 C to 70 C. protection voltage The protection voltage, (V(BO) ), increases under lightning surge conditions due to thyristor regeneration. This increase is dependent on the rate of current rise, di/dt, when the TISP(R) is clamping the voltage in its breakdown region. The V(BO) value under surge conditions can be estimated by multiplying the 50 Hz rate V(BO) (250 V/ms) value by the normalised increase at the surge's di/dt. An estimate of the di/dt can be made from the surge generator voltage rate of rise, dv/dt, and the circuit resistance. As an example, the ITU-T recommendation K.21 1.5 kV, 10/700 surge has an average dv/dt of 150 V/s, but, as the rise is exponential, the initial dv/dt is three times higher, being 450 V/s. The instantaneous generator output resistance is 25 . If the equipment has an additional series resistance of 20 , the total series resistance becomes 45 . The maximum di/dt then can be estimated as 450/45 = 10 A/s. In practice the measured di/dt and protection voltage increase will be lower due to inductive effects and the finite slope resistance of the TISP(R) breakdown region. capacitance off-state capacitance The off-state capacitance of a TISP(R) is sensitive to junction temperature, TJ , and the bias voltage, comprising of the dc voltage, VD , and the ac voltage, V d . All the capacitance values in this data sheet are measured with an ac voltage of 1 V rms. When VD >> Vd the capacitance value is independent on the value of Vd . Up to 10 MHz the capacitance is essentially independent of frequency. Above 10 MHz the effective capacitance is strongly dependent on connection inductance. For example, a printed wiring (PW) trace of 10 cm could create a circuit resonance with the device capacitance in the region of 80 MHz. PRODUCT 18 INFORMATION TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 longitudinal balance Figure 35 shows a three terminal TISP(R) with its equivalent "delta" capacitance. Each capacitance, CTG , C RG and CTR , is the true terminal pair capacitance measured with a three terminal or guarded capacitance bridge. If wire R is biased at a larger potential than wire T then CTG > CRG . Capacitance CTG is equivalent to a capacitance of CRG in parallel with the capacitive difference of (C TG - C RG ). The line capacitive unbalance is due to (CTG - CRG ) and the capacitance shunting the line is C TR + CRG/2 . Figure 35. All capacitance measurements in this data sheet are three terminal guarded to allow the designer to accurately assess capacitive unbalance effects. Simple two terminal capacitance meters (unguarded third terminal) give false readings as the shunt capacitance via the third terminal is included. PRODUCT INFORMATION 19 TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 typical circuits TIP WIRE F1a R1a Th3 GDTa PROTECTED EQUIPMENT Th1 GDTb Th2 F1b R1b RING WIRE AI7XBP TISP7xxxF3 Figure 36. PROTECTION MODULE R1a Th3 SIGNAL Th1 Th2 R1b AI7XBM TISP7150F3 D.C. Figure 37. ISDN PROTECTION OVERCURRENT PROTECTION TIP WIRE RING/TEST PROTECTION TEST RELAY RING RELAY S3a R1a COORDINATION RESISTANCE SLIC RELAY Th3 SLIC PROTECTION Th4 S2a S1a Th1 SLIC Th2 RING WIRE Th5 R1b S3b TISP7xxxF3 S1b S2b TISP6xxxx, TISPPBLx, 1/2TISP6NTP2 C1 220 nF TEST EQUIPMENT RING GENERATOR Figure 38. LINE CARD RING/TEST PROTECTION PRODUCT 20 INFORMATION VBAT AI7XBN TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 MECHANICAL DATA D008 plastic small-outline package This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly. D008 8-pin Small Outline Microelectronic Standard Package MS-012, JEDEC Publication 95 5,00 (0.197) 4,80 (0.189) 6,20 (0.244) 5,80 (0.228) 8 7 6 5 1 2 3 4 INDEX 4,00 (0.157) 3,81 (0.150) 7 NOM 3 Places 1,75 (0.069) 1,35 (0.053) 0,50 (0.020) x 45NOM 0,25 (0.010) 0,203 (0.008) 0,102 (0.004) 0,79 (0.031) 0,28 (0.011) 7 NOM 4 Places 0,51 (0.020) 0,36 (0.014) 8 Places Pin Spacing 1,27 (0.050) (see Note A) 6 Places 5,21 (0.205) 4,60 (0.181) 0,229 (0.0090) 0,190 (0.0075) 4 4 1,12 (0.044) 0,51 (0.020) ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTES: A. B. C. D. Leads are within 0,25 (0.010) radius of true position at maximum material condition. Body dimensions do not include mold flash or protrusion. Mold flash or protrusion shall not exceed 0,15 (0.006). Lead tips to be planar within 0,051 (0.002). PRODUCT MDXXAAC INFORMATION 21 TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 MECHANICAL DATA D008 tape dimensions D008 Package (8-pin Small Outline) Single-Sprocket Tape 4,10 3,90 8,10 7,90 1,60 1,50 2,05 1,95 0,40 0,8 MIN. 5,60 5,40 6,50 6,30 Direction of Feed Embossment Cover 0 MIN. o 1,5 MIN. Carrier Tape 12,30 11,70 Tape 2,2 2,0 ALL LINEAR DIMENSIONS IN MILLIMETERS NOTES: A. Taped devices are supplied on a reel of the following dimensions:Reel diameter: Reel hub diameter: Reel axial hole: 330 +0,0/-4,0 mm 100 2,0 mm 13,0 0,2 mm B. 2500 devices are on a reel. PRODUCT 22 INFORMATION MDXXATB TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 MECHANICAL DATA P008 plastic dual-in-line package This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions The package is intended for insertion in mounting-hole rows on 7,62 (0.300) centres. Once the leads are compressed and inserted, sufficient tension is provided to secure the package in the board during soldering. Leads require no additional cleaning or processing when used in soldered assembly. P008 9,75 (0.384) 9,25 (0.364) 8 7 6 5 Index Notch 6,60 (0.260) 6,10 (0.240) 1 2 3 4 8,23 (0.324) 7,62 (0.300) 1,78 (0.070) MAX 4 Places 5,08 (0.200) MAX Seating Plane 0,51 (0.020) MIN 0,53 (0.021) 0,38 (0.015) 8 Places 3,17 (0.125) MIN 2,54 (0.100) Typical (see Note A) 6 Places 0,36 (0.014) 0,20 (0.008) 9,40 (0.370) 8,38 (0.330) ALL LINEAR DIMENSIONS IN MILLIMETERS AND PARANTHETICALLY IN INCHES MDXXCF NOTES: A. Each pin centreline is located within 0,25 (0.010) of its true longitudinal position. B. Dimensions fall within JEDEC MS001 - R-PDIP-T, 0.300" Dual-In-Line Plastic Family. C. Details of the previous dot index P008 package style, drawing reference MDXXABA, are given in the earlier publications. PRODUCT INFORMATION 23 TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 MECHANICAL DATA SL003 3-pin plastic single-in-line package This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly. SL003 9,75 (0.384) 9,25 (0.364) Index Notch 3,40 (0.134) 3,20 (0.126) 6,60 (0.260) 6,10 (0.240) 8,31 (0.327) MAX 12,9 (0.492) MAX 4,267 (0.168) MIN 1 1,854 (0.073) MAX 2 3 2,54 (0.100) Typical (see Note A) 2 Places 0,356 (0.014) 0,203 (0.008) 0,711 (0.028) 0,559 (0.022) 3 Places ALL LINEAR DIMENSIONS IN MILLIMETERS AND PARANTHETICALLY IN INCHES MDXXCE NOTES: A. Each pin centreline is located within 0,25 (0.010) of its true longitudinal position. B. Body molding flash of up to 0,15 (0.006) may occur in the package lead plane. C. Details of the previous dot index SL003 style, drawing reference MDXXAD, are given in the earlier publications. PRODUCT 24 INFORMATION TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3, TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3 TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS MARCH 1994 - REVISED MARCH 2000 IMPORTANT NOTICE Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is current. PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. PI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORISED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS. Copyright (c) 2000, Power Innovations Limited PRODUCT INFORMATION 25