_______________General Description
The MAX2100 family of quadrature digitizers offers
complete solutions to digital demodulation problems.
The flagship of the MAX2100 family is the MAX2101 6-
bit Quadrature Digitizer. The subcircuits derived from
the MAX2101 provide excellent starting points for the
RF IC designer to develop components that bridge the
gap between existing RF downconverters and CMOS
digital signal processors.
Each MAX2100 subcircuit comes with a detailed sche-
matic, TEKSPICE or PSPICE netlist, models, and GDSII
layout for incorporation in your own custom ASIC
design. These subcircuits can be used separately or in
combination to produce complete demodulation and
digitization components for intermediate frequencies
(IF) ranging from 70MHz to 700MHz, and for base
bandwidths to 80MHz*. All are powered by a +5V sup-
ply, and are implemented in Maxim’s proprietary GST-1
wafer fabrication process with NPN fT= 13GHz.
Maxim does not guarantee specifications or fitness for
use of these subcircuits in your custom ASIC. The sub-
circuits are intended to demonstrate Maxim’s process
and design capability, and to provide circuit designers
with a “head start” in developing their own ASIC.
Operation of these subcircuits in a customer-designed
ASIC is the responsibility of the customer.
________________________Applications
Recovery of PSK and QAM Modulated RF Carriers
Direct-Broadcast Satellite (DBS) Systems
Television Receive-Only (TVRO) Systems
Cable Television (CATV) Systems
____________________________Features
♦Operation at IFs from 70MHz to 700MHz*
♦Precision Quadrature Demodulation
(1°, 0.2dB typ Mismatch, f = 650MHz)
♦Matched Active Filters with Electronically Variable
Cutoff from 10MHz to 30MHz
♦40dB of AGC Range
♦High-Speed 6-Bit ADCs with 5.8 (typ)
Effective Bits (fIN = 30MHz, fC= 120Msps) and
200MHz Input Bandwidth
______________Ordering Information
MAX2100 Subcircuits
Quadrature Digitizer Circuits
________________________________________________________________
Maxim Integrated Products
1
IF IN
fc = 10MHz to 30MHz
0° -90°
*AVAILABLE AS A STANDARD PRODUCT.
SEE MAX2101 DATA SHEET FOR SPECIFICATIONS AND ORDERING INFORMATION.
6
6
Q OUT
I OUT
X2113
X2118
X2111 X2114
X2112
MAX2101*
X2114
A/D CLOCK
60MHz
400MHz to
700MHz
LO
X2116
_______________________________________________________________Block Diagram
Call toll free 1-800-998-8800 for free samples or literature.
19-0370; Rev 0; 2/95
PART
X21nnPFD
X21nnPFT PSPICE
PSPICE
SIMULATOR MEDIUM
3.5"Floppy
3.5"Floppy
FORMAT
DOS
TAR
X21nnPTT
X21nnPHT PSPICE
PSPICE TAR
TAR
Tape
9-track 6250 bpi
X21nnPLT
X21nnPET PSPICE
PSPICE TAR
TAR
9-track 1600 bpi
Electronic mail
X21nnTFT
X21nnTTT TEKSPICE
TEKSPICE TAR
TAR
3.5"Floppy
Tape
X21nnTHT TEKSPICE TAR9-track 6250 bpi
X21nnTLT
X21nnTET TEKSPICE
TEKSPICE TAR
TAR
9-track 1600 bpi
Electronic mail
The MAX2100 cells are available in the above formats to
customers who have purchased a GST-1 ASIC Start-Up
Package and signed Maxim’s Non-Disclosure Agreement.
*VCO and Quadrature Generator limited to 400MHz to 700MHz
MAX2100 Subcircuits
____________________________Features
♦Wide Output Bandwidth (>80MHz)
♦Matched Demodulation to 700MHz
♦10dB Conversion Gain
_________________________Description
The X2111 Dual Balanced Demodulator cell comprises
two Gilbert-cell, double-balanced mixers. In combina-
tion with the X2118 precision quadrature generator, the
X2111 provides precise quadrature demodulation of
QPSK and QAM modulated carriers to 700MHz.
Cell Dimensions: 2 x [300µm x 230µm]
Dual Balanced Demodulator
2 _______________________________________________________________________________________
Q RF IN
I LO IN
Q LO IN
X2111 DUAL BALANCED DEMODULATOR
I RF IN
Q BB OUT
I BB OUT
X2111
KEY ELECTRICAL CHARACTERISTICS
(TA= 0°C to +70°C, unless otherwise noted.)
5Hz to 20MHz
fLO = 650MHz
fLO = 650MHz
fLO = 650MHz
fLO = 650MHz
fLO = 650MHz
CONDITIONS
dB0.4Output Baseband Gain Flatness MHz400 700fLO
LO Input Frequency
MHz80f-3dB
Output Bandwidth mA18ICC
Supply Current dBm+10IIP3Input Third-Order Intercept
dB0.4∆M(I/Q)I/Q Amplitude Imbalance °1.5
∆φ(I/Q)
I/Q Phase Imbalance dB15NFNoise Figure dB10AConversion Gain
UNITSMIN TYP MAXSYMBOLPARAMETER
PORT LIST
VCC = 5.0V ±5V
500µA PTAT reference current input
(from X2112 or equivalent)
+5V supply to I/Q mixer
GND for I/Q mixer
+ RF input
- RF input
DESCRIPTION
BIAS (I/Q)
VCC (I/Q)
VEE (I/Q)
IP (I/Q)
IPB (I/Q)
PORT NAME
+ LO input
Substrate connection (GND)
- LO input
+ Baseband output
- Baseband output
DESCRIPTION
OSC (I/Q)
SUB
OSCB (I/Q)
OPA (I/Q)
OPAB (I/Q)
PORT NAME
_____________________Block Diagram
MAX2100 Subcircuits
IF Amplifier with Variable Gain
_______________________________________________________________________________________ 3
____________________________Features
♦24dB Gain
♦800MHz Bandwidth
♦Over 40dB of Gain Range
_________________________Description
The X2112 IF Amplifier with Variable Gain cell compris-
es a differential input amplifier with 10dB insertion gain,
an AGC amp with 40dB of control range, and a second
IF amp with 12dB gain. The differential input can be
driven single-ended by proper AC grounding or by ter-
minating the inverting input. There is sufficient linearity
to provide IIP3 of +10dBm at minimum AGC setting.
Cell Dimensions: 780µm x 725µm
AGC IN
X2112 IF AMPLIFIER WITH VARIABLE GAIN
IF IN OUT
X2112
KEY ELECTRICAL CHARACTERISTICS
(TA= 0°C to +70°C, unless otherwise noted.)
_____________________Block Diagram
PORT LIST
f = 650MHz, VAGC = max
Max gain, Pin = -48dBm
Z0 = 50Ω/side
f = 650MHz, min gain
f = 650MHz, max gain
f = 650MHz, VAGC = min
f = 650MHz
f = 650MHz, VAGC = max
Max gain to min gain
CONDITIONS
dB22AVmaxMaximum Gain MHz800BW-3dBBandwidth (-3dB)
2:1Input VSWR +10 dBm
-35
IIP3Input Third-Order Intercept
dB-18AVminMinimum Gain dB40∆AVGain-Control Range dB15 18NFNoise Figure dB/dB1∆NFNoise-Figure Variation
UNITSMIN TYP MAXSYMBOLPARAMETER
Z0 = 50Ω/side 2:1Output VSWR mA20ICC
Supply Current
Bandgap-derived 2.5V output
AGC control voltage input
+ IF output
Ground
- IF output
Bandgap reference (1.2V) output
+5V supply DESCRIPTION
2R5
AGCIP
OP
OPB
BGR
PORT NAME
Substrate connection (ground)
+ IF input
- IF input
DESCRIPTION
VEE
VCC
SUB
IP
IPB
PORT NAME
Voltage proportional to absolute T output
250µA PTAT reference current for X2114
VPTAT
(I/Q)BIAS
250µA constant reference current for X2118
250µA PTAT reference current for X2118
K250
P250 500µA PTAT reference current for X2111MIX(I/Q)
VCC = 5.0V ±5%, RL= 1kΩ, CL= 2pF
MAX2100 Subcircuits
Dual 6-Bit ADCs (Megacell)
4 _______________________________________________________________________________________
____________________________Features
♦Dual, 6-Bit, 120Msps Flash Architecture
♦Programmable Sample Rate
♦Excellent Dynamic Performance
(5.8 effective bits at fIN = 30MHz)
♦Low Incidence of Metastable States
♦All Reference Generation Circuitry Included
_________________________Description
The X2113 “Megacell” contains two 6-bit flash ADCs and
associated reference and clock generation circuitry. The
comparator array in each ADC contains 63 identical dif-
ferential comparator and latch cells. The proprietary dif-
ferential architecture minimizes integral linearity error and
the occurrence of metastable states. The thermometer
code output of the comparator array is translated into
gray code using a fully differential wired-AND/wired-OR
scheme. This maximizes noise immunity. The gray code
is then converted to binary with a modified XOR array.
The reference generator applies a precision bandgap
signal to the differential ladder in the comparator array.
Additional circuitry is provided to adjust the half-scale
ladder voltage to the common-mode voltage of the dif-
ferential input signal.
A programmable divider allows the user to change
sample rate from a fixed external-clock oscillator.
Cell Dimensions: 2800µm x 1500µm
6
6
Q OUTPUT
REF OUT
SAMPLE RATE
Q INPUT
CLOCK IN
I INPUT
CLOCK OUT
I OUTPUT
3
X2113
/N
ADC
ADC
REF
GEN
X2113 DUAL 6-BIT ADCs
(MEGACELL)
KEY ELECTRICAL CHARACTERISTICS
(TA= 0°C to +70°C, unless otherwise noted.)
_____________________Block Diagram
kΩ5RINInput Resistance pF2CINInput Capacitance
fIN = 30MHz, fS= 60Msps, 95% FS
f1 = 10MHz, FS–7dB; f2 = 12MHz, FS–7dB
Full-scale to <1%
CONDITIONS
MHz20BW0.1dB0.1dB Bandwidth
Msps120SRmax
Maximum Sample Rate,
Each Channel
V2.25 2.75VINcm
Common-Mode Input Range
Bits5.8ENOBEffective Number of Bits dBc-38IM3Input Third-Order Intermod ns10tTRAN
Settling Time V±0.75∆VINFS
Full-Scale Input Range
UNITSMIN TYP MAXSYMBOLPARAMETER
Channel-to-channel
fS= 60Msps
ps20
Aperture Delay Match,
Channel-to-Channel
dB0.3∆AAmplitude Response Mismatch ps80Aperture Uncertainty
VCC = 5.0V ±5%
MAX2100 Subcircuits
Dual 6-Bit ADCs (Megacell)
_______________________________________________________________________________________ 5
KEY ELECTRICAL CHARACTERISTICS (continued)
(TA= 0°C to +70°C, unless otherwise noted.)
LSB = 24mV, either channel
RL= 1MΩ, CL= 15pF
RL= 1MΩ, CL= 15pF
CONDITIONS LSB0.5VOS
Input Offset
mA80 100ICC
Supply Current
LSB0.5DNLDifferential Nonlinearity LSB0.5INLIntegral Nonlinearity V2.4VOH
Data Output High V0.5VOL
Data Output Low
UNITSMIN TYP MAXSYMBOLPARAMETER
PORT LIST
- Analog input
+ Analog input
+5V supply, digital
Digital output, LSB
Digital output
+5V supply, quantizer DESCRIPTION
AINB (I/Q)
AIN (I/Q)
D0 (I/Q)
D1 (I/Q)
PORT NAME
Digital output
Digital output
D2 (I/Q)
D3 (I/Q)
+5V supply, clock
Substrate (ground), analog
Substrate (ground), digital
Ground connection, quantizer
SUBD
DESCRIPTION
VGNDAD Digital outputD4 (I/Q)Ground connection, encoderVGNDDD
VCCD
VCCAD
VCCC
SUBA
PORT NAME
Digital output, MSB
Binary enable/Two’s complement
D5 (I/Q)
BINEN Programmable sample-rate control, MSB
Programmable sample-rate control
S2
S1
Ground connection, output
Ground connection, clock
Master clock input
Reference clock (div 6) output
MCLK
RCLK Programmable sample-rate control, LSBS0Data clock outputDCLK
VGNDDO
VGNDC
250µA PTAT reference current input
(from cell X2114 or equivalent)
P250 (I/Q)Data clock complement outputDCLKB
Bandgap reference outputBGR +5V supply, outputsVCCO
MAX2100 Subcircuits
Active Lowpass Filter
6 _______________________________________________________________________________________
____________________________Features
♦5-Pole Butterworth Response
♦Adjustable Cutoff Frequency
♦No External Components Required
_________________________Description
The X2114 cell is an Active Lowpass Filter for anti-alias-
ing. The 5th-order Butterworth response is realized
using a Gyrator topology. Cutoff frequency can be
adjusted from 10MHz to 30MHz. Other pole-only filter
characteristics, as well as different cutoff frequency
ranges, can be designed by changing capacitor val-
ues.
Filter cutoff-frequency control requires a linear PTAT
voltage between 1V and 4V (at +27°C). An on-chip ref-
erence generator provides the necessary voltage varia-
tion with temperature.
Cell Dimensions: 620 x 780 + 260 x 520µm
VTUNE
INPUT OUTPUT
X2114
X2114 LOWPASS
ACTIVE FILTER
KEY ELECTRICAL CHARACTERISTICS
(TA= 0°C to +70°C, unless otherwise noted.)
_____________________Block Diagram
PORT LIST
f = 5MHz, RS= 50ΩnV/√Hz
58
VTUNE = 1V, 3dB, TA= +25°C
en
Equivalent Input Noise
VTUNE = 2.1V, 3dB, TA= +25°C
VTUNE = 4V, 3dB, TA= +25°C
f = 5MHz
f = 2 x fC
(with respect to signal level at f = 0.5 x fC)
CONDITIONS
MHz10fCMIN
Minimum Cutoff MHz16 24fC
Cutoff Frequency
mA2.5ICC
Supply Current
MHz30fCMAX
Maximum Cutoff dB02APBPassband Attenuation
dB27ASBStop-Band Attenuation
mV30VIN (max)Maximum Input Signal, p-p
UNITSMIN TYP MAXSYMBOLPARAMETER
Output reference
Output
Bandgap voltage in
(from X2112 or equivalent)
Ground
250µA PTAT reference current output for X2113
Tuning voltage input (PTAT)
+5V supply DESCRIPTION
REF1
OP
REF
ADC
VTUNE
PORT NAME
250µA PTAT reference current input
(from X2112 or equivalent)
+ Input
- Input
Substrate connection (GND)SUB
DESCRIPTION
VEE
VCC
BIAS
IP
IPB
PORT NAME
VCC = 5.0V ±5%
MAX2100 Subcircuits
Differential Oscillator
_______________________________________________________________________________________ 7
____________________________Features
♦Oscillates from <400MHz to >700MHz
♦Low Phase Noise
(-88dBc/Hz @ 10kHz Offset, Qr >20)
♦Differential Resonator Port for Immunity to
Interference and Crosstalk
_________________________Description
The X2116 cell is a Differential Oscillator suitable for
use as the LO in a receiver system. The differential
inputs present a negative resistance for use with an
external resonator. A differential topology is used to
provide maximum interference rejection.
Cell Dimensions: 520µm x 260µm
EXT TANK OUT
X2116
X2116 DIFFERENTIAL OSCILLATOR
KEY ELECTRICAL CHARACTERISTICS
(TA= 0°C to +70°C, unless otherwise noted.)
_____________________Block Diagram
PORT LIST
20MHz off fC, 1Hz BW, Qr = 20
External resonator
10MHz off fC, 1Hz BW, Qr = 20
CL= 1pF/side, RL= 10k/side
CONDITIONS
dBc-140
ΦN
Phase Noise Floor MHz400 700fC
Oscillation Frequency
dBc-88
ΦN
Phase Noise mV600VoOutput Level, Differential, p-p mA10ICC
Supply Current
UNITSMIN TYP MAXSYMBOLPARAMETER
- Output
+ Output
Substrate connection (GND)
Differential tank connection A
250µA PTAT reference current input
(from X2118 or equivalent)
+5V supply DESCRIPTION
OPB
OP
SUB
P250
PORT NAME
Differential tank connection B
125µA constant reference current input
(from X2118 or equivalent)
Ground
DESCRIPTION
TNKA
VCC
TNKB
K125
VEE
PORT NAME
VCC = 5.0V ±5%
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8
___________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600
© 1995 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Precision Quadrature Generator
MAX2100 Subcircuits
____________________________Features
♦Precision Quadrature Generation
(<1.5° at 650MHz)
♦Wide Input Frequency Range (400MHz to 700MHz)
_________________________Description
The X2118 Precision Quadrature Generator cell uses a
delay-locked loop to provide tight amplitude and phase
matching. The input from an external VCO drives a
buffer and a delay line consisting of three electronically
variable delay cells. The output of the delay line drives
a second buffer identical to the first. The buffer outputs
are compared by a phase detector whose error signal
drives the variable delay cells to adjust the phase dif-
ference to 90°. This method provides precise quadra-
ture generation over the wide input frequency range of
400MHz to 700MHz.
Cell Dimensions: 570µm x 1800µm
0° -90°
I OUT
2
Q OUT
2
LO IN
X2118
X2118 PRECISION QUADRATURE
GENERATOR
KEY ELECTRICAL CHARACTERISTICS
(TA= 0°C to +70°C, unless otherwise noted.)
_____________________Block Diagram
PORT LIST
fLO = 650MHz
fLO = 650MHz
CONDITIONS
°1.5
∆Φ
Output Phase Mismatch MHz400 700fLO
LO Frequency
mV400Vo (pk-pk)Output Level mV12∆VoOutput Amplitude Mismatch dBm-10 0VLO
LO Input Level
UNITSMIN TYP MAXSYMBOLPARAMETER
ZC = 50Ω2:1LO Input VSWR mA20ICC
Supply Current
- Quadrature output
+ Quadrature output
+ Inphase output
+ Input
- Inphase output
250µA PTAT reference current input
(from X2112 or equivalent)
+5V supply DESCRIPTION
QB
Q
I
IB
P250
PORT NAME
- Input
GND
250µA constant reference current input
(from X2112 or equivalent)
Substrate connection (GND)SUB
DESCRIPTION
IP
VCC
IPB
VEE
K250
PORT NAME
VCC = 5.0V ±5%
