BCM8703 FEATURES
Media
Access
Controller
Interface
MAC
RS
XGXS
XGXS
Management
Interface
XAUI BCM8703
PCS/PMA
MDC MDIO
OTX
ORX
Optical
PMD
EEPROM
10.3125/10.5188 Gbps
Application Block Diagram
•Automatic device configuration at power-up
•Core power supply: 1.2V
•Low-power CMOS solution: 1.5W typical
•Low power consumption eliminates external heat
sinks, fans for system airflow, and expensive high
current power supplies.
•Reduces design cycle and time to market.
•Uses the most effective silicon economy of scale for
CMOS-based devices.
•Target applications:
•XENPAK/XPAK fiber-optic modules
•LAN/WAN switches
•Switch/router backbones
•Hubs and repeaters
•Network Interface Cards (NICs)
•Test equipment
SUMMARY OF BENEFITS
SERIAL 10-G ETHERNET/FIBRE CHANNEL TRANSCEIVER WITH XAUI INTERFACE
PRODUCTPRODUCT
BriefBrief
BCM8703
•IEEE 802.3ae compliant
•Support for XENPAK and XPAK Standards
•Xenpak support optimized for Xenpak/XPAK layout and
thermal
•Fully integrated CMU, CDR, and SerDes
•Integrated limiting amplifier and EyeOpenerTM for
interfacing to XFP modules
•PMD interface with serial 10.3125/10.5188 Gbps CML
•PSC 64B/66B scrambler/descrambler
•XGXS 8B/10B error detection ENDEC
•XAUI link synchronization/deskew
•Four-lane XAUI interface (3.125/3.5188 Gbps)
•Loss-of-signal detection
•Digital Optical Monitoring (DOM) support
•Loopback modes
•802.3 clause 45 management interface extended
indirect address access
•Built-In Self-Test (BIST)
•Built-in jitter tests for XAUI and PMD
•Built-in BERT test support
•EEPROM interface support
®
The BCM8703 Ethernet/Fibre Channel PHY is a fully integrated
serialization/deserialization (10.3125/10.5188-Gbps) interface
device performing the extension functions for a 10 Gigabit Serial
Ethernet Reconciliation Sublayer (RS) interface. The XGMII
Extender Sublayer (XGXS), Physical Codings Sublayer (PCS),
and Physical Medium Attachment (PMA) functions include
8B/10B coding, 64B/66B coding, SerDes, Clock Multiplication
Unit (CMU), and Clock and Data Recovery (CDR).
On-chip clock synthesis is performed by the high-frequency,
low-jitter, phase-locked loops for the PMD and XAUI output
retimers. Individual PMD and XAUI clock recovery is
performed on the device by synchronizing the on-chip VCOs
directly to their respective incoming data streams. Elastic buffers
allow the XAUI and PMD interfaces to operate in either a
synchronous or asynchronous configuration. An external
156.25-MHz VCXO is required for synchronous mode operation
or for asynchronous mode with clock cleanup.
The BCM8703 is packaged in a 13 x 13 mm BGA package with
a 0.8-mm ball pitch.
BCM8703 OVERVIEW
Randomizer
D
C
A
2
2
Receive Path
EF
H
BG
IAC-coupled
10.3215/10.5188-Gbps
Differential CML Serial
Data Input
10.3215/10.5188-Gbps
Differential CML Serial
Data Output
10.3215/10.5188-Gbps
Differential CML Serial
Clock Output
Loopback Mode:
XAUI Independent Lane Loopback = B to A
System Loopback = G to I
Line Loopback = C to D
XGXS Loopbacks = A to B
PCS/PMA/PMD Loopback = D to C
BIST:
E - XAUI BIST Generator
F - PMD BIST Checker
G - XAUI BIST Checker
H - PMD BIST Generator
AC-coupled
3.125/3.188-Gbps
Differential XAUI
AC-coupled
Differential LVPECL
156.25/159.38 MHz
Elastic FIFO
3.125/3.188-Gbps
Differential XAUI
Transmit Path
Optics
Control
and
Status
Management
Resisters
and
Control
Interface
2-Wire
Interface
JTAG
MUX
MUX
MUX
Serializer
Serializer
DLL &
Deserializer
DLL &
Deserializer
Sync Detect
Lane Sync
8B/10B
Decoder
Sync Detect
Lane Sync
8B/10B
Decoder
Lane
Alignment
FIFO
Lane
Alignment
FIFO
Elastic FIFO
64B/66B
Encoder
Scrambler
Gearbox
CMU &
Serializer
Phase
Detector
Phase
Detector
CDR &
Deserializer
Gearbox
8B/10B
Encoder
8B/10B
Encoder
CMU
64B/66B
Synchronizer
Descrambler
Decoder
PCDRLK
PLOSB
XAOP
XAON
XDOP
XDON
XEXTCLKP
XEXTCLKN
XPDOUT
PEXTCLKP
PEXTCLKN
PPDOUT
PVCOXP
PVCOXN
XAIP
XAIN
XDIP
XDIN
PCMULK
RSTB
MDC
MDIO
PRTAD[4:0]
REFCLKOUT
LASI
SYSRSTB
PLOSB/A1
CONFIG[1:0]
TXONOFF
SDA
SCL
ZWENB
TRST
JTCK
TMS
TDI
TDO
PDIP
PDIN
VCPCDR
VCNCDR
PDOP
PDON
PCOP
PCON
OPTXENB0/1
OPTXRST0/1
OPRXLOS
OPBIASFLT
OPTMPFLT
OPPWFLT
OPOUTLVL
OPINLVL
OPTXFLT
OPRXFLT
10.5188 GHz
322.26/328.72 MHz
312.5/318.76 MHz
156.25/159.38 MHz
312.5/318.76 MHz
156.25/159.38 MHz
312.5/318.76 MHz
322.26/328.72 MHz
TM
Limiting
Amplifier
and
EyeOpener
Block Diagram
®
Phone: 949-450-8700
FAX: 949-450-8710
Email: info@broadcom.com
Web: www.broadcom.com
Broadcom®, the pulse logo, Connecting everything®, and EyeOpenerTM are trademarks of
Broadcom Corporation and/or its subsidiaries in the United States and certain other countries.
All other trademarks are the property of their respective owners.
BROADCOM CORPORATION
16215 Alton Parkway, P.O. Box 57013
Irvine, California 92619-7013
© 2003 by BROADCOM CORPORATION. All rights reserved.
8703-PB03-R 06-13-03
