APDS-9190
Digital Proximity Sensor
Data Sheet
Description
The APDS-9190 provides IR LED and a complete digital
proximity detection system in a single 8 pin package. The
proximity function oers plug and play detection to 100
mm (without front glass) thus eliminating the need for
factory calibration of the end equipment or sub-assembly.
The proximity detection feature operates well from bright
sunlight to dark rooms. The wide dynamic range also
allows for operation in short distance detection behind
dark glass such as a cell phone.
The proximity function is targeted specically towards
near eld proximity applications. In cell phones, the
proximity detection can detect when the user positions
the phone close to their ear. The device is fast enough
to provide proximity information at a high repetition
rate needed when answering a phone call. This provides
both improved “green” power saving capability and the
added security to lock the computer when the user is not
present. The addition of the micro-optics lenses within
the module, provide highly ecient transmission and
reception of infrared energy which lowers overall power
dissipation.
Features
• IR LED and Proximity Detector in an Optical Module
• Proximity Detection
– Fully Calibrated to 100 mm Detection
– Integrated IR LED and Synchronous LED Driver
– Eliminates “Factory Calibration” of Prox
– Covers a 2000: 1 Dynamic Range
• Programmable Wait Timer
– Wait State Power – 70 µA Typical
– Programmable from 2.72 ms to > 6 Sec
• I2C Interface Compatible
– Up to 400 kHz (I2C Fast-Mode)
– Dedicated Interrupt Pin
• Sleep Mode Power - 2.5 µA Typical
• Small Package L3.94 x W2.36 x H1.35 mm
Applications
• Cell Phone Touch-screen Disable
• Notebook/Monitor Security
• Automatic Speakerphone Enable
• Automatic Menu Pop-up
• Digital Camera Eye Sensor
6 - GND
7 - SCL
8 - VDD 1 - SDA
5 - LED A
3 - LDR
2 - SINT
4 - LED K
Ordering Information
Part Number Packaging Quantity
APDS-9190 Tape & Reel 2500 per reel
2
Functional Block Diagram
Upper Threshold
Lower Threshold
Interrupt
I2C Interface
Control
Logic
Prox
Detect
ADC
Data
INT
SCL
SDA
VDD
GND
LDR
LED K
LED A
Prox IR LED
Ch0
Ch1
LED Regulated
Constant Current
Sink
Detailed Description
The APDS-9190 light-to-digital device provides on-chip
Ch0 and CH1 diodes, integrating ampliers, ADCs, accu-
mulators, clocks, buers, comparators, a state machine
and an I2C interface. Each device combines one Ch0
photodiode (visible plus infrared) and one infrared-
responding (IR) photodiode. Two integrating ADCs simul-
taneously convert the amplied photodiode currents to a
digital value providing up to 16-bits of resolution. Upon
completion of the conversion cycle, the conversion result
is transferred to the Ch0 and IR data registers. This digital
output can be read by a microprocessor.
Communication to the device is accomplished through a
fast (up to 400 kHz), two-wire I2C serial bus for easy con-
nection to a microcontroller or embedded controller. The
digital output of the APDS-9190 device is inherently more
immune to noise when compared to an analog interface.
The APDS-9190 provides a separate pin for level-style in-
terrupts. When interrupts are enabled and a pre-set value
is exceeded, the interrupt pin is asserted and remains
asserted until cleared by the controlling rmware.
The interrupt feature simplies and improves system
eciency by eliminating the need to poll a sensor for a
proximity value. An interrupt is generated when the value
of proximity conversion exceeds either an upper or lower
threshold. Additionally, a programmable interrupt per-
sistence feature allows the user to determine how many
consecutive exceeded thresholds are necessary to trigger
an interrupt. Interrupt thresholds and persistence settings
are congured independently for proximity.
Proximity detection is fully provided with an 850 nm IR
LED. An internal LED driver (LDR) pin, is jumper connected
to the LED cathode (LED K) to provide a factory calibrated
proximity of 100 +/- 20 mm. This is accomplished with a
proprietary current calibration technique that accounts
for all variances in silicon, optics, package and most impor-
tantly IR LED output power. This will eliminate or greatly
reduce the need for factory calibration that is required
for most discrete proximity sensor solutions. While the
APDS-9190 is factory calibrated at a given pulse count,
the number of proximity LED pulses can be programmed
from 1 to 255 pulses, which will allow greater proximity
distances to be achieved. Each pulse has a 16 µs period.
3
I/O Pins Conguration
Pin Name Type Description
1SDA I/O I2C serial data I/O terminal – serial data I/O for I2C.
2 INT O Interrupt – open drain.
3 LDR I LED driver for proximity emitter – up to 100 mA, open drain.
4 LEDK O LED Cathode, connect to LDR pin in most systems to use internal LED driver circuit
5 LEDA I LED Anode, connect to VBATT on PCB
6 GND Power supply ground. All voltages are referenced to GND.
7 SCL I I2C serial clock input terminal – clock signal for I2C serial data.
8 VDD Power Supply voltage.
Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)†
Parameter Symbol Min Max Units Conditions
Power Supply voltage VDD 3.8 V 1
Digital voltage range -0.5 3.8 V
Digital output current IO-1 20 mA
Storage temperature range Tstg -40 85 °C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may aect device reliability.
Note:
1. All voltages are with respect to GND.
Recommended Operating Conditions
Parameter Symbol Min Typ Max Units
Operating Ambient Temperature TA-30 85 °C
Supply voltage VDD 2.5 3.0 3.6 V
Interface Bus Power Supply Voltage VBUS 1.8 V
Supply Voltage Accuracy,
VDD total error including transients
-3 +3 %
LED Supply Voltage VBATT 2.5 4.5 V
Operating Characteristics, VDD = 3 V, TA = 25° C (unless otherwise noted)
Parameter Symbol Min Typ Max Units Test Conditions
Supply current [1] IDD 175 250 µAActive
70 Wait Mode
2.5 4.0 Sleep Mode
INT SDA output low voltage VOL 0 0.4 V 3 mA sink current
0 0.6 6 mA sink current
Leakage current, SDA, SCL, INT pins ILEAK -5 5 µA
Leakage current, LDR pin ILEAK 10 µA
SCL, SDA input high voltage VIH 1.25 V
SCL, SDA input low voltage VIL 0.54 V
Oscillator frequency fosc 705 750 795 kHz PON = 1
Note:
1. The power consumption is raised by the programmed amount of Proximity LED Drive during the 8 us the LED pulse is on. The nominal and
maximum values are shown under Proximity Characteristics. There the IDD supply current is IDD Active + Proximity LED Drive programmed value.
4
Proximity Characteristics, VDD = 3 V, TA = 25° C, PGAIN=1, PEN = 1 (unless otherwise noted)
Parameter Symbol Min Typ Max Units Test Conditions
Supply current – LDR Pulse On IDD 3 mA
ADC Conversion Time Step Size 2.72 ms PTIME = 0x
ADC Number of Integration Steps 1 steps PTIME = 0x
Full Scale ADC Counts per Steps 1023 counts PTIME = 0x
Proximity IR LED Pulse Count 0 255 pulses
Proximity Pulse Period 16.3 µs
Proximity Pulse – LED On Time 7.2 µs
Proximity LED Drive 100 mA PDRIVE=0 ISINK Sink current
@ 600 mV, LDR Pin
50 PDRIVE =1
25 PDRIVE =2
12.5 PDRIVE =3
Proximity ADC count value,
no object
100 LED driving 8 pulses, PDRIVE
= 0, open view (no glass) and
no reective object above the
module.
Proximity ADC Count Value 416 520 624 counts Reecting object – 73 x 83 mm
Kodak 90% grey card, 100 mm
distance, LED driving 8 pulses,
PDRIVE = 0, open view (no glass)
above the module.
IR LED Characteristics, VDD = 3 V, TA = 25° C
Parameter Symbol Min Typ Max Units Test Conditions
Forward Voltage VF1.4 1.5 V IF = 20 mA
Reverse Voltage VR5 V IR = 10 µA
Radiant Power PO4.5 mW IF = 20 mA
Peak Wavelength λP850 nm IF = 20 mA
Spectrum Width, Half Power Δλ40 nm IF = 20 mA
Optical Rise Time TR20 ns IF = 100 mA
Optical Fall Time TF20 ns IF = 100 mA
Wait Characteristics, VDD = 3 V, TA = 25° C, WEN = 1 (unless otherwise noted)
Parameter Min Typ Max Units Test Conditions
Wait Step Size 2.72 ms WTIME = 0x
Wait Number of Step 1 256 steps
5
Characteristics of the SDA and SCL bus lines, VDD = 3 V, TA = 25° C (unless otherwise noted) †
Parameter Symbol
Standard-mode Fast-mode
UnitMin. Max. Min. Max.
SCL clock frequency fSCL 0 100 0 400 kHz
Hold time (repeated) START condition.
After this period, the rst clock pulse is
generated
tHD;STA 4.0 – 0.6 – µs
LOW period of the SCL clock tLOW 4.7 – 1.3 – µs
HIGH period of the SCL clock tHIGH 4.0 – 0.6 – µs
Set-up time for a repeated START condition tSU;STA 4.7 – 0.6 – µs
Data hold time: tHD;DAT 0 – 0 – ns
Data set-up time tSU;DAT 250 – 100 – ns
Rise time of both SDA and SCL signals tr20 1000 20 300 ns
Fall time of both SDA and SCL signals tf20 300 20 300 ns
Set-up time for STOP condition tSU;STO 4.0 – 0.6 – µs
Bus free time between a STOP and START condition tBUF 4.7 – 1.3 – µs
Capacitive load for each bus line Cb – 400 – 400 pF
Noise margin at the LOW level for each connected device
(including hysteresis)
VnL 0.1 VBUS –0.1 VBUS – V
Noise margin at the HIGH level for each connected device
(including hysteresis)
VnH 0.2 VBUS –0.2 VBUS – V
† Specied by design and characterization; not production tested.
Figure 1. I2C Bus Timing Diagram
SSr tSU;STO
tSU;STA
tHD;STA tHIGH
tLOW tSU;DAT
tHD;DAT
tf
SDA
SCL
P S
tBUF
tr
tf
trtSP
tHD;STA
MSC610
SDA
SCL
StopStart
SCLACK
t(LOWMEXT) t(LOWMEXT)
t(LOWSEXT)
SCLACK
t(LOWMEXT)
6
Figure 2. Spectral Responsivity Figure 3. Normalized IDD vs. VDD
Figure 4. Normalized IDD vs. Temperature
Figure 5a. Normalized Pd Responsivity vs. Angular Displacement Figure 5b. Normalized LED Angular Emitting Prole
0.8
1.0
1.2
300 400 500 600 700 800 900 1000 1100
Wavelength (Nm)
Normalized Responsitivity
Ch 0
Ch 1
0.0
0.2
0.4
0.6
0.8
0.9
1.0
1.1
2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8
VDD (V)
Normalized IDD @ 3 V 25° C
0.8
0.9
1.0
1.1
1.2
-60 -40 -20 0 20 40 60 80 100
Temperature (°C)
Normalized IDD @ 3 V
0.8
0.9
1.0
1.1
-100 -80 -60 -40 -20 0 20 40 60 80 100
Angle (Degree)
Normalized Responsitivity
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
-30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30
Normalised Radiant Intensity
Angle (Degree)
7
Principles of Operation
System State Machine
The APDS-9190 provides control of proximity detection
and power management functionality through an internal
state machine. After a power-on-reset, the device is in
the sleep mode. As soon as the PON bit is set, the device
will move to the start state. It will then continue through
the Prox and Wait states. If these states are enabled, the
device will execute each function. If the PON bit is set to
a 0, the state machine will continue until all conversions
are completed and then go into a low power sleep mode.
Figure 6. Simplied State Diagram
Note: In this document, the nomenclature uses the bit eld name in
italics followed by the register number and bit number to allow the
user to easily identify the register and bit that controls the function. For
example, the power on (PON) is in register 0, bit 0. This is represented as
PON (r0:b0).
Proximity Detection
Proximity sensing uses an internal IR LED light source to
emit light which is then viewed by the integrated light
detector to measure the amount of reected light when
an object is in the light path. The amount of light detected
from a reected surface can then be used to determine an
object’s proximity to the sensor. The APDS-9190 is factory
calibrated to meet the requirement of proximity sensing
of 100 +/- 20 mm, thus eliminating the need for factory
calibration of the end equipment. When the APDS-9190
is placed behind a typical glass surface, the proximity
detection achieved is around 25 to 40 mm, thus providing
an ideal touch-screen disable.
The APDS-9190 has controls for the number of IR pulses
(PPCOUNT), the integration time (PTIME), the LED drive
current (PDRIVE) and the photodiode conguration
(PDIODE). The photodiode conguration can be set to no
diode (test mode), infrared diode (recommended), Ch0
diode or a combination of both diodes. At the end of the
integration cycle, the results are latched into the proximity
data (PDATA) register.
The LED drive current is controlled by a regulated current
sink on the LDR pin. This feature eliminates the need to
use a current limiting resistor to control LED current. The
LED drive current can be congured for 12.5 mA, 25 mA,
50 mA, or 100mA. For higher LED drive requirements, an
external P type transistor can be used to control the LED
current.
The number of LED pulses can be programmed to a value
of 1 to 255 pulses as needed. Increasing the number of
LED pulses at a given current will increase the sensor sen-
sitivity. Sensitivity grows by the square root of the number
of pulses. Each pulse has a 16 µS period.
The proximity integration time (PTIME) is the period of
time that the internal ADC converts the analog signal
to a digital count. It is recommend that this be set to a
minimum of PTIME = 0xFF or 2.72 ms.
Figure 7. Proximity IR LED Waveform
Sleep
Start
WaitProx
PON = 1 (r0:b0)
PON = 0 (r0:b0)
LED O
IRLED Pulses
Subtract
Background
Add IR+
Background
LED On
16 µs
8
Optical Design Considerations
The APDS-9190 simplies the optical system design by
eliminating the need for light pipes and improves system
optical eciency by providing apertures and package
shielding which will reduce crosstalk when placed in
the nal system. By reducing the IR LED to glass surface
crosstalk, proximity performance is greatly improved
and enables a wide range of cell phone applications
utilizing the APDS-9190. The module package design
has been optimized for minimum package foot print and
short distance proximity of 100 mm typical. The spacing
between the glass surface and package top surface is
critical to controlling the crosstalk. If the package to top
surface spacing gap, window thickness and transmittance
are met, there should be no need to add additional com-
ponents (such as a barrier) between the LED and photo-
diode. Thus with some simple mechanical design imple-
mentations, the APDS-9190 will perform will in the end
equipment system.
Figure 8. Proximity Detection
Air Gap, g
Plastic/Glass Window
APDS-9190
Windows Thickness, t
The APDS-9190 is available in a low prole package that
contains optics which provides optical gain on both the
LED and the sensor side of the package. The device has
a package Z height of 1.35 mm and will support air gap
of < = 0.5 mm between the glass and the package. The
assumption of the optical system level design is that glass
surface above the module is < = to 1.0 mm.
By integrating the micro-optics in the package, the IR
energy emitted can be reduced thus conserving the
precious battery life in the application.
The system designer has the ability to optimize their
designs for slim form factor Z height as well as improve
the proximity sensing, save battery power and disable the
touch screen in a cellular phone.
APDS-9190 Module Optimized design parameters
• Window thickness, t ≤ 1.0 mm
• Air gap, g ≤ 0.5 mm
• Assuming window IR transmittance 90%
Figure 9b. PS Output vs. Distance, at Various Pulse number
(LED drive Current). No glass in front of the module, 90% Kodak Grey Card
Figure 9a. PS Output vs. Distance, at Various Pulse number
(LED drive Current). No glass in front of the module, 18% Kodak Grey Card
0
200
400
600
800
1000
1200
PS Count
Distance (cm)
0
200
400
600
800
1000
1200
PS Count
Distance (cm)
4P (100 mA)
6P (100 mA)
8P (100 mA)
16P (100 mA)
8P (50 mA)
2 4 6 810 12 14 160 0 4 86 10 12 14 16 18 202
8P (100 mA)
4P (100 mA)
16P (100 mA)
8P (50 mA)
6P (100 mA)
9
Interrupts
The interrupt feature of the APDS-9190 simplies and
improves system eciency by eliminating the need to
poll the sensor for a light intensity or proximity value. The
interrupt mode is determined by the PIEN or AIEN eld in
the ENABLE register.
The APDS-9190 implements four 16-bit-wide interrupt
threshold registers that allow the user to dene thresholds
above and below a desired light level. An interrupt can
be generated when the proximity data (PDATA) exceeds
the upper threshold value (PIHTx) or falls below the lower
threshold (PILTx).
To further control when an interrupt occurs, the
APDS-9190 provides an interrupt persistence feature. This
feature allows the user to specify a number of conver-
sion cycles for which an event exceeding the proximity
interrupt threshold must persist (PPERS) before actually
generating an interrupt. Refer to the register descriptions
for details on the length of the persistence.
Figure 10. Programmable Interrupt
PIHTH (r0 x OB), PIHTL (r0 x OA)
PILTH (r09), PIHTL (r08)
APERS (r0 x OC, b3:0)
Prox
Integration
Prox
ADC
Prox
Data
Upper Limit Prox Persistence
Lower Limit
Ch1
State Diagram
The following shows a more detailed ow for the state
machine. The device starts in the sleep mode. The PON
bit is written to enable the device. If the PEN bit is set,
the state machine will step through the proximity states
of proximity accumulate and then proximity ADC con-
version. As soon as the conversion is complete, the state
machine will move to the following state.
If the WEN bit is set, the state machine will then cycle
through the wait state. If the WLONG bit is set, the wait
cycles are extended by 12x over normal operation.
PON = 1 PON = 0
WEN = 1
PEN = 1
Sleep
Start
Prox
Accum
Prox
Check
Prox
ADC
Up to 255 LED Pulses
Pulse Frequency: 60 kHz
Time: 16.3 µs – 4.2 ms
Maximum – 4.2 ms
Up to 255 steps
Step: 2.72 ms
Time: 2.72 ms – 696 ms
Recommended – 2.72 ms 1024 Counts
WLONG = 0
Counts up to 256 steps
Step: 2.72 ms
Time: 2.72 ms – 696 ms
Maximum – 2.72 ms
WLONG = 1
Counts up to 256 steps
Step: 32.64 ms
Time: 32.64 ms – 8.35 ms
Maximum – 32.64 ms
Wait
Wait
Check
Figure 11. Extended State Diagram
10
Power Management
Power consumption can be controlled through the use of the wait state timing since the wait state consumes only
70 µA of power. The following shows an example of using the power management feature to achieve an average power
consumption of 140 µA of current with 4 – 100 mA pulses of proximity detection.
Example: 50 ms Cycle Time
State Duration Current(mA)
Prox Accum (LED On) 0.064 (0.032) 100
Prox ADC 2.72 0.175
Wait 47 0.070
Avg = ((0.032 x 100) + (2.72 x 0.175) + (47 x 0.070)) ÷ 50 = 140 µA
Figure 12. Power Consumption Calculations
4 IRLED Pulses
Prox Accum
Prox ADC
WAIT
64 µs (32 µs LED On Time)
2.72 ms
47 ms
11
BASIC SOFTWARE OPERATION
The following pseudo-code shows how to do basic initialization of the APDS-9190.
uint8 PTIME,WTIME,PPCOUNT;
WTIME = 0x; // 2.7ms – minimum Wait time
PTIME = 0x; // 2.7ms – minimum Prox integration time
PPCOUNT = 1; // Minimum prox pulse count
WriteRegData(0, 0); //Disable and Powerdown
WriteRegData (2, PTIME);
WriteRegData (3, WTIME);
WriteRegData (0xe, PPCOUNT);
uint8 PDRIVE, PDIODE, PGAIN, AGAIN;
PDRIVE = 0; //100mA of LED Power
PDIODE = 0x20; // Ch1 Diode
PGAIN = 0; //1x Prox gain
WriteRegData (0xf, PDRIVE | PDIODE | PGAIN | AGAIN);
uint8 WEN, PEN, PON;
WEN = 8; // Enable Wait
PEN = 4; // Enable Prox
PON = 1; // Enable Power On
WriteRegData (0, WEN | PEN | PON); // WriteRegData(0,0x0f);
Wait(12); //Wait for 12 ms
int Prox_data;
Prox_data = Read_Word(0x18);
WriteRegData(uint8 reg, uint8 data)
{
m_I2CBus.WriteI2C(0x39, 0x80 | reg, 1, &data);
}
uint16 Read_Word(uint8 reg);
{
uint8 barr[2];
m_I2CBus.ReadI2C(0x39, 0xA0 | reg, 2, ref barr);
return (uint16)(barr[0] + 256 * barr[1]);
12
I2C Protocol
Interface and control of the APDS-9190 is accomplished
through an I2C serial compatible interface (standard or fast
mode) to a set of registers that provide access to device
control functions and output data. The device supports
a single slave address of 0x39 hex using 7 bit addressing
protocol. (Contact factory for other addressing options.)
The I2C standard provides for three types of bus trans-
action: read, write and a combined protocol. During a
write operation, the rst byte written is a command byte
followed by data. In a combined protocol, the rst byte
written is the command byte followed by reading a series
Start and Stop conditions
of bytes. If a read command is issued, the register address
from the previous command will be used for data access.
Likewise, if the MSB of the command is not set, the device
will write a series of bytes at the address stored in the last
valid command with a register address. The command
byte contains either control information or a 5 bit register
address. The control commands can also be used to clear
interrupts. For a complete description of I2C protocols,
please review the I2C Specication at: http://www.NXP.
com
Data transfer on I2C-bus
A complete data transfer
S
1 – 7 8 9 1 – 7 8 9 1 – 7 8 9
P
STOP
condition
START
condition DATADATAADDRESS ACK ACK ACKR/W
SDA
SCL
SDA
SCL
1 72 8
acknowledgement
signal from slave
MSB
START or
repeated START
condition
byte complete,
interrupt within slave
S or Sr
ACK
clock line held LOW while
interrupts are serviced
ACK
9Sr or P
1 2 3 to 8 9
acknowledgement
signal from receiver
STOP or
repeated START
condition
Sr
P
1 2 3 to 8 9
ACK
MSB MSB
SCL
SDA
S P
START condition STOP condition
13
A Acknowledge (0)
N Not Acknowledged (1)
P Stop Condition
R Read (1)
S Start Condition
Sr Repeated Start Condition
W Write (0)
… Continuation of protocol
Master-to-Slave
Slave-to-Master
I2C Write Protocol
171181811
S Slave Address W A Command Code A Data A P
I2C Write Protocol (Clear Interrupt)
1711811
S Slave Address W A Command Code A P
I2C Write Word Protocol
1 7 1 1 8 1 8 1 8 1 1
S Slave Address W A Command Code A Data Low A Data High A P
I2C Read Protocol – Combined Format
1 7 1 1 8 1 1 7 1 1 8 1 1
S Slave Address W A Command Code A Sr Slave Address R A Data High N P
I2C Read Word Protocol
1 7 1 1 8 1 1 7 1 1 8 1
S Slave Address W A Command Code A Sr Slave Address R A Data Low A
8 1 1
Data High N P
14
Register Set
The APDS-9190 is controlled and monitored by data registers and a command register accessed through the serial
interface. These registers provide for a variety of control functions and can be read to determine results of the ADC
conversions.
Address Resister Name R/W Register Function Reset Value
– COMMAND W Species register address 0x00
0x00 ENABLE R/W Enable of states and interrupts 0x00
0x02 PTIME R/W Proximity ADC time 0xFF
0x03 WTIME R/W Wait time 0xFF
0x08 PILTL R/W Proximity interrupt low threshold low byte 0x00
0x09 PILTH R/W Proximity interrupt low threshold hi byte 0x00
0x0A PIHTL R/W Proximity interrupt hi threshold low byte 0x00
0x0B PIHTH R/W Proximity interrupt hi threshold hi byte 0x00
0x0C PERS R/W Interrupt persistence lters 0x00
0x0D CONFIG R/W Conguration 0x00
0x0E PPCOUNT R/W Proximity pulse count 0x00
0x0F CONTROL R/W Gain control register 0x00
0x11 REV R Revision Number Rev
0x13 STATUS R Device status 0x00
0x18 PDATAL R Proximity ADC low data register 0x00
0x19 PDATAH R Proximity ADC high data register 0x00
The mechanics of accessing a specic register depends on the specic protocol used. See the section on I2C protocols
on the previous pages. In general, the COMMAND register is written rst to specify the specic control/status register
for following read/write operations.
15
Command Register
The command registers species the address of the target register for future write and read operations.
76543210
COMMAND CMD Type Add --
Field Bits Description
Command 7 Select Command Register. Must write as 1 when addressing COMMAND register.
Type 6:5 Selects type of transaction to follow in subsequent data transfers:
Field Value Integration Time
00 Repeated Byte protocol transaction
01 Auto-Increment protocol transaction
10 Reserved – Do not use
11 Special function – See description below
Byte protocol will repeatedly read the same register with each data access.
Block protocol will provide auto-increment function to read successive bytes.
Add 4:0 Address register/special function register. Depending on the transaction type, see above, this eld
either species a special function command or selects the specic control-status-register for following
write or read transactions:
Field Value Read Value
00000 Normal – no action
00101 Proximity interrupt clear
00111 Proximity interrupt clear
other Reserved – Do not write
Proximity Interrupt Clear. Clears any pending Proximity interrupt. This special function is self clearing.
Enable Register (0x00)
The ENABLE register is used primarily to power the APDS-9190 device up and down as shown in Table 4.
76543210Address
ENABLE Reserved Reserved PIEN Reserved WEN PEN Reserved PON 0x00
Field Bits Description
Reserved 7:6 Reserved. Write as 0.
PIEN 5 Proximity Interrupt Enable. When asserted, permits proximity interrupts to be generated.
Reserved 4 Reserved. Write as 0.
WEN 3 Wait Enable. This bit activates the wait feature. Writing a 1 activates the wait timer. Writing a 0 disables
the wait timer.
PEN 2 Proximity Enable. This bit activates the proximity function. Writing a 1 enables proximity. Writing a 0
disables proximity.
Reserved 1 Reserved. Write as 0.
PON 0 Power ON. This bit activates the internal oscillator to permit the timers and ADC channels to operate.
Writing a 1 activates the oscillator. Writing a 0 disables the oscillator.
Notes:
1. A 2.7-ms delay is automatically inserted prior to entering the ADC cycle, independent of the WEN bit.
2. PON must be asserted before the ADC channels will operate correctly.
3. During writes and reads over the I2C interface, this bit is overridden and the oscillator is enabled, independent of the state of PON.
4. A minimum interval of 2.7 ms must pass after PON is asserted before proximity can be initiated. This required time is enforced by the hardware in
cases where the rmware does not provide it.
16
Proximity Time Control Register (0x02)
The proximity timing register controls the integration time of the proximity ADC in 2.72 ms increments. It is recom-
mended that this register be programmed to a value of 0x (1 cycle, 1023 bits).
Field Bits Description
PTIME 7:0 Value Cycles Time Max Count
0x 1 2.72 ms 1023
Wait Time Register (0x03)
Wait time is set 2.72 ms increments unless the WLONG bit is asserted in which case the wait times are 12x longer. WTIME
is programmed as a 2’s complement number.
Field Bits Description
WTIME 7:0 Register Value Wait Time Time (WLONG = 0) Time (WLONG = 1)
0x 1 2.72 ms 0.032 sec
0xb6 74 201.29 ms 2.37 sec
0x00 256 696.32 ms 8.19 sec
Notes:
1. The Write Byte protocol cannot be used when WTIME is greater than 127.
2. The Proximity Wait Time Register should be congured before PEN is asserted.
Proximity Interrupt Threshold Register (0x08 – 0x0B)
The proximity interrupt threshold registers provide the values to be used as the high and low trigger points for the com-
parison function for interrupt generation. If the value generated by proximity channel crosses below the lower threshold
specied, or above the higher threshold, an interrupt is signaled to the host processor.
Register Address Bits Description
PILTL 0x08 7:0 Proximity ADC channel low threshold lower byte
PILTH 0x09 7:0 Proximity ADC channel low threshold upper byte
PIHTL 0x0A 7:0 Proximity ADC channel high threshold lower byte
PIHTH 0x0B 7:0 Proximity ADC channel high threshold upper byte
17
Persistence Register (0x0C)
The persistence register controls the ltering interrupt capabilities of the device. Congurable ltering is provided to
allow interrupts to be generated after each ADC integration cycle or if the ADC integration has produced a result that is
outside of the values specied by threshold register for some specied amount of time.
76543210
PERS PPERS Reserved 0x0c
Field Bits Description
PPERS 7:4 Proximity interrupt persistence. Controls rate of proximity interrupt to the host processor.
Field Value Meaning Interrupt Persistence Function
0000 Every Every proximity cycle generates an interrupt
0001 1 1 consecutive proximity values out of range
... ... ...
1111 15 15 consecutive proximity values out of range
Conguration Register (0x0D)
The conguration register sets the wait long time.
76543210
CONFIG Reserved WLONG Reserved 0x0D
Field Bits Description
Reserved 7:2 Reserved. Write as 0.
WLONG 1 Wait Long. When asserted, the wait cycles are increased by a factor 12x from that programmed in the
WTIME register.
Reserved 0 Reserved. Write as 0.
Proximity Pulse Count Register (0x0E)
The proximity pulse count register sets the number of proximity pulses that will be transmitted. PPCOUNT denes the
number of pulses to be transmitted at a 62.5 kHz rate.
76543210
PPCOUNT PPCOUNT 0x0E
Field Bits Description
PPCOUNT 7:0 Proximity Pulse Count. Species the number of proximity pulses to be generated.
18
Control Register (0x0F)
The Gain register provides eight bits of miscellaneous control to the analog block. These bits typically control functions
such as gain settings and/or diode selection.
76543210
CONTROL PDRIVE PDIODE PGAIN Reserved 0x0F
Field Bits Description
PDRIVE 7:6 LED Drive Strength.
Field Value LED Strength
00 100 mA
01 50 mA
10 25 mA
11 12.5 mA
PDIODE 5:4 Proximity Diode Select.
Field Value DIODE Selection
00 Reserved
01 Reserved
10 Proximity uses the CH1 diode
11 Reserved
PGAIN 3:2 Proximity Gain Control.
Field Value Proximity Gain Value
00 1X Gain
01 Reserved
10 Reserved
11 Reserved
Reserved 1:0 Reserved. Write as 0.
Rev ID Register (0x11)
The Rev ID register provides the silicon revision number. The Rev ID is a read-only register whose value never changes.
76543210
REV REV ID 0x11
Field Bits Description
REV ID 7:0 Revision number identication
0x01
19
Status Register (0x13)
The Status Register provides the internal status of the device. This register is read only.
76543210
STATUS Reserved Reserved PINT Reserved Reserved Reserved PVALID Reserved 0x13
Field Bits Description
Reserved 7:6 Reserved.
PINT 5 Proximity Interrupt. Indicates that the device is asserting a proximity interrupt.
Reserved 4:2 Reserved.
PVALID 1 Proximity Interrupt. Indicates that the device is asserting a proximity interrupt.
Reserved 0 Reserved.
Proximity DATA Register (0x18 − 0x19)
Proximity data is stored as a 16-bit value. To ensure the data is read correctly, a two byte read I2C transaction should be
utilized with a read word protocol bit set in the command register. With this operation, when the lower byte register is
read, the upper eight bits are stored into a shadow register, which is read by a subsequent read to the upper byte. The
upper register will read the correct value even if additional ADC integration cycles end between the reading of the lower
and upper registers.
Register Address Bits Description
PDATA 0x18 7:0 Proximity data low byte
PDATAH 0x19 7:0 Proximity data high byte
20
Application Information: Hardware
The application hardware circuit for implementing Proximity system solution is quite simple with the APDS-9190 and is
shown in following gure. The 1 µF decoupling capacitors should be low ESR to reduce noise. It further recommended to
maximize system performance the use of power and ground planes is recommended in the PCB. If mounted on a exible
circuit, the power and ground traces back to the PCB should be suciently wide enough to have a low resistance, such
as < 1 ohm.
Figure 13. Circuit implementation for Proximity solution using the APDS-9190
GND
APDS-9190
MCU
VDD
VBUS VDD
1 µF
1 µF
10 kΩ10 kΩ10 kΩ
VBATT
GPIO
SCL
SDA
INT
SCL
SDA
LDR
LED K
LED A
21
PCB Pad Layout
Suggested PCB pad layout guidelines for the Dual Flat
No-Lead surface mount package are shown below.
Notes: all linear dimensions are in mm.
0.60 0.60
0.72 (x8)
0.25 (x6)
0.80
Package Outline Dimensions
1
2
3
4
4
3
2
1
Ø 1 ±0.05
Ø 0.90 ±0.05
1.18 ±0.05
0.58 ±0.05 2.40 ±0.05
134
2.10 ±0.1
2.36 ±0.2
1.35 ±0.20
3.73 ±0.1
3.94 ±0.2
PINOUT
1 - SDA
2 - INT
3 - LDR
4 - LEDK
5 - LEDA
6 - GND
7 - SCL
8 - VDD
0.80
0.60
0.05
0.05
0.25 (x6)
0.72 (x8)
5
6
7
8
5
6
7
8
22
Tape Dimensions
All dimensions unit: mm
K0
A0
B0
12 +0.30
-0.10
4 ±0.10
Ø 1.50 ±0.10
1.75 ±0.10
2 ±0.05
8 ±0.10
5.50 ±0.05
Ø 1 ±0.05
Unit Orientation
A A
4.30 ±0.10
0.29 ±0.02
1.70 ±0.10 6° Max
2.70 ±0.10 8° Max
Reel Dimensions
23
Moisture Proof Packaging
All APDS-9190 options are shipped in moisture proof package. Once opened, moisture absorption begins. This part is
compliant to JEDEC MSL 3.
Units in A Sealed
Mositure-Proof
Package
Package Is
Opened (Unsealed)
Environment
less than 30 deg C, and
less than 60% RH ?
Package Is
Opened less
than 168 hours ?
Perform Recommended
Baking Conditions
No Baking
Is Necessary
No
Yes
No
Yes
Recommended Storage Conditions:
Storage Temperature 10°C to 30°C
Relative Humidity Below 60% RH
Time from unsealing to soldering:
After removal from the bag, the parts should be soldered
within 168 hours if stored at the recommended storage
conditions. If times longer than 168 hours are needed, the
parts must be stored in a dry box
Baking Conditions:
Package Temp. Time
In Reels 60°C48 hours
In Bulk 100°C4 hours
If the parts are not stored in dry conditions, they must be
baked before reow to prevent damage to the parts.
Baking should only be done once.
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved.
AV02-3182EN - June 4, 2013
Recommended Reow Prole
50 100 300150 200 250
t-TIME
(SECONDS)
25
80
120
150
180
200
230
255
0
T - TEMPERATURE (°C)
R1
R2
R3 R4
R5
217
MAX 260° C
P1
HEAT
UP
P2
SOLDER PASTE DRY
P3
SOLDER
REFLOW
P4
COOL DOWN
60 sec to 120 sec
Above 217° C
The reow prole is a straight-line representation of
a nominal temperature prole for a convective reow
solder process. The temperature prole is divided into
four process zones, each with dierent ΔT/Δtime tem-
perature change rates or duration. The ΔT/Δtime rates or
duration are detailed in the above table. The temperatures
are measured at the component to printed circuit board
connections.
In process zone P1, the PC board and component pins are
heated to a temperature of 150° C to activate the ux in
the solder paste. The temperature ramp up rate, R1, is
limited to 3° C per second to allow for even heating of
both the PC board and component pins.
Process zone P2 should be of sucient time duration (100
to 180 seconds) to dry the solder paste. The temperature is
raised to a level just below the liquidus point of the solder.
Process zone P3 is the solder reow zone. In zone P3, the
temperature is quickly raised above the liquidus point of
solder to 260° C (500° C) for optimum results. The dwell
time above the liquidus point of solder should be between
60 and 120 seconds. This is to assure proper coalescing
of the solder paste into liquid solder and the formation
of good solder connections. Beyond the recommended
dwell time the intermetallic growth within the solder con-
nections becomes excessive, resulting in the formation of
weak and unreliable connections. The temperature is then
rapidly reduced to a point below the solidus temperature
of the solder to allow the solder within the connections to
freeze solid.
Process zone P4 is the cool down after solder freeze. The
cool down rate, R5, from the liquidus point of the solder to
25° C (77° F) should not exceed 6° C per second maximum.
This limitation is necessary to allow the PC board and
component pins to change dimensions evenly, putting
minimal stresses on the component.
It is recommended to perform reow soldering no more
than twice.
Process Zone Symbol ΔT
Maximum ΔT/
Δtime or Duration
Heat Up P1, R1 25° C to 150° C 3°C/s
Solder Paste Dry P2, R2 150° C to 200° C 100 s to 180 s
Solder Reow P3, R3
P3, R4
200° C to 260° C
260° C to 200° C
3°C/s
-6°C/s
Cool Down P4, R5 200° C to 25° C -6°C/s
Time maintained above liquidus point, 217° C > 217° C 60 s to 120 s
Peak Temperature 260° C –
Time within 5° C of actual Peak Temperature > 255° C 20 s to 40 s
Time 25° C to Peak Temperature 25° C to 260° C 8 mins
