© Semiconductor Components Industries, LLC, 20110
July, 2010 − Rev. 9
1Publication Order Number:
MJD44H11/D
MJD44H11 (NPN)
MJD45H11 (PNP)
Complementary Power
Transistors
DPAK For Surface Mount Applications
Designed for general purpose power and switching such as output or
driver stages in applications such as switching regulators, converters,
and power amplifiers.
Features
•Lead Formed for Surface Mount Application in Plastic Sleeves
(No Suffix)
•Straight Lead Version in Plastic Sleeves (“−1” Suffix)
•Electrically Similar to Popular D44H/D45H Series
•Low Collector Emitter Saturation Voltage −
VCE(sat) = 1.0 Volt Max @ 8.0 Amperes
•Fast Switching Speeds
•Complementary Pairs Simplifies Designs
•Epoxy Meets UL 94 V−0 @ 0.125 in
•ESD Ratings: Human Body Model, 3B u 8000 V
Machine Model, C u 400 V
•Pb−Free Packages are Available
MAXIMUM RATINGS
Rating Symbol Max Unit
Collector−Emitter Voltage VCEO 80 Vdc
Emitter−Base Voltage VEB 5 Vdc
Collector Current − Continuous
− Peak
IC8
16
Adc
Total Power Dissipation
@ TC = 25°C
Derate above 25°C
PD20
0.16
W
W/°C
Total Power Dissipation (Note 1)
@ TA = 25°C
Derate above 25°C
PD1.75
0.014
W
W/°C
Operating and Storage Junction
Temperature Range
TJ, Tstg −55 to +150 °C
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Thermal Resistance, Junction−to−Case RqJC 6.25 °C/W
Thermal Resistance, Junction−to−Ambient
(Note 1)
RqJA 71.4 °C/W
Lead Temperature for Soldering TL260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. These ratings are applicable when surface mounted on the minimum pad
sizes recommended.
SILICON
POWER TRANSISTORS
8 AMPERES
80 VOLTS, 20 WATTS
DPAK−3
CASE 369D
STYLE 1
DPAK
CASE 369C
STYLE 1
MARKING
DIAGRAMS
Y = Year
WW = Work Week
J4xH11 = Device Code
x = 4 or 5
G=Pb−Free Package
12
3
4YWW
J4
xH11G
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
1
23
4
YWW
J4
xH11G
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MJD44H11 (NPN) MJD45H11 (PNP)
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2
ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage
(IC = 30 mA, IB = 0)
VCEO(sus) 80 Vdc
Collector Cutoff Current
(VCE = Rated VCEO, VBE = 0)
ICES 1.0 mA
Emitter Cutoff Current
(VEB = 5 Vdc)
IEBO 1.0 mA
ON CHARACTERISTICS
Collector−Emitter Saturation Voltage
(IC = 8 Adc, IB = 0.4 Adc)
VCE(sat) 1 Vdc
Base−Emitter Saturation Voltage
(IC = 8 Adc, IB = 0.8 Adc)
VBE(sat) 1.5 Vdc
DC Current Gain
(VCE = 1 Vdc, IC = 2 Adc)
hFE 60 −
DC Current Gain
(VCE = 1 Vdc, IC = 4 Adc)
40
DYNAMIC CHARACTERISTICS
Collector Capacitance
(VCB = 10 Vdc, ftest = 1 MHz) MJD44H11
MJD45H11
Ccb
45
130
pF
Gain Bandwidth Product
(IC = 0.5 Adc, VCE = 10 Vdc, f = 20 MHz) MJD44H11
MJD45H11
fT
85
90
MHz
SWITCHING TIMES
Delay and Rise Times
(IC = 5 Adc, IB1 = 0.5 Adc) MJD44H11
MJD45H11
td + tr
300
135
ns
Storage Time
(IC = 5 Adc, IB1 = IB2 = 0.5 Adc) MJD44H11
MJD45H11
ts
500
500
ns
Fall Time
(IC = 5 Adc, IB1 = IB2 = 0.5 Adc MJD44H11
MJD45H11
tf
140
100
ns
MJD44H11 (NPN) MJD45H11 (PNP)
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3
t, TIME (ms)
1
0.01
1 k
0.3
0.2
0.07
r(t), EFFECTIVE TRANSIENT THERMAL
RqJC(t) = r(t) RqJC
RqJC = 6.25°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TC = P(pk) qJC(t)
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
0.01
RESISTANCE (NORMALIZED)
0.7
Figure 1. Thermal Response
0.5
0.1
0.05
0.03
0.02
0.02 0.03 0.05 0.1 0.2 0.3 0.5 1 2 3 5 10 20 30 50 100 200 300 500
0.2
SINGLE PULSE
D = 0.5
0.1
0.02
0.01
0.05
IC, COLLECTOR CURRENT (AMP)
20
1
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
0.02 3 100
2
0.5
5
0.1
THERMAL LIMIT @ TC = 25°C
WIRE BOND LIMIT
5 7 20 7010
100ms
dc
0.05
0.3
1
3
10
5030
Figure 2. Maximum Forward Bias
Safe Operating Area
1ms
500ms
5ms
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC − VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 2 is based on TJ(pk) = 150_C; TC is
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided TJ(pk)
v 150_C. TJ(pk) may be calculated from the data in
Figure 1. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
25
25
T, TEMPERATURE (°C)
050 75 100 125 150
20
15
10
5
PD, POWER DISSIPATION (WATTS)
2.5
0
2
1.5
1
0.5
TATC
Figure 3. Power Derating
TC
TA
SURFACE
MOUNT
MJD44H11 (NPN) MJD45H11 (PNP)
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4
IC, COLLECTOR CURRENT (AMPS)
hFE, DC CURRENT GAIN
1000
0.01
Figure 4. MJD44H11 DC Current Gain
10 110
100
Figure 5. MJD45H11 DC Current Gain
Figure 6. MJD44H11 DC Current Gain Figure 7. MJD45H11 DC Current Gain
IC/IB = 10
0.1
Figure 8. MJD44H11 Saturation Voltage
VCE(sat)
IC, COLLECTOR CURRENT (AMPS)
COLLECTOR-EMITTER SATURATION VOLTAGE (V)
1
0.01
0.1
110
150°C
Figure 9. MJD45H11 Saturation Voltage
VCE(sat)
VCE = 1 V
-40°C
25°C
0.1
IC, COLLECTOR CURRENT (AMPS)
hFE, DC CURRENT GAIN
1000
0.01
10 110
100
150°C
VCE = 1 V
-40°C
25°C
0.1
IC, COLLECTOR CURRENT (AMPS)
hFE, DC CURRENT GAIN
1000
0.01
10 110
100
150°C
VCE = 4 V
-40°C
25°C
0.1
IC, COLLECTOR CURRENT (AMPS)
hFE, DC CURRENT GAIN
1000
0.01
10 110
100
150°C
VCE = 4 V
-40°C
25°C
0.1
150°C
25°C
-40°C
IC/IB = 10
0.1
IC, COLLECTOR CURRENT (AMPS)
COLLECTOR-EMITTER SATURATION VOLTAGE (V)
1
0.01
0.1
110
150°C
25°C
-40°C
MJD44H11 (NPN) MJD45H11 (PNP)
http://onsemi.com
5
0.1
Figure 10. MJD44H11 Saturation Voltage
VBE
(
sat
)
IC, COLLECTOR CURRENT (AMPS)
1
0.8
BASE-EMITTER SATURATION VOLTAGE (V)
1.2
0.4
1.1
0.6
0.9
110
Figure 11. MJD45H11 Saturation Voltage
VBE
(
sat
)
0.5
0.7
IC/IB = 10
150°C
25°C
-40°C
0.1
IC, COLLECTOR CURRENT (AMPS)
1
0.8
BASE-EMITTER SATURATION VOLTAGE (V)
1.2
0.4
1.1
0.6
0.9
110
0.5
0.7
IC/IB = 10
150°C
25°C
-40°C
MJD44H11 (NPN) MJD45H11 (PNP)
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6
ORDERING INFORMATION
Device Package Type Package Shipping†
MJD44H11 DPAK
369C
75 Units / Rail
MJD44H11G DPAK
(Pb−Free)
MJD44H11−001 DPAK−3
369D
MJD44H11−001G DPAK−3
(Pb−Free)
MJD44H11RL DPAK
369C
1800 Tape & Reel
MJD44H11RLG DPAK
(Pb−Free)
MJD44H11T4 DPAK
2500 Tape & Reel
MJD44H11T4G DPAK
(Pb−Free)
MJD44H11T5 DPAK
MJD44H11T5G DPAK
(Pb−Free)
MJD45H11 DPAK
75 Units / Rail
MJD45H11G DPAK
(Pb−Free)
MJD45H11−001 DPAK−3
369D
MJD45H11−001G DPAK−3
(Pb−Free)
MJD45H11RL DPAK
369C
1800 Tape & Reel
MJD45H11RLG DPAK
(Pb−Free)
MJD45H11T4 DPAK
2500 Tape & Reel
MJD45H11T4G DPAK
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MJD44H11 (NPN) MJD45H11 (PNP)
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PACKAGE DIMENSIONS
DPAK
CASE 369C−01
ISSUE D
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
5.80
0.228
2.58
0.101
1.6
0.063
6.20
0.244
3.0
0.118
6.172
0.243
ǒmm
inchesǓ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
b
D
E
b3
L3
L4
b2
eM
0.005 (0.13) C
c2
A
c
C
Z
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
D0.235 0.245 5.97 6.22
E0.250 0.265 6.35 6.73
A0.086 0.094 2.18 2.38
b0.025 0.035 0.63 0.89
c2 0.018 0.024 0.46 0.61
b2 0.030 0.045 0.76 1.14
c0.018 0.024 0.46 0.61
e0.090 BSC 2.29 BSC
b3 0.180 0.215 4.57 5.46
L4 −−− 0.040 −−− 1.01
L0.055 0.070 1.40 1.78
L3 0.035 0.050 0.89 1.27
Z0.155 −−− 3.93 −−−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN
DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
12 3
4
H0.370 0.410 9.40 10.41
A1 0.000 0.005 0.00 0.13
L1 0.108 REF 2.74 REF
L2 0.020 BSC 0.51 BSC
A1
H
DETAIL A
SEATING
PLANE
A
B
C
L1
L
H
L2 GAUGE
PLANE
DETAIL A
ROTATED 90 CW5
MJD44H11 (NPN) MJD45H11 (PNP)
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8
PACKAGE DIMENSIONS
DPAK−3
CASE 369D−01
ISSUE B
123
4
V
SA
K
−T−
SEATING
PLANE
R
B
F
G
D3 PL
M
0.13 (0.005) T
C
E
J
H
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.235 0.245 5.97 6.35
B0.250 0.265 6.35 6.73
C0.086 0.094 2.19 2.38
D0.027 0.035 0.69 0.88
E0.018 0.023 0.46 0.58
F0.037 0.045 0.94 1.14
G0.090 BSC 2.29 BSC
H0.034 0.040 0.87 1.01
J0.018 0.023 0.46 0.58
K0.350 0.380 8.89 9.65
R0.180 0.215 4.45 5.45
S0.025 0.040 0.63 1.01
V0.035 0.050 0.89 1.27
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
Z
Z0.155 −−− 3.93 −−−
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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MJD44H11/D
PUBLICATION ORDERING INFORMATION
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