2SK2315 Silicon N Channel MOS FET REJ03G1006-0200 (Previous: ADE-208-1354) Rev.2.00 Sep.07,2005 Application High speed power switching Features * * * * * Low on-resistance High speed switching Low drive current 2.5 V gate drive device can be driven from 3 V source. Suitable for DC-DC converter, motor drive, power switch, solenoid drive Outline RENESAS Package code: PLZZ0004CA-A (Package name: UPAK R ) 3 D 2 1 1. Gate 2. Drain 3. Source 4. Drain G 4 S Note: Marking is "TY" *UPAK is a trademark of Renesas Technology Corp. Rev.2.00 Sep. 07, 2005 page 1 of 5 2SK2315 Absolute Maximum Ratings (Ta = 25C) Item Symbol VDSS VGSS ID ID(pulse)*1 IDR Pch*2 Tch Tstg Ratings 60 20 2 4 2 1 150 -55 to +150 Drain to source voltage Gate to source voltage Drain current Drain peak current Body to drain diode reverse drain current Channel dissipation Channel temperature Storage temperature Notes: 1. PW 10 s, duty cycle 1 % 2. When using the alumina ceramic board (12.5 x 20 x 0.7mm) Unit V V A A A W C C Electrical Characteristics (Ta = 25C) Item Drain to source breakdown voltage Gate to source breakdown voltage Symbol V(BR)DSS V(BR)GSS Min 60 20 Typ -- -- Max -- -- Unit V V Test Conditions ID = 10 mA, VGS = 0 IG = 100 A, VDS = 0 Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage IGSS IDSS VGS(off) Static drain to source on state resistance RDS(on) Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on time Turn-off time Note: 3. Pulse Test |yfs| Ciss Coss Crss ton toff -- -- 0.5 -- -- 1.5 -- -- -- -- -- -- -- -- 0.4 0.35 1.8 173 85 23 21 85 5 5 1.5 0.6 0.45 -- -- -- -- -- -- A A V S pF pF pF ns ns VGS = 16 V, VDS = 0 VDS = 50 V, VGS = 0 ID = 1 mA, VDS = 10 V ID = 0.3 A, VGS = 3 V*3 ID = 1 A, VGS = 4 V*3 ID = 1 A, VDS = 10 V*3 Rev.2.00 Sep. 07, 2005 page 2 of 5 VDS = 10 V, VGS = 0, f = 1 MHz ID = 1 A, RL = 30 , VGS = 10 V 2SK2315 Main Characteristics Maximum Safe Operation Area 5 1.6 ID (A) 100 s 1.2 2 PW 1 0.2 Operation in this area is limited by RDS(on) 0.1 0.05 Ta = 25C 1 shot pulse 0.01 100 150 0.005 0.2 200 0.5 1 2 5 10 20 5 10 V 5V 4V 3.5 V Ta = 25C Pulse Test ID (A) 4 3V Drain Current 3 2.5 V 2 2V 1 4 Tc = 75C 25C -25C 3 2 1 VDS = 10 V Pulse Test VGS = 1.5 V 2 4 6 8 Drain to Source Voltage 0 10 VDS (V) Pulse Test Ta = 25C 0.8 0.6 ID = 2 A 0.4 1A 0.2 0.5 A 4 8 12 Gate to Source Voltage Rev.2.00 Sep. 07, 2005 page 3 of 5 16 20 VGS (V) 2 3 4 5 VGS (V) Static Drain to Source State Resistance vs. Drain Current Drain to Source On State Resistance RDS(on) () 1.0 1 Gate to Source Voltage Drain to Source Saturation Voltage vs. Gate to Source Voltage 0 VDS (V) Typical Transfer Characteristics 5 0 50 100 200 Drain to Source Voltage Ta ((C) Typical Output Characteristics ID (A) n io t ra Drain Current s 0.02 50 s m pe 0.4 m 10 O 0.8 Ambient Temperature Drain Current = 0.5 0 Drain to Source Saturation Voltage VDS(on) (V) 1 C D Channel Dissipation Pch** (W) (** on the almina ceramic board) Power vs. Temperature Derating 5 2 Ta = 25 25C Pulse Test 1 VGS = 3 V 0.5 10 V 0.2 0.1 0.05 0.1 0.2 0.5 1 Drain Current 2 5 ID (A) 10 Static Drain to Source on State Resistance vs. Temperature 1.0 0.8 ID = 2 A 0.6 VGS = 3 V 0.5 A 1A 0.4 0.2 1A 0.5 A ID = 2 A VGS = 10 V 0 -40 0 40 80 120 Case Temperature Tc Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS(on) () 2SK2315 160 Forward Transfer Admittance vs. Drain Current 10 5 Tc = -25C 25C 75C 2 1 0.5 VDS = 10 V Pulse Test 0.2 0.1 0.1 0.2 0.5 ((C) 1 2 5 10 Drain Current ID (A) 100 Coss Crss 10 VGS = 0 f = 1 MHz 1 0 10 20 30 40 Drain to Source Voltage 100 40 20 0 tf td(on) 5 VGS = 10 V, PW = 2 s VDD = 30 V, duty < 1 % 0.2 0.5 Drain Current Rev.2.00 Sep. 07, 2005 page 4 of 5 1 2 ID (A) 2 4 8 4 VDD = 50 V 25 V 10 V 6 Gate Charge Reverse Drain Current IDR (A) Switching Time t (ns) td(off) 0.1 ID = 2 A 8 0 10 Qg (nc) Reverse Drain Current vs. Source to Drain Voltage 50 2 0.05 12 VDS VDS (V) 100 tr 16 60 50 200 10 20 VGS VDD = 50 V 25 V 10 V 80 Switching Characteristics 20 Dynamic Input Characteristics 5 5 Pulse Test 4 3 10 V 2 5V VGS = 0 1 0 0.4 0.8 1.2 Source to Drain Voltage 1.6 2.0 VSD (V) Gate to Source Voltage VDS (V) Ciss Drain to Source Voltage Capacitance C (pF) 1000 VGS (V) Typical Capacitance vs. Drain to Source Voltage 2SK2315 Package Dimensions RENESAS Code Package Name MASS[Typ.] PLZZ0004CA-A UPAK / UPAKV 0.050g 1.5 1.5 3.0 1.5 0.1 0.44 Max 2.5 0.1 4.25 Max (1.5) 0.44 Max (0.2) 0.53 Max 0.48 Max 0.8 Min 1 0.4 4.5 0.1 1.8 Max Unit: mm (2.5) SC-62 (0.4) JEITA Package Code Ordering Information Part Name 2SK2315TYTL-E 2SK2315TYTR-E Quantity 1000 pcs 1000 pcs Shipping Container Taping Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.2.00 Sep. 07, 2005 page 5 of 5 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. placement of substitutive, auxiliary Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placeme circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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